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71. 发明申请

US20060294314A1 Pseudo least recently used replacement/allocation scheme in request agent affinitive set-associative snoop filter 有权
公开(公告)号：US20060294314A1
公开(公告)日：2006-12-28
申请号：US11168703
申请日：2005-06-28
申请人： Kai Cheng , David Lee , John Urbanski
发明人： Kai Cheng , David Lee , John Urbanski
IPC分类号： G06F12/00
CPC分类号： G06F12/082 , G06F12/0822 , G06F12/123
摘要： The storage locations of a snoop filter are segregated into a number of groups, and some groups are associated with some processors in a system. When new data enter a cache line of a processor, one of the storage locations associated with the processor is selected for further operations.

72. 发明授权

US06959364B2 Partially inclusive snoop filter 失效
标题翻译：部分包围窥探过滤器
公开(公告)号：US06959364B2
公开(公告)日：2005-10-25
申请号：US10186490
申请日：2002-06-28
申请人： Robert J. Safranek , Kai Cheng
发明人： Robert J. Safranek , Kai Cheng
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/082 , G06F12/0813 , G06F12/0831 , G06F2212/2542
摘要： In some embodiments, the invention includes a snoop filter, wherein entries in the snoop filter are allocated in response to initial accesses of local cache lines by a remote node, but entries in the snoop filter are not allocated in response to accesses of the local cache lines by a local node. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，本发明包括窥探过滤器，其中响应于远程节点对本地高速缓存行的初始访问来分配窥探过滤器中的条目，但是响应于本地高速缓存的访问不会分配窥探过滤器中的条目线路由本地节点。描述和要求保护其他实施例。

73. 发明申请

US20050060499A1 Method and apparatus for joint cache coherency states in multi-interface caches 失效
标题翻译：多接口缓存中联合高速缓存一致性状态的方法和装置
公开(公告)号：US20050060499A1
公开(公告)日：2005-03-17
申请号：US10662093
申请日：2003-09-12
申请人： Jeffrey Gilbert , Kai Cheng
发明人： Jeffrey Gilbert , Kai Cheng
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0811 , G06F12/0831 , G06F2212/507
摘要： A method and apparatus for cache coherency states is disclosed. In one embodiment, a cache accessible across two interfaces, an inner interface and an outer interface, may have a joint cache coherency state. The joint cache coherency state may have a first state for the inner interface and a second state for the outer interface, where the second state has higher privilege than the first state. In one embodiment this may promote speculative invalidation. In other embodiments this may reduce snoop transactions on the inner interface.
摘要翻译：公开了一种用于高速缓存一致性状态的方法和装置。在一个实施例中，可跨两个接口访问的高速缓存，内部接口和外部接口可以具有联合高速缓存一致性状态。联合高速缓存一致性状态可以具有内部接口的第一状态和外部接口的第二状态，其中第二状态具有比第一状态更高的特权。在一个实施例中，这可以促进投机无效。在其他实施例中，这可以减少内部接口上的窥探事务。

74. 发明授权

US06810467B1 Method and apparatus for centralized snoop filtering 有权
标题翻译：用于集中侦听过滤的方法和装置
公开(公告)号：US06810467B1
公开(公告)日：2004-10-26
申请号：US09643382
申请日：2000-08-21
申请人： Manoj Khare , Faye A. Briggs , Kai Cheng , Lily Pao Looi
发明人： Manoj Khare , Faye A. Briggs , Kai Cheng , Lily Pao Looi
IPC分类号： G06F1208
CPC分类号： G06F12/0831 , G06F12/0822 , G06F12/0828 , G06F2212/507
摘要： An example embodiment of a computer system utilizing a central snoop filter includes several nodes coupled together via a switching device. Each of the nodes may include several processors and caches as well as a block of system memory. All traffic from one node to another takes place through the switching device. The switching device includes a snoop filter that tracks cache line coherency information for all caches in the computer system. The snoop filter has enough entries to track the tags and state information for all entries in all caches in all of the system's nodes. In addition to the tag and state information, the snoop filter stores information indicating which of the nodes has a copy of each cache line. The snoop filter serves in part to keep snoop transactions from being performed at nodes that do not contain a copy of the subject cache line, thereby reducing system overhead, reducing traffic across the system interconnect busses, and reducing the amount of time required to perform snoop transactions.
摘要翻译：利用中央窥探滤波器的计算机系统的示例性实施例包括经由交换设备耦合在一起的多个节点。每个节点可以包括几个处理器和高速缓存以及系统存储器块。从一个节点到另一个节点的所有业务通过交换设备进行。交换设备包括一个窥探过滤器，其跟踪计算机系统中所有高速缓存的高速缓存行一致性信息。监听过滤器具有足够的条目来跟踪所有系统节点中所有高速缓存中所有条目的标签和状态信息。除了标签和状态信息之外，窥探过滤器存储指示哪个节点具有每个高速缓存行的副本的信息。窥探过滤器部分地用于在不包含主体高速缓存行的副本的节点处执行窥探事务，从而减少系统开销，减少跨系统互连总线的流量，并减少执行窥探所需的时间量交易。

75. 发明授权

US6112283A Out-of-order snooping for multiprocessor computer systems 有权
标题翻译：多处理器计算机系统的无序监听
公开(公告)号：US6112283A
公开(公告)日：2000-08-29
申请号：US130302
申请日：1998-08-06
申请人： Gilbert A. Neiger , Nicholas D. Wade , Kai Cheng
发明人： Gilbert A. Neiger , Nicholas D. Wade , Kai Cheng
IPC分类号： G06F12/08 , G06F15/177 , G06F12/00 , G06F9/38 , G06F15/16
CPC分类号： G06F12/0813 , G06F12/0831
摘要： In some embodiments, a computer system includes nodes connected through conductors. At least some of the nodes each include memory and processing circuitry to receive snoop requests in a node reception order and to initiate snoops of the memory in the node before the snoop requests are in a global order. The at least some nodes also each include an ordering buffer to receive the snoop requests and provide them at an output of the ordering buffer in the global order.
摘要翻译：在一些实施例中，计算机系统包括通过导体连接的节点。每个节点中的至少一些节点包括存储器和处理电路，用于以节点接收顺序接收窥探请求，并且在窥探请求处于全局顺序之前发起节点中的存储器的窥探。至少一些节点还各自包括用于接收窥探请求的排序缓冲器，并且以全局顺序在排序缓冲器的输出端提供它们。

76. 发明授权

US09391637B2 Error correcting code scheme utilizing reserved space 有权
标题翻译：使用保留空间纠正码方案的错误
公开(公告)号：US09391637B2
公开(公告)日：2016-07-12
申请号：US13997616
申请日：2012-03-30
申请人： Rajat Agrawal , Debaleena Das , Kai Cheng
发明人： Rajat Agrawal , Debaleena Das , Kai Cheng
IPC分类号： H03M13/00 , H03M13/05 , G06F11/10 , G06F12/08 , G11C29/04
CPC分类号： H03M13/05 , G06F11/1064 , G06F12/0895 , G11C2029/0411 , Y02D10/13
摘要： Methods, techniques, systems and apparatuses for utilizing reserved space for error correcting functionality. A cache line (“reserved line”) in a plurality of cache lines to store error correcting code (ECC) data is utilized for storing ECC data corresponding to other cache lines within the plurality of cache lines when a memory device has failed.
摘要翻译：用于利用预留空间进行纠错功能的方法，技术，系统和装置。当存储器件发生故障时，用于存储纠错码（ECC）数据的多个高速缓存行中的高速缓存行（“保留行”）用于存储与多个高速缓存行中的其它高速缓存行相对应的ECC数据。

77. 发明授权

US09196477B2 Semiconductor device and method 有权
标题翻译：半导体器件及方法
公开(公告)号：US09196477B2
公开(公告)日：2015-11-24
申请号：US13438718
申请日：2012-04-03
申请人： Kai Cheng , Matty Caymax
发明人： Kai Cheng , Matty Caymax
IPC分类号： H01L29/06 , H01L29/02 , H01L21/02 , H01L33/00 , H01L33/06
CPC分类号： H01L21/02494 , H01L21/0237 , H01L21/02381 , H01L21/0243 , H01L21/02458 , H01L21/02505 , H01L21/02516 , H01L21/0254 , H01L21/02587 , H01L33/007 , H01L33/06
摘要： A semiconductor device and a method of manufacturing the device is disclosed. In one aspect, a method includes providing a substrate, providing a first epitaxial semiconducting layer on top of the substrate, and forming a one- or two-dimensional repetitive pattern, each part of the pattern having an aspect ratio in the range of about 0.1 to 50.
摘要翻译：公开了一种半导体器件及其制造方法。在一个方面，一种方法包括提供衬底，在衬底的顶部上提供第一外延半导体层，并形成一维或二维重复图案，该图案的每一部分具有在约0.1范围内的纵横比到50。

78. 发明申请

US20130275810A1 METHOD AND APPARATUS FOR INJECTING ERRORS INTO MEMORY 有权
标题翻译：将错误注入记忆的方法和装置
公开(公告)号：US20130275810A1
公开(公告)日：2013-10-17
申请号：US13992506
申请日：2011-09-29
申请人： Theodros Yigzaw , Kai Cheng , Mohan J. Kumar , Jose A. Vargas , Gopikrishna Jandhyala
发明人： Theodros Yigzaw , Kai Cheng , Mohan J. Kumar , Jose A. Vargas , Gopikrishna Jandhyala
IPC分类号： G06F11/263
CPC分类号： G06F11/263 , G06F11/3664 , G06F11/3688
摘要： Disclosed is an apparatus and a method to inject errors to a memory. In one embodiment, a dedicated interface includes an error injection system address register and an error injection mask register coupled to the error injection system address register. If the error injection system address register includes a system address that matches an incoming write address, the error injection mask register outputs an error to the memory.
摘要翻译：公开了一种向存储器注入错误的装置和方法。在一个实施例中，专用接口包括错误注入系统地址寄存器和耦合到错误注入系统地址寄存器的错误注入掩模寄存器。如果错误注入系统地址寄存器包含与输入写入地址匹配的系统地址，则错误注入掩码寄存器会向存储器输出错误。

79. 发明授权

US08373204B2 Semiconductor device and method of manufacturing thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08373204B2
公开(公告)日：2013-02-12
申请号：US12916346
申请日：2010-10-29
申请人： Kai Cheng , Stefan Degroote
发明人： Kai Cheng , Stefan Degroote
IPC分类号： H01L27/148
CPC分类号： H01L21/02389 , H01L21/02422 , H01L21/0245 , H01L21/02458 , H01L21/0254 , H01L21/02639 , H01L29/0649 , H01L29/2003 , H01L29/66477 , H01L29/7786
摘要： A semiconductor device and method of manufacturing the device is disclosed. In one aspect, the device includes a semiconductor substrate and a GaN-type layer stack on top of the semiconductor substrate. The GaN-type layer stack has at least one buffer layer, a first active layer and a second active layer. Active device regions are definable at an interface of the first and second active layer. The semiconductor substrate is present on an insulating layer and is patterned to define trenches according to a predefined pattern, which includes at least one trench underlying the active device region. The trenches extend from the insulating layer into at least one buffer layer of the GaN-type layer stack and are overgrown within the at least one buffer layer, so as to obtain that the first and the second active layer are continuous at least within the active device regions.
摘要翻译：公开了一种半导体器件及其制造方法。一方面，该器件在半导体衬底的顶部上包括半导体衬底和GaN型层叠层。 GaN型层堆叠具有至少一个缓冲层，第一有源层和第二有源层。有源器件区可以在第一和第二有源层的界面处被定义。半导体衬底存在于绝缘层上，并被图案化以根据预定图案限定沟槽，其包括位于有源器件区域下方的至少一个沟槽。沟槽从绝缘层延伸到GaN型层堆叠的至少一个缓冲层中，并且在至少一个缓冲层内长满，以便获得第一和第二活性层至少在活性物质内连续设备区域。

80. 发明申请

US20130007560A1 RANK-SPECIFIC CYCLIC REDUNDANCY CHECK 有权
标题翻译：特殊循环冗余检查
公开(公告)号：US20130007560A1
公开(公告)日：2013-01-03
申请号：US13175472
申请日：2011-07-01
申请人： Ramesh Subashchandrabose , Tessil Thomas , Sambaran Mitra , Debaleena Das , Kai Cheng
发明人： Ramesh Subashchandrabose , Tessil Thomas , Sambaran Mitra , Debaleena Das , Kai Cheng
IPC分类号： H03M13/00 , G06F11/10
CPC分类号： H03M13/03 , G06F11/10 , G06F11/1004 , G06F11/1008 , G06F11/1016 , G06F11/1064 , G06F11/1068 , G06F11/1072 , G06F11/1076 , G06F12/02 , G11C8/12 , G11C29/00 , H03M13/09 , H03M13/15 , H03M13/19 , H04L1/0061
摘要： Embodiments of the present disclosure describe methods, apparatus, and system configurations for providing rank-specific cyclic redundancy checks in memory systems.
摘要翻译：本公开的实施例描述了用于在存储器系统中提供排名特定循环冗余校验的方法，装置和系统配置。

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