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    • 71. 发明授权
    • Selectively accelerated plating of metal features
    • 选择性加速电镀金属功能
    • US07449099B1
    • 2008-11-11
    • US10947085
    • 2004-09-21
    • Steven T. MayerJohn Stephen Drewery
    • Steven T. MayerJohn Stephen Drewery
    • C25D5/02
    • H05K3/243H05K3/108H05K2201/0367H05K2201/09745H05K2203/0392H05K2203/122
    • To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the workpiece to form a raised field region in said first plating region and a recessed region in said first non-plating region. Then, an accelerator film is applied globally on the workpiece. A portion of the accelerator film is selectively removed from the field region, and another portion of the accelerator film remains in the recessed acceleration region. Then, metal is deposited onto the workpiece, and the metal deposits at an accelerated rate in the acceleration region, resulting in a greater thickness of metal in the acceleration region compared to metal in the non-activated field region. Then, metal is completely removed from the field region, thereby forming the metal feature.
    • 为了制造金属特征,将不可镀层施加到工件表面,然后被图案化以形成第一镀层区域和第一非镀层区域。 然后,金属沉积在工件上,以在所述第一镀覆区域中形成凸起区域,并在所述第一非镀覆区域中形成凹陷区域。 然后,加工膜全部应用于工件上。 加速膜的一部分从场区域选择性地去除,并且加速膜的另一部分残留在凹入加速区域中。 然后,金属沉积在工件上,并且金属在加速区域中以加速的速率沉积,导致与非激活场区域中的金属相比,加速区域中的金属厚度更大。 然后,从场区域中完全去除金属,从而形成金属特征。
    • 72. 发明授权
    • Method and apparatus for potential controlled electroplating of fine patterns on semiconductor wafers
    • 用于在半导体晶片上精细图案的电位控制电镀的方法和装置
    • US07211175B1
    • 2007-05-01
    • US10365577
    • 2003-02-11
    • Steven T. MayerJonathan ReidRobert Contolini
    • Steven T. MayerJonathan ReidRobert Contolini
    • C25B15/02C25D17/00
    • C25D17/001C25D17/005C25D21/12H01L21/2885H01L21/76877
    • Controlled-potential electroplating provides an effective method of electroplating metals onto the surfaces of high aspect ratio recessed features of integrated circuit devices. Methods are provided to mitigate corrosion of a metal seed layer on recessed features due to contact of the seed layer with an electrolyte solution. The potential can also be controlled to provide conformal plating over the seed layer and bottom-up filling of the recessed features. For each of these processes, a constant cathodic voltage, pulsed cathodic voltage, or ramped cathodic voltage can be used. An apparatus for controlled-potential electroplating includes a reference electrode placed near the surface to be plated and at least one cathode sense lead to measure the potential at points on the circumference of the integrated circuit structure.
    • 控制电位电镀提供了将金属电镀到集成电路器件的高纵横比凹陷特征的表面上的有效方法。 提供了一种方法,用于减轻由于种子层与电解质溶液的接触而导致的凹陷特征上的金属种子层的腐蚀。 还可以控制电位以在种子层上提供适形电镀,并且自下而上地填充凹陷特征。 对于这些处理中的每一个,可以使用恒定的阴极电压,脉冲阴极电压或斜坡阴极电压。 用于控制电位电镀的装置包括放置在待镀表面附近的参考电极和至少一个阴极检测引线,以测量集成电路结构的圆周上的点处的电位。
    • 75. 发明授权
    • Method and apparatus for spatially uniform electropolishing and
electrolytic etching
    • 用于空间均匀电解和电解蚀刻的方法和装置
    • US5096550A
    • 1992-03-17
    • US597225
    • 1990-10-15
    • Steven T. MayerRobert J. ContoliniAnthony F. Bernhardt
    • Steven T. MayerRobert J. ContoliniAnthony F. Bernhardt
    • C25F3/02C25F3/16C25F7/00
    • C25F7/00C25F3/02C25F3/16Y10S204/07
    • In an electropolishing or electrolytic etching apparatus the anode is separated from the cathode to prevent bubble transport to the anode and to produce a uniform current distribution at the anode by means of a solid nonconducting anode-cathode barrier. The anode extends into the top of the barrier and the cathode is outside the barrier. A virtual cathode hole formed in the bottom of the barrier below the level of the cathode permits current flow while preventing bubble transport. The anode is rotatable and oriented horizontally facing down. An extended anode is formed by mounting the workpiece in a holder which extends the electropolishing or etching area beyond the edge of the workpiece to reduce edge effects at the workpiece. A reference electrode controls cell voltage. Endpoint detection and current shut-off stop polishing. Spatially uniform polishing or etching can be rapidly performed.
    • 在电解抛光或电解蚀刻装置中,阳极与阴极分离,以防止气泡传输到阳极,并通过固体非导电阳极 - 阴极屏障在阳极处产生均匀的电流分布。 阳极延伸到屏障的顶部,阴极在屏障外。 形成在阴极底部的阴极底部的虚拟阴极孔允许电流流动,同时防止气泡输送。 阳极可旋转并水平定向朝下。 扩展阳极通过将工件安装在将电解抛光或蚀刻区域延伸超过工件边缘的保持器中形成,以减少工件的边缘效应。 参考电极控制电池电压。 端点检测和电流切断停止抛光。 可以快速进行空间均匀的抛光或蚀刻。
    • 79. 发明申请
    • CLEANING ELECTROPLATING SUBSTRATE HOLDERS USING REVERSE CURRENT DEPLATING
    • 使用反向电流去除清洁电镀基板支架
    • US20130256146A1
    • 2013-10-03
    • US13853935
    • 2013-03-29
    • Lee Peng ChuaSteven T. MayerThomas A. PonnuswamySantosh Kumar
    • Lee Peng ChuaSteven T. MayerThomas A. PonnuswamySantosh Kumar
    • C25F1/00
    • C25F1/00C25D17/001C25D17/06C25D21/00C25D21/12C25F7/00H01L21/67766H01L21/67769H01L21/68707Y10S901/02
    • Provided are cleaning methods and systems to remove unintended metallic deposits from electroplating apparatuses using reverse current deplating techniques. Such cleaning involves positioning a cleaning (deplating) disk in an electroplating cup similar to a regular processed substrate. The front surface of the cleaning disk includes a corrosion resistant conductive material to form electrical connections to deposits on the cup's surfaces. The disk is sealed in the cup and submerged into a plating solution. A reverse current is then applied to the front conductive surface of the disk to initiate deplating of the deposits. Sealing compression in the cup may change during cleaning to cause different deformation of the lip seal and to form new electrical connections to the deposits. The proposed cleaning may be applied to remove deposits formed during electroplating of alloys, in particular, tin-silver alloys widely used for semiconductor and wafer level packaging.
    • 提供了使用反向电流去除技术从电镀设备中除去非预期的金属沉积物的清洁方法和系统。 这样的清洁包括将清洁(脱落)盘定位在类似于经常处理的基底的电镀杯中。 清洁盘的前表面包括耐腐蚀的导电材料以形成电连接以沉积在杯的表面上。 将盘密封在杯中并浸没在电镀液中。 然后将反向电流施加到盘的前导电表面以开始沉积物的脱落。 杯子内的密封压缩可能在清洁过程中发生变化,导致唇形密封件发生不同的变形,并形成与沉积物的新的电气连接。 所提出的清洁可以用于去除在电镀期间形成的沉积物,特别是广泛用于半导体和晶片级封装的锡 - 银合金。