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71. 发明申请

US20110156096A1 Lateral Insulated Gate Bipolar Transistor (LIGBT) 失效
标题翻译：侧面绝缘栅双极晶体管（LIGBT）
公开(公告)号：US20110156096A1
公开(公告)日：2011-06-30
申请号：US12648847
申请日：2009-12-29
申请人： Florin Udrea , Vasantha Pathirana , Tanya Trajkovic , Nishad Udugampola
发明人： Florin Udrea , Vasantha Pathirana , Tanya Trajkovic , Nishad Udugampola
IPC分类号： H01L29/739 , H01L21/331
CPC分类号： H01L29/7394 , H01L29/402
摘要： This invention generally relates to LIGBTs, ICs comprising an LIGBT and methods of forming an LIGBT, and more particularly to an LIGBT comprising a substrate region of first conductivity type and peak dopant concentration less than about 1×1017/cm3; a lateral drift region of a second, opposite conductivity type adjacent the substrate region and electrically coupled to said substrate region; a charge injection region of the first conductivity type to inject charge toward said lateral drift region; a gate to control flow of said charge in said lateral drift region; metal enriched adhesive below said substrate region; and an intermediate layer below said substrate region to substantially suppress charge injection into said substrate region from said metal enriched adhesive.
摘要翻译：本发明一般涉及LIGBT，包含LIGBT的IC和形成LIGBT的方法，更具体地涉及包含第一导电类型的衬底区域和小于约1×1017 / cm3的峰值掺杂剂浓度的LIGBT; 邻近所述衬底区域的第二相反导电类型的横向漂移区域，并电耦合到所述衬底区域; 第一导电类型的电荷注入区域，用于向所述横向漂移区域注入电荷; 用于控制所述横向漂移区域中的所述电荷的流动的门; 在所述衬底区域下面的富含金属的粘合剂; 以及在所述衬底区域下面的中间层，以基本上抑制从所述金属富集粘合剂向所述衬底区域注入电荷。

72. 发明申请

US20110057230A1 Lateral Insulated Gate Bipolar Transistors (LIGBTS) 失效
标题翻译：侧面绝缘栅双极晶体管（LIGBTS）
公开(公告)号：US20110057230A1
公开(公告)日：2011-03-10
申请号：US12648818
申请日：2009-12-29
申请人： Florin Udrea , Vasantha Pathirana , Tanya Trajkovic , Nishad Udugampola
发明人： Florin Udrea , Vasantha Pathirana , Tanya Trajkovic , Nishad Udugampola
IPC分类号： H01L29/739 , H01L21/761 , H01L21/331
CPC分类号： H01L29/7394 , H01L29/66325 , H01L29/7393
摘要： This invention generally relates to lateral insulated gate bipolar transistors (LIGBTs), for example in integrated circuits, methods of increasing switching speed of an LIGBT, a method of suppressing parasitic thyristor latch-up in a bulk silicon LIGBT, and methods of fabricating an LIGBT. In particular, a method of suppressing parasitic thyristor latch-up in a bulk silicon LIGBT comprises selecting a current gain αv for a vertical transistor of a parasitic thyristor of the LIGBT such that in at least one predetermined mode of operation of the LIGBT αv
摘要翻译：本发明一般涉及横向绝缘栅双极晶体管（LIGBT），例如在集成电路中，提高LIGBT的开关速度的方法，抑制体硅LIGBT中的寄生晶闸管闩锁的方法以及制造LIGBT的方法。特别地，抑制体硅LIGBT中的寄生晶闸管闩锁的方法包括为LIGBT的寄生晶闸管的垂直晶体管选择电流增益αv，使得在LIGBT的至少一个预定操作模式中，αv<1 -αp，其中αp是具有由半导体表面和富含金属的环氧树脂芯片之间的肖特基接触形成的基极 - 发射极结的寄生双极晶体管的电流增益。

73. 发明申请

US20100242592A1 SHEAR STRESS SENSORS 有权
标题翻译：剪应变传感器
公开(公告)号：US20100242592A1
公开(公告)日：2010-09-30
申请号：US12739520
申请日：2008-10-24
申请人： Ibraheem Haneef , Howard P. Hodson , Robert Miller , Florin Udrea
发明人： Ibraheem Haneef , Howard P. Hodson , Robert Miller , Florin Udrea
IPC分类号： G01F1/692 , C03C15/00
CPC分类号： G01F1/6845 , G01F1/7084 , G01N3/24 , G01N2203/0226 , G01N2203/0623
摘要： This invention relates to hot film shear stress sensors and their fabrication. We describe a hot film shear stress sensor comprising a silicon substrate supporting a membrane having a cavity underneath, said membrane bearing a film of metal and having electrical contacts for heating said film, and wherein said membrane comprises a silicon oxide membrane, where in said metal comprises aluminium or tungsten, and wherein said membrane has a protective layer of a silicon-based material over said film of metal. In preferred embodiments the sensor is fabricated by a CMOS process and the metal comprises aluminium or tungsten.
摘要翻译：本发明涉及热膜剪切应力传感器及其制造。我们描述了一种热膜剪切应力传感器，其包括支撑具有下面空腔的膜的硅衬底，所述膜承载金属膜并具有用于加热所述膜的电触点，并且其中所述膜包括氧化硅膜，其中在所述金属包括铝或钨，并且其中所述膜在所述金属膜上具有硅基材料的保护层。在优选实施例中，传感器通过CMOS工艺制造，并且金属包括铝或钨。

74. 发明申请

US20090283796A1 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME 有权
标题翻译：半导体器件及其形成方法
公开(公告)号：US20090283796A1
公开(公告)日：2009-11-19
申请号：US12186966
申请日：2008-08-06
申请人： Florin Udrea , Chih-Wei Hsu
发明人： Florin Udrea , Chih-Wei Hsu
IPC分类号： H01L29/739
CPC分类号： H01L29/7397 , H01L29/0834 , H01L29/66348
摘要： A bipolar high voltage/power semiconductor device having a low voltage terminal and a high voltage terminal is disclosed. The bipolar high voltage/power semiconductor is a vertical insulated gate bipolar transistor with injection efficiency adjustment formed by highly doped n+ islands in a p+ anode layer. The device has a vertical drift region of a first conductivity type and having vertical first and second ends. In one example, a region of the second conductivity type is provided at the second end of the vertical drift region connected directly to the vertical high voltage terminal. In another example, a vertical buffer region of the first conductivity type is provided at the vertical second end of the vertical drift region and a vertical region of a second conductivity type is provided on the other side of the vertical buffer region and connected to the vertical high voltage terminal. A plurality of electrically floating lateral island regions are provided within the vertical drift region at or towards the vertical second end of the vertical drift region, the plurality of electrically floating lateral island regions being of the first conductivity type and being more highly doped than the drift region.
摘要翻译：公开了一种具有低电压端子和高电压端子的双极型高压/功率半导体器件。双极性高压/功率半导体是垂直绝缘栅双极晶体管，其具有由p +阳极层中的高掺杂n +岛形成的注入效率调节。该器件具有第一导电类型的垂直漂移区，并具有垂直的第一和第二端。在一个示例中，第二导电类型的区域设置在直接连接到垂直高压端子的垂直漂移区域的第二端。在另一示例中，第一导电类型的垂直缓冲区域设置在垂直漂移区域的垂直第二端，并且第二导电类型的垂直区域设置在垂直缓冲区域的另一侧并连接到垂直方向高压端子。多个电浮动横向岛区域设置在垂直漂移区域内或垂直于垂直漂移区域的垂直第二端处，多个电浮动横向岛区域是第一导电类型并且比漂移更高的掺杂地区。

75. 发明授权

US07531875B2 Lateral SOI semiconductor device 有权
标题翻译：横向SOI半导体器件
公开(公告)号：US07531875B2
公开(公告)日：2009-05-12
申请号：US10556927
申请日：2003-05-13
申请人： Florin Udrea , David Garner
发明人： Florin Udrea , David Garner
IPC分类号： H01L29/94
CPC分类号： H01L29/7824 , H01L29/0653 , H01L29/0692 , H01L29/0696 , H01L29/7394 , H01L29/8086 , H01L29/861
摘要： This invention is generally concerned with semiconductor-on-insulator devices, particularly for high voltage applications. A lateral semiconductor-on-insulator device is described, comprising: a semiconductor substrate; an insulating layer on said semiconductor substrate; and a lateral semiconductor device on said insulator; said lateral semiconductor device having: a first region of a first conductivity type; a second region of a second conductivity type laterally spaced apart from said first region; and a drift region extending in a lateral direction between said first region and said second region; and wherein said drift region comprises at least one first zone and at least one second zone adjacent a said first zone, a said first zone having said second conductivity type, a said second zone being an insulating zone, a said first zone being tapered to narrow towards said first region.
摘要翻译：本发明通常涉及绝缘体上半导体器件，特别是对于高电压应用。描述了一种绝缘体侧向半导体器件，包括：半导体衬底; 在所述半导体衬底上的绝缘层; 和在所述绝缘体上的横向半导体器件; 所述横向半导体器件具有：第一导电类型的第一区域; 与所述第一区域横向间隔开的第二导电类型的第二区域; 以及在所述第一区域和所述第二区域之间沿横向方向延伸的漂移区域; 并且其中所述漂移区包括至少一个第一区和邻近所述第一区的至少一个第二区，具有所述第二导电类型的所述第一区，所述第二区是绝缘区，所述第一区逐渐缩窄朝向第一个地区。

76. 发明授权

US07381606B2 Semiconductor device and method of forming a semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07381606B2
公开(公告)日：2008-06-03
申请号：US11873966
申请日：2007-10-17
申请人： Florin Udrea
发明人： Florin Udrea
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/8238
CPC分类号： H01L29/7394 , H01L29/0839 , H01L29/7432 , H01L29/745 , H01L29/861 , H01L29/872
摘要： A bipolar high voltage/power semiconductor device has a low voltage terminal and a high voltage terminal. The device has a drift region of a first conductivity type and having first and second ends. In one example, a region of the second conductivity type is provided at the second end of the drift region connected directly to the high voltage terminal. In another example, a buffer region of the first conductivity type is provided at the second end of the drift region and a region of a second conductivity type is provided on the other side of the buffer region and connected to the high voltage terminal. Plural electrically floating island regions are provided within the drift region at or towards the second end of the drift region, the plural electrically floating island regions being of the first conductivity type and being more highly doped than the drift region.
摘要翻译：双极高压/功率半导体器件具有低电压端子和高压端子。该器件具有第一导电类型的漂移区，并具有第一和第二端。在一个示例中，第二导电类型的区域设置在直接连接到高电压端子的漂移区域的第二端。在另一示例中，第一导电类型的缓冲区设置在漂移区的第二端，并且第二导电类型的区域设置在缓冲区的另一侧并连接到高压端。在漂移区域内或漂移区域的第二端处设置多个电浮岛区域，多个电浮岛区域是第一导电类型并且比漂移区域更加掺杂。

77. 发明申请

US20080054439A1 Power electronic package having two substrates with multiple semiconductor chips and electronic components 有权
标题翻译：具有两个具有多个半导体芯片和电子部件的基板的电力电子封装
公开(公告)号：US20080054439A1
公开(公告)日：2008-03-06
申请号：US11511516
申请日：2006-08-29
申请人： Rajesh Kumar Malhan , C. Mark Johnson , Cyril Buttay , Jeremy Rashid , Florin Udrea
发明人： Rajesh Kumar Malhan , C. Mark Johnson , Cyril Buttay , Jeremy Rashid , Florin Udrea
IPC分类号： H01L23/48
CPC分类号： H01L23/49844 , H01L23/5385 , H01L24/31 , H01L24/83 , H01L25/072 , H01L25/18 , H01L2224/33 , H01L2224/81894 , H01L2224/83801 , H01L2224/83894 , H01L2924/01079 , H01L2924/12032 , H01L2924/1305 , H01L2924/13055 , H01L2924/13062 , H01L2924/13091 , H01L2924/00
摘要： A power electronic package includes: first and second high thermal conductivity insulating non-planar substrates; and multiple semiconductor chips and electronic components between the substrates. Each substrate includes multiple electrical insulator layers and patterned electrical conductor layers connecting to the electronic components, and further includes multiple raised regions or posts, which are bonded together so that the substrates are mechanically and electrically connected. The number, arrangement, and shape of the raised regions or posts are adjusted to have mechanical separation between the substrates. The electrical conductor layers are separated and isolated one another so that multiple electric circuits are provided on at least one of the substrates.
摘要翻译：电力电子封装包括：第一和第二高导热绝缘非平面基板; 以及基板之间的多个半导体芯片和电子部件。每个衬底包括多个电绝缘体层和连接到电子部件的图案化电导体层，并且还包括多个凸起区域或柱体，这些凸起区域或柱体被结合在一起，使得衬底机械地和电连接。调整凸起区域或柱的数量，布置和形状以在基板之间具有机械分离。电导体层彼此分离和隔离，使得在至少一个基板上设置多个电路。

78. 发明申请

US20070120187A1 Lateral soi semiconductor device 有权
标题翻译：侧面半导体器件
公开(公告)号：US20070120187A1
公开(公告)日：2007-05-31
申请号：US10556927
申请日：2003-05-13
申请人： Florin Udrea , David Garner
发明人： Florin Udrea , David Garner
IPC分类号： H01L27/12 , H01L27/01 , H01L31/0392
CPC分类号： H01L29/7824 , H01L29/0653 , H01L29/0692 , H01L29/0696 , H01L29/7394 , H01L29/8086 , H01L29/861
摘要： This invention is generally concerned with semiconductor-on-insulator devices, particularly for high voltage applications. A lateral semiconductor-on-insulator device is described, comprising: a semiconductor substrate; an insulating layer on said semiconductor substrate; and a lateral semiconductor device on said insulator; said lateral semiconductor device having: a first region of a first conductivity type; a second region of a second conductivity type laterally spaced apart from said first region; and a drift region extending in a lateral direction between said first region and said second region; and wherein said drift region comprises at least one first zone and at least one second zone adjacent a said first zone, a said first zone having said second conductivity type, a said second zone being an insulating zone, a said first zone being tapered to narrow towards said first region.
摘要翻译：本发明通常涉及绝缘体上半导体器件，特别是对于高电压应用。描述了一种绝缘体侧向半导体器件，包括：半导体衬底; 在所述半导体衬底上的绝缘层; 和在所述绝缘体上的横向半导体器件; 所述横向半导体器件具有：第一导电类型的第一区域; 与所述第一区域横向间隔开的第二导电类型的第二区域; 以及在所述第一区域和所述第二区域之间沿横向方向延伸的漂移区域; 并且其中所述漂移区包括至少一个第一区和邻近所述第一区的至少一个第二区，具有所述第二导电类型的所述第一区，所述第二区是绝缘区，所述第一区逐渐缩窄朝向第一个地区。

79. 发明申请

US20070102708A1 Semiconductor device provided by silicon carbide substrate and method for manufacturing the same 有权
标题翻译：由碳化硅衬底提供的半导体器件及其制造方法
公开(公告)号：US20070102708A1
公开(公告)日：2007-05-10
申请号：US11594896
申请日：2006-11-09
申请人： Rajesh Kumar , Florin Udrea , Andrei Mihaila
发明人： Rajesh Kumar , Florin Udrea , Andrei Mihaila
IPC分类号： H01L31/0312 , H01L29/76
CPC分类号： H01L29/66068 , H01L27/0705 , H01L27/088 , H01L29/1608 , H01L29/808 , H01L29/8083
摘要： A semiconductor device includes a first field effect transistor including a source and a gate and disposed in a silicon carbide substrate; and a second field effect transistor including a drain and a gate and disposed in the substrate. The drain of the second field effect transistor connects to the source of the first field effect transistor. The gate of the second field effect transistor connects to the gate of the first field effect transistor.
摘要翻译：半导体器件包括：第一场效应晶体管，其包括源极和栅极，并设置在碳化硅衬底中; 以及包括漏极和栅极并设置在所述衬底中的第二场效应晶体管。第二场效应晶体管的漏极连接到第一场效应晶体管的源极。第二场效应晶体管的栅极连接到第一场效应晶体管的栅极。

80. 发明授权

US07154130B2 Semiconductor device provided by silicon carbide substrate and method for manufacturing the same 有权
公开(公告)号：US07154130B2
公开(公告)日：2006-12-26
申请号：US10776338
申请日：2004-02-12
申请人： Rajesh Kumar , Florin Udrea , Andrei Mihaila
发明人： Rajesh Kumar , Florin Udrea , Andrei Mihaila
IPC分类号： H01L29/74 , H01L31/111
CPC分类号： H01L29/66068 , H01L27/0705 , H01L27/088 , H01L29/1608 , H01L29/808 , H01L29/8083
摘要： A semiconductor device includes a first field effect transistor including a source and a gate and disposed in a silicon carbide substrate; and a second field effect transistor including a drain and a gate and disposed in the substrate. The drain of the second field effect transistor connects to the source of the first field effect transistor. The gate of the second field effect transistor connects to the gate of the first field effect transistor.

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