会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 75. 发明申请
    • PSRAM for performing write-verify-read function
    • PSRAM用于执行写入验证读取功能
    • US20050201167A1
    • 2005-09-15
    • US10876778
    • 2004-06-28
    • Sang LeeTae Kwon
    • Sang LeeTae Kwon
    • G11C11/4193G11C7/00
    • G11C11/40615G11C8/10G11C11/401G11C29/50016
    • A PSRAM performs a Write-Verify-Read function at a test mode, thereby easily analyzing defects. The PSRAM comprises a test mode decoder, a refresh control block and a precharge control block. The test mode decoder generates a test mode control signal for performing a WVR function when a test mode starts. The refresh control block selectively performs a refresh operation in response to the test mode control signal. The precharge control block selectively performs a precharge operation in response to the test mode control signal outputted from the test mode decoder. Here, the test mode control signal is activated at the test mode so that the refresh operation and the precharge operation are not performed.
    • PSRAM在测试模式下执行写入验证读取功能,从而轻松分析缺陷。 PSRAM包括测试模式解码器,刷新控制块和预充电控制块。 当测试模式开始时,测试模式解码器产生用于执行WVR功能的测试模式控制信号。 刷新控制块根据测试模式控制信号有选择地执行刷新操作。 预充电控制块响应于从测试模式解码器输出的测试模式控制信号选择性地执行预充电操作。 这里,在测试模式下激活测试模式控制信号,使得不执行刷新操作和预充电操作。
    • 77. 发明申请
    • Voltage-controlled oscillator using current feedback network
    • 使用电流反馈网络的压控振荡器
    • US20050156682A1
    • 2005-07-21
    • US10957749
    • 2004-10-05
    • Ja LeeSang LeeJin KangSeung Oh
    • Ja LeeSang LeeJin KangSeung Oh
    • H03B5/08H03B1/00H03B5/12
    • H03B5/1231H03B5/1215H03B5/1221H03B5/1243
    • Provided is a voltage-controlled oscillator (VCO) using a current feedback network for use in a wireless communication terminal. The voltage-controlled oscillator has high input impedance and low output impedance, so that a degree of isolation from the external load is excellent, thereby preventing degradation of the Q-factor by the load in overall oscillation circuit. In the voltage-controlled oscillator of the present invention, an LC resonator is provided to generate positive feedback, and negative resistance may be obtained at a wider frequency range by tuning a varactor of the LC resonator. And a boosting inductor is inserted into the positive feedback loop to have a greater negative resistance, therefore it is possible to prevent a problem in which the oscillation does not occur due to the parasitic resistance components generated during circuit fabrication.
    • 提供了一种使用电流反馈网络在无线通信终端中使用的压控振荡器(VCO)。 压控振荡器具有高输入阻抗和低输出阻抗,使得与外部负载的隔离度优异,从而防止整个振荡电路中的负载对Q因子的劣化。 在本发明的压控振荡器中,设置LC谐振器以产生正反馈,并且通过调谐LC谐振器的变容二极管可以在更宽的频率范围内获得负电阻。 并且将增压电感器插入到正反馈回路中以具有更大的负电阻,因此可以防止由于在电路制造期间产生的寄生电阻分量而不发生振荡的问题。
    • 78. 发明申请
    • Method for forming dual gate electrodes using damascene gate process
    • 使用镶嵌门工艺形成双栅电极的方法
    • US20050153493A1
    • 2005-07-14
    • US11017762
    • 2004-12-22
    • Sang Lee
    • Sang Lee
    • H01L29/423H01L21/336H01L21/8234H01L21/8238H01L27/092H01L29/49H01L29/78H01L21/337
    • H01L21/28202H01L21/82345H01L21/823462H01L29/665H01L29/66545H01L29/6656H01L29/6659H01L29/7833
    • A method for forming dual gate electrodes using a damascene gate process is disclosed. A disclosed method comprises: growing a first gate oxide layer on a semiconductor substrate; performing a thermal treatment for a first gate oxide layer; removing a predetermined part of the first gate oxide layer until the top surface of the semiconductor substrate is exposed; growing a second gate oxide layer as a thin oxide layer on the exposed semiconductor substrate, thereby making the first gate oxide layer as a thick oxide layer; depositing polysilicon on the entire surface of the semiconductor substrate and forming dummy gates through a photolithography and an etching processes; forming sidewall spacers on the lateral faces of the dummy gates; forming source and drain regions in the substrate under both sides of the dummy gates; removing the dummy gates and the second gate oxide layer; forming an insulating layer where the second gate oxide layer is removed; performing a thermal treatment for the insulating layer; filling polysilicon for gate electrodes where the dummy gates were removed; and planarizing the resulting structure until the gate electrodes are exposed.
    • 公开了一种使用镶嵌门工艺形成双栅电极的方法。 所公开的方法包括:在半导体衬底上生长第一栅极氧化物层; 对第一栅极氧化物层进行热处理; 去除第一栅极氧化物层的预定部分直到半导体衬底的顶表面露出; 在暴露的半导体衬底上生长第二栅极氧化物层作为薄氧化物层,从而使第一栅氧化层作为厚氧化物层; 在半导体衬底的整个表面上沉积多晶硅,并通过光刻和蚀刻工艺形成伪栅极; 在所述伪栅极的侧面上形成侧壁间隔物; 在所述虚拟栅极的两侧形成在所述衬底中的源区和漏区; 去除伪栅极和第二栅极氧化物层; 形成除去第二栅极氧化物层的绝缘层; 对绝缘层进行热处理; 为去除虚拟栅极的栅电极填充多晶硅; 并平坦化所得到的结构,直到栅电极露出。
    • 80. 发明申请
    • Detection of a defective disk of a hard disk drive
    • 检测硬盘驱动器的故障磁盘
    • US20050117241A1
    • 2005-06-02
    • US10698866
    • 2003-10-30
    • Geng WangSang Lee
    • Geng WangSang Lee
    • G11B5/09G11B20/18G11B27/36
    • G11B27/36G11B20/1816G11B2220/2516
    • A method and apparatus for detecting a defective disk for a hard disk drive. The method includes placing a disk into a tester so that a first side of the disk is adjacent to a first head of the tester and a second side of the disk is adjacent to a second head. First data is read from the first side of the disk, and second data is read from the second side of the disk. The disk is then flipped so that the second side is adjacent to the first head and the first side is adjacent to the second head. Third data is read from the first side. Fourth data is read from the second side. A first area between a curve generated from the first data and a curve generated from the third data is calculated. Likewise, a second area is calculated between a curve generated from the second data and a curve generated from the fourth data. An average of the first and second areas is then calculated and used to detect a defective disk.
    • 一种用于检测用于硬盘驱动器的有缺陷的盘的方法和装置。 该方法包括将盘放入测试器中,使得盘的第一侧与测试器的第一头相邻,并且盘的第二侧与第二头相邻。 从盘的第一侧读取第一数据,从盘的第二侧读取第二数据。 然后将盘翻转,使得第二侧与第一头相邻,并且第一侧与第二头相邻。 从第一侧读取第三数据。 从第二侧读取第四数据。 计算从第一数据生成的曲线与从第三数据生成的曲线之间的第一区域。 类似地,在从第二数据产生的曲线和从第四数据生成的曲线之间计算第二区域。 然后计算第一和第二区域的平均值,并用于检测有缺陷的盘。