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71. 发明授权

US08130535B2 Flexible word-line pulsing for STT-MRAM 有权
标题翻译：灵活的字线脉冲STT-MRAM
公开(公告)号：US08130535B2
公开(公告)日：2012-03-06
申请号：US12551874
申请日：2009-09-01
申请人： Hari M. Rao , Sei Seung Yoon , Medhi Sani , Seung Duk Lee , Sung Cho
发明人： Hari M. Rao , Sei Seung Yoon , Medhi Sani , Seung Duk Lee , Sung Cho
IPC分类号： G11C11/00
CPC分类号： G11C29/56 , G11C29/12015 , G11C29/56012
摘要： A method for generating a variable pulse width signal on an integrated circuit (IC) chip, includes receiving a first clock signal on the IC chip and receiving a second clock signal on the IC chip having a variable delay relative to the first clock signal. A signal having a rising edge triggered by a rising edge of the first clock signal and a falling edge triggered by a rising edge of the second clock signal is output. The output signal is provided to circuitry on the chip, such as a magnetoresistive junction (MTJ) cell of a spin torque transfer magnetic random access memory (STT-MRAM).
摘要翻译：一种用于在集成电路（IC）芯片上产生可变脉冲宽度信号的方法，包括在IC芯片上接收第一时钟信号，并且在IC芯片上接收相对于第一时钟信号具有可变延迟的第二时钟信号。输出具有由第一时钟信号的上升沿触发的上升沿和由第二时钟信号的上升沿触发的下降沿的信号。输出信号被提供给芯片上的电路，例如自旋扭矩传递磁随机存取存储器（STT-MRAM）的磁阻结（MTJ）单元。

72. 发明授权

US08130534B2 System and method to read and write data a magnetic tunnel junction element 有权
标题翻译：在磁性隧道结元件上读取和写入数据的系统和方法
公开(公告)号：US08130534B2
公开(公告)日：2012-03-06
申请号：US12350304
申请日：2009-01-08
申请人： Mohamed Hassan Abu-Rahma , Seung-Chul Song , Sei Seung Yoon , Dongkyu Park , Cheng Zhong , Anosh B. Davierwalla
发明人： Mohamed Hassan Abu-Rahma , Seung-Chul Song , Sei Seung Yoon , Dongkyu Park , Cheng Zhong , Anosh B. Davierwalla
IPC分类号： G11C11/00
CPC分类号： G11C11/1675 , G11C11/1657 , G11C11/1659 , G11C11/1673
摘要： A system and method to read and write data in magnetic random access memories are disclosed. In a particular embodiment, a device includes a spin transfer torque magnetic tunnel junction (STT-MTJ) element and a transistor with a first gate and a second gate coupled to the STT-MTJ element.
摘要翻译：公开了一种在磁随机存取存储器中读取和写入数据的系统和方法。在特定实施例中，器件包括自旋转移转矩磁隧道结（STT-MTJ）元件和具有耦合到STT-MTJ元件的第一栅极和第二栅极的晶体管。

73. 发明申请

US20110317163A1 Method of Aligning a Wafer and Method of Monitoring a Lithography Process Including the Same 审中-公开
标题翻译：晶圆对准方法和包括其的平版印刷术的监控方法
公开(公告)号：US20110317163A1
公开(公告)日：2011-12-29
申请号：US13166327
申请日：2011-06-22
申请人： Seung-Yoon Lee , Jeong-Ho Yeo , Chan Hwang
发明人： Seung-Yoon Lee , Jeong-Ho Yeo , Chan Hwang
IPC分类号： G01B11/14
CPC分类号： G03F9/7046
摘要： A method of aligning a wafer includes irradiating light onto a plurality of alignment marks of a wafer, detecting signals outputted from the alignment marks to obtain alignment position offsets, selecting a set of the alignment marks corresponding to the alignment position offsets having a same or similar distribution, and aligning the wafer based the selected alignment marks.
摘要翻译：对准晶片的方法包括将光照射到晶片的多个对准标记上，检测从对准标记输出的信号以获得对准位置偏移，选择与具有相同或相似的对准位置偏移对应的一组对准标记分布和基于所选择的对准标记对齐晶片。

74. 发明授权

US08027206B2 Bit line voltage control in spin transfer torque magnetoresistive random access memory 有权
标题翻译：自旋传输转矩磁阻随机存取存储器中的位线电压控制
公开(公告)号：US08027206B2
公开(公告)日：2011-09-27
申请号：US12362500
申请日：2009-01-30
申请人： Sei Seung Yoon , Seung H. Kang
发明人： Sei Seung Yoon , Seung H. Kang
IPC分类号： G11C7/10
CPC分类号： G11C11/1673 , G11C11/1659
摘要： A Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) and associated read operations are disclosed. A bit cell includes a magnetic tunnel junction (MTJ) and a word line transistor, the bit cell being coupled to a bit line and a source line. A clamping circuit is coupled to the bit line and is configured to clamp the bit line voltage to a desired voltage level during a read operation of the STT-MRAM to prevent the bit line voltage from exceeding the desired voltage level. The desired voltage level is less than a write voltage threshold associated with a write operation of the STT-MRAM.
摘要翻译：公开了一种自旋转移力矩磁阻随机存取存储器（STT-MRAM）和相关读取操作。位单元包括磁性隧道结（MTJ）和字线晶体管，位单元耦合到位线和源极线。钳位电路耦合到位线，并且被配置为在STT-MRAM的读取操作期间将位线电压钳位到期望的电压电平，以防止位线电压超过期望的电压电平。期望的电压电平小于与STT-MRAM的写入操作相关联的写入电压阈值。

75. 发明授权

US08004880B2 Read disturb reduction circuit for spin transfer torque magnetoresistive random access memory 有权
标题翻译：用于自旋转移磁阻随机存取存储器的读干扰减小电路
公开(公告)号：US08004880B2
公开(公告)日：2011-08-23
申请号：US11771065
申请日：2007-06-29
申请人： Sei Seung Yoon , Seung H Kang , Medi Hamidi Sani
发明人： Sei Seung Yoon , Seung H Kang , Medi Hamidi Sani
IPC分类号： G11C11/00
CPC分类号： G11C7/02 , G11C7/062 , G11C7/067 , G11C7/12 , G11C11/1673
摘要： Systems, circuits and methods for reducing read disturbances in Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) are disclosed. A resistive element can be used during the read operation to control the read current and control read disturbances. An isolation element can be used to isolate the resistive element from the circuit during write operations.
摘要翻译：公开了用于减小转移转矩磁阻随机存取存储器（STT-MRAM）中的读取干扰的系统，电路和方法。在读取操作期间可以使用电阻元件来控制读取电流并控制读取干扰。隔离元件可用于在写入操作期间将电阻元件与电路隔离。

76. 发明申请

US20110193229A1 Multi-Chip Package Having Semiconductor Chips Of Different Thicknesses From Each Other And Related Device 有权
标题翻译：具有彼此不同厚度的半导体芯片和相关器件的多芯片封装
公开(公告)号：US20110193229A1
公开(公告)日：2011-08-11
申请号：US13013290
申请日：2011-01-25
申请人： Keum-Hee Ma , Woo-Dong Lee , Min-Seung Yoon , Ju-il Choi , Sang-Sick Park , Son-Kwan Hwang
发明人： Keum-Hee Ma , Woo-Dong Lee , Min-Seung Yoon , Ju-il Choi , Sang-Sick Park , Son-Kwan Hwang
IPC分类号： H01L23/48
CPC分类号： H01L25/0657 , H01L21/561 , H01L21/563 , H01L23/481 , H01L23/49816 , H01L2224/16145 , H01L2225/06513 , H01L2225/06541 , H01L2225/06555
摘要： A semiconductor device having semiconductor chips of different thicknesses is provided. The semiconductor device may include a first semiconductor chip, a sub-board on a first side of the first semiconductor chip, at least one second semiconductor chip on a second side of the first semiconductor chip, at least one external contact terminal on the at least one second semiconductor chip. In example embodiments the at least one second semiconductor chip may include a plurality of through silicon vias and the at least one external contact terminal may be in electrical contact with the first semiconductor chip and the at least one second semiconductor chip via the plurality of through silicon vias. In example embodiments, the at least one second semiconductor chip may be thinner than the first semiconductor chip.
摘要翻译：提供具有不同厚度的半导体芯片的半导体器件。半导体器件可以包括第一半导体芯片，在第一半导体芯片的第一侧上的子板，在第一半导体芯片的第二侧上的至少一个第二半导体芯片，至少一个外部接触端子一秒钟的半导体芯片。在示例实施例中，所述至少一个第二半导体芯片可以包括多个通孔硅通孔，并且所述至少一个外部接触端子可以经由多个通孔与第一半导体芯片和至少一个第二半导体芯片电接触通孔在示例实施例中，至少一个第二半导体芯片可以比第一半导体芯片更薄。

77. 发明申请

US20110165194A1 HBV Vaccine and a Process of Preparing the Same 有权
标题翻译： HBV疫苗及其制备方法
公开(公告)号：US20110165194A1
公开(公告)日：2011-07-07
申请号：US12225341
申请日：2008-01-28
申请人： Jung Sun Yum , Byung Cheol Ahn , Hyun Jin Jo , Dong Yeon Kim , Joo Youn Lee , Ki Hyun Kim , Jae Seung Yoon , Hong Mo Moon
发明人： Jung Sun Yum , Byung Cheol Ahn , Hyun Jin Jo , Dong Yeon Kim , Joo Youn Lee , Ki Hyun Kim , Jae Seung Yoon , Hong Mo Moon
IPC分类号： A61K39/29 , C12N15/09 , C12N5/10 , C12N1/21 , C12N15/63
CPC分类号： A61K39/292 , A61K39/12 , A61K2039/5258 , A61K2039/545 , A61K2039/55505 , A61K2039/57 , C07K14/005 , C12N2730/10122 , C12N2730/10134
摘要： The present invention relates to an HBV vaccine comprising an entire hepatitis B surface antigen of L protein, M protein and S protein, in which the produced antigens form virus-like particles, and a multi-antigen vaccine further comprising an HBV core antigen in addition to the entire surface antigen, and a method for preparing the same. The vaccines provide various epitopes and have excellent immunogenicity to induce a strong humoral immune response as well as a cell-mediated immune response.
摘要翻译：本发明涉及包含产生的抗原形成病毒样颗粒的L蛋白，M蛋白和S蛋白的全部乙型肝炎表面抗原的HBV疫苗，以及进一步包含HBV核心抗原的多抗原疫苗到整个表面抗原，及其制备方法。疫苗提供各种表位并且具有优异的免疫原性以诱导强的体液免疫应答以及细胞介导的免疫应答。

78. 发明授权

US07936590B2 Digitally-controllable delay for sense amplifier 有权
标题翻译：读数放大器的数字可控延时
公开(公告)号：US07936590B2
公开(公告)日：2011-05-03
申请号：US12329941
申请日：2008-12-08
申请人： Dongkyu Park , Anosh B. Davierwalla , Cheng Zhong , Mohamed Hassan Soliman Abu-Rahma , Sei Seung Yoon
发明人： Dongkyu Park , Anosh B. Davierwalla , Cheng Zhong , Mohamed Hassan Soliman Abu-Rahma , Sei Seung Yoon
IPC分类号： G11C11/00
CPC分类号： G11C7/22 , G11C7/06 , G11C11/1673 , G11C11/1693 , G11C2207/065 , G11C2207/2281
摘要： Circuits, apparatuses, and methods of interposing a selectable delay in reading a magnetic random access memory (MRAM) device are disclosed. In a particular embodiment, a circuit includes a sense amplifier, having a first input, a second input, and an enable input. A first amplifier coupled to an output of a magnetic resistance-based memory cell and a second amplifier coupled to a reference output of the cell also are provided. The circuit further includes a digitally-controllable amplifier coupled to a tracking circuit cell. The tracking circuit cell includes at least one element that is similar to the cell of the magnetic resistance-based memory. The first input of the sense amplifier is coupled to the first amplifier, the second input of the sense amplifier is coupled to the second amplifier, and the enable input is coupled to the third digitally-controllable amplifier via a logic circuit. The sense amplifier may generate an output value based on the amplified values received from the output of the magnetic resistance-based memory cell and the reference cell once the sense amplifier receives an enable signal from the digitally-controllable amplifier via the logic circuit.
摘要翻译：公开了在读取磁随机存取存储器（MRAM）装置中插入可选延迟的电路，装置和方法。在特定实施例中，电路包括具有第一输入，第二输入和使能输入的读出放大器。还提供耦合到基于磁阻的存储器单元的输出的第一放大器和耦合到单元的参考输出的第二放大器。电路还包括耦合到跟踪电路单元的数字可控放大器。跟踪电路单元包括与基于磁阻的存储器的单元相似的至少一个元件。读出放大器的第一输入耦合到第一放大器，读出放大器的第二输入耦合到第二放大器，并且使能输入经由逻辑电路耦合到第三数字可控放大器。一旦读出放大器经由逻辑电路接收到来自数字可控放大器的使能信号，读出放大器可以基于从基于磁阻的存储单元和参考单元的输出接收的放大值产生输出值。

79. 发明授权

US07929334B2 In-situ resistance measurement for magnetic random access memory (MRAM) 有权
标题翻译：磁性随机存取存储器（MRAM）的原位电阻测量
公开(公告)号：US07929334B2
公开(公告)日：2011-04-19
申请号：US12361588
申请日：2009-01-29
申请人： Hari Rao , Sei Seung Yoon , Xiaochun Zhu , Mohamed Abu-Rahma
发明人： Hari Rao , Sei Seung Yoon , Xiaochun Zhu , Mohamed Abu-Rahma
IPC分类号： G11C11/00 , G11C11/14 , G11C7/00 , G11C7/02
CPC分类号： G11C11/1653 , G11C7/14 , G11C11/1655 , G11C11/1673
摘要： A method of measuring resistance of a magnetic tunnel junction (MTJ) of an MRAM memory cell includes applying a voltage of a selected level to a memory cell comprising an MTJ in series with a memory cell transistor in a conducting state. A current through the memory cell is determined. A variable voltage is applied to a replica cell not having an MTJ and comprising a replica cell transistor in a conducting state. A value of the variable voltage is determined, wherein a resulting current through the replica cell is substantially the same as the current through the memory cell. The MTJ resistance is computed by taking the difference of the memory cell voltage and the determined variable replica cell voltage and dividing the result by the determined memory cell current.
摘要翻译：一种测量MRAM存储单元的磁性隧道结（MTJ）的电阻的方法包括将一个所选电平的电压施加到一个与导通状态的存储单元晶体管串联的MTJ的存储单元。确定通过存储单元的电流。可变电压被施加到不具有MTJ并且包括处于导通状态的复制单元晶体管的复制单元。确定可变电压的值，其中通过复制单元的结果电流与通过存储单元的电流基本相同。通过取存储单元电压和确定的可变副本单元电压的差值并将结果除以所确定的存储单元电流来计算MTJ电阻。

80. 发明授权

US07903101B2 Display device and method with optimal external input setting capability 有权
标题翻译：具有最佳外部输入设置能力的显示设备和方法
公开(公告)号：US07903101B2
公开(公告)日：2011-03-08
申请号：US11264025
申请日：2005-11-02
申请人： Seung-yoon Baek
发明人： Seung-yoon Baek
IPC分类号： G09G5/00 , H04N5/268
CPC分类号： H04N5/775 , H04N5/44513 , H04N21/4135 , H04N21/4363 , H04N21/44231 , H04N21/488
摘要： A display device and method with an optimal external input setting capability are provided. A method for setting an external input in a display device includes receiving information about an external device which is connected to the display device via a network; determining based on the information about the external device whether the external device has a capability of providing a component output signal; and if the external device has the capability of providing the component output, setting a set of component terminals as a set of external input terminals for receiving a signal from the external device. Thus, when the external device has the capability of providing a component output, the component terminal is set as an external input, thereby obtaining a high definition image. In addition, setting the component terminals as the external input is automatically performed, thus providing convenience to a user.
摘要翻译：提供具有最佳外部输入设定能力的显示装置和方法。一种用于在显示设备中设置外部输入的方法包括：经由网络接收与所述显示设备连接的外部设备的信息; 基于外部设备的信息确定外部设备是否具有提供分量输出信号的能力; 并且如果外部设备具有提供分量输出的能力，则将一组分量终端设置为一组用于从外部设备接收信号的外部输入端子。因此，当外部设备具有提供分量输出的能力时，将组件端子设置为外部输入，从而获得高清晰度图像。此外，自动执行将组件端子设置为外部输入，从而为用户提供便利。

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