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61. 发明申请

US20080191061A1 TRIGGER-TYPE LIQUID SPRAYER 有权
标题翻译：触发式液体喷雾器
公开(公告)号：US20080191061A1
公开(公告)日：2008-08-14
申请号：US12026906
申请日：2008-02-06
申请人： Shinichi INABA , Takeshi Omi , Tetsuya Kobayashi , Takayuki Abe , Masayuki Nakamura , Hidesato Kizaki
发明人： Shinichi INABA , Takeshi Omi , Tetsuya Kobayashi , Takayuki Abe , Masayuki Nakamura , Hidesato Kizaki
IPC分类号： B05B1/34
CPC分类号： B05B11/3059 , B05B1/3421 , B05B11/0029 , B05B11/3011 , B05B11/3057
摘要： A trigger-type liquid sprayer of the present invention is provided with a liquid sprayer body 2 having a nozzle 21 and a trigger lever 22 and a shroud 3 covering the liquid sprayer body 2 and sprays a liquid from a spray hole 211 in the nozzle 21 by a pulling operation of the trigger lever 22. The nozzle 21 is rotatable with respect to the liquid sprayer body 2 and provided so as to open/close a flow passage for the liquid according to a rotational position of the nozzle 21 when an operation lever 24 mounted on the nozzle 21 is rotationally moved, and an abutment portion 31 for positioning the nozzle 21 at a position where the flow passage is opened through abutment of the operation lever 24 is provided at the shroud 3.
摘要翻译：本发明的触发式液体喷雾器设置有具有喷嘴21和触发杆22的液体喷雾器主体2和覆盖液体喷雾器主体2的护罩3，并且从喷嘴21中的喷射孔211喷射液体通过触发杆22的拉动操作。喷嘴21能够相对于液体喷雾器主体2旋转，并且设置成当安装在喷嘴21上的操作杆24旋转移动时，根据喷嘴21的旋转位置来打开/关闭液体的流路，并且在护罩3上设置有用于将喷嘴21定位在通过操作杆24的邻接而打开流路的位置的抵接部31。

62. 发明申请

US20080181026A1 SEMICONDUCTOR MEMORY DEVICE 失效
标题翻译：半导体存储器件
公开(公告)号：US20080181026A1
公开(公告)日：2008-07-31
申请号：US11963831
申请日：2007-12-22
申请人： Hiroaki Nakaya , Riichiro Takemura , Satoru Akiyama , Tomonori Sekiguchi , Masayuki Nakamura , Shinichi Miyatake
发明人： Hiroaki Nakaya , Riichiro Takemura , Satoru Akiyama , Tomonori Sekiguchi , Masayuki Nakamura , Shinichi Miyatake
IPC分类号： G11C7/08
CPC分类号： G11C11/4091 , G11C7/08 , G11C2207/005
摘要： In a semiconductor memory device, with respect to low voltage application, technique of controlling a gate voltage of a shared MOS transistor increasing sense speed and increasing data read speed by preventing data inversion caused by noise and reducing bit line capacitance during sensing is provided. By a shared MOS transistor gate voltage control circuit connecting a sense amplifier and a memory cell array, a shared MOS transistor gate voltage (SHR) is lowered in two stages and bit line capacitance to be amplified is reduced taking noise during the sensing into consideration so that the sense speed is increased. Therefore, a timing of activating a column selection signal can be hastened and as a result, data read time can be reduced.
摘要翻译：在半导体存储器件中，关于低电压应用，提供了通过防止由噪声引起的数据反转和降低感测期间的位线电容来控制共享MOS晶体管的栅极电压提高感测速度并增加数据读取速度的技术。通过连接读出放大器和存储单元阵列的共享MOS晶体管栅极电压控制电路，共享的MOS晶体管栅极电压（SHR）分为两级降低，并且在感测期间考虑到噪声，放大的位线电容降低感觉速度增加。因此，可以加快激活列选择信号的定时，结果可以减少数据读取时间。

63. 发明申请

US20070075022A1 Single pass method and apparatus for separating a target molecule from a liquid mixture 有权
标题翻译：用于从液体混合物中分离靶分子的单程方法和装置
公开(公告)号：US20070075022A1
公开(公告)日：2007-04-05
申请号：US11241524
申请日：2005-09-30
申请人： Kelly Gibbens , Masayuki Nakamura , Kannan Seshadri , Andrew Rabins , Larry Carson , Robert Fitzsimons
发明人： Kelly Gibbens , Masayuki Nakamura , Kannan Seshadri , Andrew Rabins , Larry Carson , Robert Fitzsimons
IPC分类号： B01D15/08
CPC分类号： B01D15/1828 , B01D15/1842
摘要： A single pass simulated moving bed apparatus and methods are described for continuously separating a target molecule from a liquid mixture, using a simulated moving bed system. The simulated moving bed system includes a plurality of filter cartridge modules in serial fluid communication. Each filter cartridge module includes a volume of stationary phase particulates adjacent a porous substrate layer. The volume of stationary phase particulates has a bed height of less than 1 centimeter.
摘要翻译：描述了使用模拟移动床系统连续分离目标分子与液体混合物的单程模拟移动床装置和方法。模拟移动床系统包括串联流体连通的多个滤芯模块。每个过滤器滤芯模块包括邻近多孔基底层的体积的固定相颗粒。固定相颗粒的体积具有小于1厘米的床高度。

64. 发明授权

US07109058B2 Bumpless semiconductor device 有权
标题翻译：无铅半导体器件
公开(公告)号：US07109058B2
公开(公告)日：2006-09-19
申请号：US10467638
申请日：2002-02-18
申请人： Yukio Yamada , Masayuki Nakamura , Hiroyuki Hishinuma
发明人： Yukio Yamada , Masayuki Nakamura , Hiroyuki Hishinuma
IPC分类号： H01L21/44
CPC分类号： H01L21/563 , H01L21/4853 , H01L24/11 , H01L24/13 , H01L2224/05571 , H01L2224/05573 , H01L2224/11003 , H01L2224/11332 , H01L2224/13099 , H01L2224/131 , H01L2224/73203 , H01L2924/0001 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/07802 , H01L2924/07811 , H01L2924/14 , H01L2924/00015 , H01L2924/00 , H01L2224/05624 , H01L2924/00014
摘要： When connecting a semiconductor device such as an IC chip with a circuit board by the flip-chip method, a semiconductor device is provided without forming bumps thereon, which enables highly reliable and low cost connection between the IC chip and circuit board while ensuring suppressing short-circuiting, lowering connection costs, suppressing stress concentrations at the joints and reducing damage of the IC chip or circuit board. The bumpless semiconductor device is provided with electrode pads 2 on the surface thereof and with a passivation film 3 at the periphery of the electrode pads 2, and conductive particles 4 are metallically bonded to the electric pads 2. Composite particles in which a metallic plating layer is formed at the surface of resin particles are employed as the conductive particles 4. This bumpless semiconductor device can be manufactured by (a) causing conductive particles to be electrostatically adsorbed onto one face of a flat plate; and (b) overlaying the surface of the plate having the adsorbed conductive particles on the surface of electrode pads of a bumpless semiconductor device which is provided with the electrode pads on the surface thereof and with a passivation film at the periphery of the electrode pads, and ultrasonically welding this assembly, so that the conductive particles are metallically bonded and transferred from the flat plate to the electrode pads.
摘要翻译：当通过倒装芯片方法将诸如IC芯片的半导体器件与电路板连接时，提供半导体器件而不在其上形成凸块，这使得IC芯片和电路板之间可以实现高可靠性和低成本的连接，同时确保抑制短路电路，降低连接成本，抑制接头处的应力集中，降低IC芯片或电路板的损坏。无源半导体器件在其表面上设置有电极焊盘2，并且在电极焊盘2的周围具有钝化膜3，并且导电粒子4金属结合到电焊盘2。采用在树脂粒子表面形成有金属镀层的复合粒子作为导电粒子4.这种无凸起的半导体器件可以通过（a）使导电粒子静电吸附在平板的一个面上来制造。和（b）将具有吸附的导电颗粒的板的表面覆盖在其表面上设置有电极焊盘的无扰动半导体器件的电极焊盘的表面上，并且在电极焊盘的周围具有钝化膜，并且超声波焊接该组件，使得导电颗粒被金属地结合并从平板转移到电极焊盘。

65. 发明授权

US07082074B2 Semiconductor device having a power down mode 有权
公开(公告)号：US07082074B2
公开(公告)日：2006-07-25
申请号：US11183802
申请日：2005-07-19
申请人： Masashi Horiguchi , Masayuki Nakamura , Sadayuki Ohkuma , Kazuhiko Kajigaya , Yoshinobu Nakagome
发明人： Masashi Horiguchi , Masayuki Nakamura , Sadayuki Ohkuma , Kazuhiko Kajigaya , Yoshinobu Nakagome
IPC分类号： G11C7/00
CPC分类号： G11C5/063 , G11C5/14 , G11C5/147 , G11C7/1072 , G11C8/12 , G11C11/406 , G11C11/40615 , G11C11/40618 , G11C11/4074 , G11C11/4076 , G11C2207/2227 , G11C2211/4067 , G11C2211/4068
摘要： A synchronous DRAM is provided which includes arrangements for operations of power supply circuitry based upon whether the DRAM is in a power down mode or not. In one embodiment, a first power supply circuit and a second power supply circuit are provided which both receive externally supplied voltages and output internal supply voltages. The first power supply circuit is not in operation when a semiconductor device of the synchronous DRAM is in a power down mode. However, the second power supply circuit is continuously in operation during the power down mode. In another arrangement, the operation of a voltage limiter circuit is controlled based on whether or not the DRAM is in a power down mode.

66. 发明授权

US07072202B2 Semiconductor device having a power down mode 有权
标题翻译：具有掉电模式的半导体器件
公开(公告)号：US07072202B2
公开(公告)日：2006-07-04
申请号：US11084138
申请日：2005-03-21
申请人： Masashi Horiguchi , Masayuki Nakamura , Sadayuki Ohkuma , Kazuhiko Kajigaya , Yoshinobu Nakagome
发明人： Masashi Horiguchi , Masayuki Nakamura , Sadayuki Ohkuma , Kazuhiko Kajigaya , Yoshinobu Nakagome
IPC分类号： G11C5/06
CPC分类号： G11C5/063 , G11C5/14 , G11C5/147 , G11C7/1072 , G11C8/12 , G11C11/406 , G11C11/40615 , G11C11/40618 , G11C11/4074 , G11C11/4076 , G11C2207/2227 , G11C2211/4067 , G11C2211/4068
摘要： A synchronous DRAM is provided which includes arrangements for operations of power supply circuitry based upon whether the DRAM is in a power down mode or not. In one embodiment, a first power supply circuit and a second power supply circuit are provided which both receive externally supplied voltages and output internal supply voltages. The first power supply circuit is not in operation when a semiconductor device of the synchronous DRAM is in a power down mode. However, the second power supply circuit is continuously in operation during the power down mode. In another arrangement, the operation of a voltage limiter circuit is controlled based on whether or not the DRAM is in a power down mode.
摘要翻译：提供了一种同步DRAM，其包括基于DRAM是否处于掉电模式的电源电路的操作的布置。在一个实施例中，提供了第一电源电路和第二电源电路，其接收外部提供的电压并输出内部电源电压。当同步DRAM的半导体器件处于掉电模式时，第一电源电路不工作。然而，第二电源电路在掉电模式期间连续运行。在另一种布置中，基于DRAM是否处于断电模式来控制限压器电路的操作。

67. 发明授权

US07053312B2 Flexible wiring boards 有权
标题翻译：柔性线路板
公开(公告)号：US07053312B2
公开(公告)日：2006-05-30
申请号：US10640401
申请日：2003-08-14
申请人： Hiroyuki Hishinuma , Hideyuki Kurita , Ryo Ito , Masayuki Nakamura
发明人： Hiroyuki Hishinuma , Hideyuki Kurita , Ryo Ito , Masayuki Nakamura
IPC分类号： H05K1/00
CPC分类号： H05K3/4007 , H01L21/4853 , H01L21/4857 , H01L23/4985 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H05K3/423 , H05K3/4647 , H05K2201/0154 , H05K2201/0195 , H05K2201/0347 , H05K2201/0355 , H05K2201/0367 , H05K2201/09481 , H05K2201/09563 , H05K2203/0759 , Y10T29/49121 , Y10T29/49124 , Y10T29/49126 , Y10T29/49147 , Y10T29/49155 , H01L2224/05624 , H01L2924/00014
摘要： A flexible wiring board are formed by growing metal bumps using a mask film patterned by photolithography. Fine openings can be formed with good precision, therefore, fine metal bumps can be formed with good precision because laser beam is not used to form opening in a polyimide film. After metal bumps have been formed, the mask film is removed and a liquid resin material is applied and dried to form a coating, which is then cured into a resin film. The coating can be etched at surface portions during coating stage to exposed the tops of metal bumps.
摘要翻译：通过使用通过光刻图案化的掩模膜生长金属凸块来形成柔性布线板。可以以良好的精度形成精细的开口，因此，由于激光束不用于在聚酰亚胺膜中形成开口，所以可以以高精度形成细小的金属凸块。在形成金属凸块之后，去除掩模膜，并施加液体树脂材料并干燥以形成涂层，然后将其固化成树脂膜。涂层可以在涂层阶段在表面部分进行蚀刻，以露出金属凸块的顶部。

68. 发明申请

US20050289121A1 Web-compatible electronic device, web page processing method, and program 失效
标题翻译： Web兼容电子设备，网页处理方法和程序
公开(公告)号：US20050289121A1
公开(公告)日：2005-12-29
申请号：US10523234
申请日：2004-05-21
申请人： Masayuki Nakamura , Tetsuo Yutani , Kazutoshi Nagatome , Shintaro Yamanaka
发明人： Masayuki Nakamura , Tetsuo Yutani , Kazutoshi Nagatome , Shintaro Yamanaka
IPC分类号： G06F3/14 , G06F13/00 , G06F17/30
CPC分类号： G06F16/9577 , G06F16/986
摘要： A Web page including as its display elements a headline and a body of its story, subheads and links to articles belonging to the subheads is obtained and is rendered internally so as to obtain a position of each display element on the basis of draw data. Each display element is classified into several clusters in accordance with the obtained position of the display element and layout features of the individual clusters are detected so as to discriminate clusters of the headline and the body of story in accordance with a result of the feature detection. Next, clusters having same character attribute are collected to be a group, and a group having a high average of the number of characters within each cluster included in each group is determined as the body of story and a group having a low average as the headline. Then, individual pages of the body-of-story/article are created and a top page including the headline and subheads provided with links to these body-of-story/article pages is created. Therefore, the Web page acquired through a network is reconstructed to a Web page suitable for browsing in low-resolution display environments and is displayed.
摘要翻译：网页包括作为其显示元件的标题及其故事的主体，子标题以及属于子标题的文章的链接，并且在内部进行渲染，以便基于绘制数据获得每个显示元件的位置。根据获得的显示元件的位置将每个显示元件分成几个簇，并且检测各个簇的布局特征，以便根据特征检测的结果来区分标题和故事的体。接下来，将具有相同字符属性的集群收集为一组，并且将每个组中包括的每个集群内的具有高平均数的每个集群中的字符组的组确定为故事的主体，并且将具有较低平均值的组作为标题。然后，创建故事/文章的单独页面，并创建一个首页，其中包括标题和子标题，其中提供了指向这些故事/文章页面的链接。因此，通过网络获取的网页被重构为适于在低分辨率显示环境中浏览的网页并被显示。

69. 发明授权

US06926187B2 Ultrasonic manufacturing apparatus 失效
标题翻译：超声波制造装置
公开(公告)号：US06926187B2
公开(公告)日：2005-08-09
申请号：US10423977
申请日：2003-04-28
申请人： Hideyuki Kurita , Masanao Watanabe , Masayuki Nakamura , Mitsuhiro Fukuda , Hiroyuki Usui
发明人： Hideyuki Kurita , Masanao Watanabe , Masayuki Nakamura , Mitsuhiro Fukuda , Hiroyuki Usui
IPC分类号： H05K1/00 , H05K3/00 , H05K3/28 , H05K3/42 , H05K3/46 , B23K1/06
CPC分类号： H05K3/4635 , H01L2224/1147 , H01L2924/01019 , H05K1/0393 , H05K3/005 , H05K3/28 , H05K3/423 , H05K3/4617 , H05K3/4647 , H05K3/4652 , H05K2201/0195 , H05K2201/0355 , H05K2201/09563 , H05K2203/0195 , H05K2203/0285 , H05K2203/1189 , Y10T29/49124 , Y10T29/49126 , Y10T29/49155
摘要： The present invention pertains to a multilayer flexible wiring board.The multilayer flexible wiring board including first and second patterned wiring layers, a resin film interposed between a surface of the first wiring layer and a surface of the second wiring layer, and a bump connected to the surface of the second wiring layer, wherein the resin film is adapted to form an opening when the bump to force into the resin film and an ultrasonic wave is applied to the bump and the bump is left in the opening to electrically connect the top of the bump to the first wiring layer.
摘要翻译：本发明涉及多层柔性布线板。所述多层柔性布线板包括第一和第二图案化布线层，插入在第一布线层的表面和第二布线层的表面之间的树脂膜和连接到第二布线层的表面的凸起，其中树脂当凸块被迫进入树脂膜并且超声波被施加到凸起并且凸起留在开口中以将凸起的顶部电连接到第一布线层时，膜适于形成开口。

70. 发明申请

US20050119499A1 Cyclic hemiacetal derivative and use thereof 失效
标题翻译：环状半缩醛衍生物及其用途
公开(公告)号：US20050119499A1
公开(公告)日：2005-06-02
申请号：US10507831
申请日：2003-03-14
申请人： Masayuki Nakamura , Jun Inoue
发明人： Masayuki Nakamura , Jun Inoue
IPC分类号： A61P9/00 , A61P9/10 , A61P19/02 , A61P21/04 , A61P25/28 , A61P27/12 , A61P43/00 , C07D307/22 , C07F9/02
CPC分类号： C07D307/22
摘要： A compound represented by the following formula (I) wherein R1 is a lower alkyl group, R2 is a hydrogen, a halogen, a cyano group, a lower alkyl group or a lower alkoxy group, and n is 0 or 1, which has a calpain inhibitory activity, is provided.
摘要翻译：由下式（I）表示的化合物，其中R 1为低级烷基，R 2为氢，卤素，氰基，低级烷基或低级烷氧基，并且n为0或1，其具有钙蛋白酶抑制活性。

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