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61. 发明授权

US08871607B2 Method for producing hybrid components 有权
标题翻译：混合组分的制备方法
公开(公告)号：US08871607B2
公开(公告)日：2014-10-28
申请号：US12663096
申请日：2008-06-06
申请人： Thomas Signamarcheix , Franck Fournel , Hubert Moriceau
发明人： Thomas Signamarcheix , Franck Fournel , Hubert Moriceau
IPC分类号： H01L21/30 , H01L21/8238 , H01L21/762 , H01L21/8258 , H01L21/84
CPC分类号： H01L21/8258 , H01L21/76254 , H01L21/823807 , H01L21/823878 , H01L21/84
摘要： A method for producing a hybrid substrate, including a support substrate, a continuous buried insulator layer and, on this continuous layer, a hybrid layer including alternating zones of a first material and at least one second material, wherein these two materials are different by their nature and/or their crystallographic characteristics. The method forms a hybrid layer, including alternating zones of first and second materials, on a homogeneous substrate, assembles this hybrid layer, the continuous insulator layer and the support substrate, and eliminates a part at least of the homogeneous substrate, before or after the assembling.
摘要翻译：一种制造混合基板的方法，包括支撑基板，连续埋层绝缘体层，并且在该连续层上，包括第一材料和至少一种第二材料的交替区域的混合层，其中这两种材料由它们性质和/或其晶体学特征。该方法形成混合层，包括在均匀基底上的第一和第二材料的交替区，组装该混合层，连续绝缘体层和支撑衬底，并且在第一和第二材料之前或之后形成至少均匀的衬底的部分组装。

62. 发明申请

US20130092320A1 METHOD FOR TRANSFERRING A THIN LAYER OF MONOCRYSTALLINE SILICON 有权
标题翻译：用于传输单晶硅薄层的方法
公开(公告)号：US20130092320A1
公开(公告)日：2013-04-18
申请号：US13805796
申请日：2011-06-21
申请人： Maxime Argoud , Hubert Moriceau , Christian Fretigny
发明人： Maxime Argoud , Hubert Moriceau , Christian Fretigny
IPC分类号： B32B38/00
CPC分类号： B32B38/0008 , C23C14/0005 , C23C14/48 , H01L21/76254 , Y02P20/582
摘要： A method for transferring a thin layer of monocrystalline silicon from a free face of a monocrystalline silicon donor substrate having a thickness greater than that of the thin layer includes implanting ions through the free face to form a buried brittle layer in the silicon, using a polymer layer, bonding the donor substrate, by the free face, to a receiver substrate, and fracturing the thin layer from the donor substrate at the buried brittle layer by thermal fracture processing, and selecting conditions of implantation such that a thickness of the thin layer is smaller than 10 micrometers, and a thickness of the polymer layer is below a critical threshold defined as a function of energy and dose of the implantation, the critical threshold being less than or equal to the lesser of 500 nanometers and the thin layer's thickness.
摘要翻译：从单晶硅供体衬底的自由面转移薄层的单晶硅供体衬底的方法，其厚度大于薄层厚度的方法包括通过自由面注入离子以在硅中形成掩埋的脆性层，使用聚合物将供体衬底通过自由表面接合到接收器基板，并且通过热断裂处理在掩埋脆性层处从施主衬底压裂薄层，并且选择注入条件使得薄层的厚度为小于10微米，并且聚合物层的厚度低于作为注入能量和剂量的函数定义的临界阈值，临界阈值小于或等于500纳米的较小值和薄层的厚度。

63. 发明授权

US08034208B2 Deformation moderation method 有权
标题翻译：变形调节法
公开(公告)号：US08034208B2
公开(公告)日：2011-10-11
申请号：US12276112
申请日：2008-11-21
申请人： Hubert Moriceau , Jean-Claude Roussin
发明人： Hubert Moriceau , Jean-Claude Roussin
IPC分类号： B29C65/00 , B32B37/00 , B32B38/10 , H01L21/00
CPC分类号： H01F10/24 , C30B29/28 , C30B29/36 , H01F41/34 , H01L21/76254 , H01L43/12 , Y10S438/933
摘要： A method of transferring a layer of a first material onto a second substrate of a second material includes, a step of forming a first embrittlement plane in a first substrate in first material, by a first ion and/or atom implantation through a first face of said substrate, a step of forming a second embrittlement plane in said first substrate, by a first ion and/or atom implantation through a second face of said substrate, in order to reduce a curvature of this first substrate, a step of assembling the first and second substrates, and a step of separating a layer from the first substrate at the level of the first embrittlement plane, without separation at the level of the second embrittlement plane.
摘要翻译：将第一材料层转移到第二材料的第二衬底上的方法包括：通过第一离子和/或原子注入在第一材料中的第一衬底中形成第一脆化面的步骤，所述衬底是通过所述衬底的第二面通过第一离子和/或原子注入在所述第一衬底中形成第二脆化面的步骤，以便减小所述第一衬底的曲率，和第二基板，以及在第一脆化平面的水平处从第一基板分离层而不在第二脆化面的水平分离的步骤。

64. 发明申请

US20110163410A1 METHOD FOR PRODUCING HYBRID COMPONENTS 有权
标题翻译：生产混合组分的方法
公开(公告)号：US20110163410A1
公开(公告)日：2011-07-07
申请号：US12663096
申请日：2008-06-06
申请人： Thomas Signamarcheix , Franck Fournel , Hubert Moriceau
发明人： Thomas Signamarcheix , Franck Fournel , Hubert Moriceau
IPC分类号： H01L29/06 , H01L21/762
CPC分类号： H01L21/8258 , H01L21/76254 , H01L21/823807 , H01L21/823878 , H01L21/84
摘要： A method for producing a hybrid substrate, including a support substrate, a continuous buried insulator layer and, on this continuous layer, a hybrid layer including alternating zones of a first material and at least one second material, wherein these two materials are different by their nature and/or their crystallographic characteristics. The method forms a hybrid layer, including alternating zones of first and second materials, on a homogeneous substrate, assembles this hybrid layer, the continuous insulator layer and the support substrate, and eliminates a part at least of the homogeneous substrate, before or after the assembling.
摘要翻译：一种制造混合基板的方法，包括支撑基板，连续埋层绝缘体层，并且在该连续层上，包括第一材料和至少一种第二材料的交替区域的混合层，其中这两种材料由它们性质和/或其晶体学特征。该方法形成混合层，包括在均匀基底上的第一和第二材料的交替区，组装该混合层，连续绝缘体层和支撑衬底，并且在第一和第二材料之前或之后形成至少均匀的衬底的部分组装。

65. 发明授权

US07645392B2 Methods for preparing a bonding surface of a semiconductor wafer 有权
标题翻译：制备半导体晶片的接合表面的方法
公开(公告)号：US07645392B2
公开(公告)日：2010-01-12
申请号：US11472665
申请日：2006-06-21
申请人： Corinne Maunand Tussot , Christophe Maleville , Hubert Moriceau , Alain Soubie
发明人： Corinne Maunand Tussot , Christophe Maleville , Hubert Moriceau , Alain Soubie
IPC分类号： B44C1/22
CPC分类号： H01L21/76254
摘要： A method for preparing an oxidized surface of a first wafer for bonding with a second wafer. The method includes treating the oxidized surface with a solution of NH4OH/H2O2 at treatment parameters sufficient to etch about 10 Å to about 120 Å from the wafer surface, followed by treating the etched surface with hydrochloric acid species at a temperature below about 50° C. for a duration of less than about 10 minutes to remove isolated particles from the oxidized surface. This method cleans the wafer surface without increasing roughness or creating rough patches thereon, and thus provides a cleaned surface capable of providing an increased bonding energy between the first and second wafers when those surfaces are bonded together. This cleaning process is advantageously used in a thin layer removal process to fabricate a semiconductor on insulator structure.
摘要翻译：一种用于制备用于与第二晶片接合的第一晶片的氧化表面的方法。该方法包括用NH 4 OH / H 2 O 2溶液处理氧化表面，处理参数足以从晶片表面蚀刻约大约至大约120埃，然后在低于约50℃的温度下用盐酸处理蚀刻的表面持续时间少于约10分钟以从氧化表面除去分离的颗粒。该方法清洁晶片表面而不会增加粗糙度或在其上产生粗糙的贴片，从而提供了当这些表面粘接在一起时能够在第一和第二晶片之间提供增加的结合能的清洁表面。该清洁方法有利地用于薄层去除工艺以制造绝缘体上半导体结构。

66. 发明申请

US20090246946A1 METHOD OF FABRICATING A MICROELECTRONIC STRUCTURE OF A SEMICONDUCTOR ON INSULATOR TYPE WITH DIFFERENT PATTERNS 有权
标题翻译：在具有不同图案的绝缘体类型上制造半导体的微电子结构的方法
公开(公告)号：US20090246946A1
公开(公告)日：2009-10-01
申请号：US12413130
申请日：2009-03-27
申请人： Emmanuel Augendre , Thomas Ernst , Marek Kostrzewa , Hubert Moriceau
发明人： Emmanuel Augendre , Thomas Ernst , Marek Kostrzewa , Hubert Moriceau
IPC分类号： H01L21/762
CPC分类号： H01L21/76254
摘要： A microstructure of the semiconductor on insulator type with different patterns is produced by forming a stacked uniform structure including a plate forming a substrate, a continuous insulative layer and a semiconductor layer. The continuous insulative layer is a stack of at least three elementary layers, including a bottom elementary layer, at least one intermediate elementary layer, and a top elementary layer overlying the semiconductor layer, where at least one of the bottom elementary layer and the top elementary layer being of an insulative material. In the stacked uniform structure, at least two patterns are differentiated by modifying at least one of the elementary layers in one of the patterns so that the elementary layer has a significantly different physical or chemical property between the two patterns, where at least one of the bottom and top elementary layer is an insulative material that remains unchanged.
摘要翻译：通过形成包括形成衬底的板，连续绝缘层和半导体层的层叠均匀结构，来产生具有不同图案的绝缘体半导体型微结构。连续绝缘层是至少三个基本层的堆叠，包括底部基本层，至少一个中间基本层和覆盖半导体层的顶部基本层，其中底部基本层和顶部基本层中的至少一个层是绝缘材料。在层叠的均匀结构中，通过修改其中一个图案中的至少一个基本层来区分至少两个图案，使得元件层在两个图案之间具有显着不同的物理或化学特性，其中至少一个底部和顶部基本层是保持不变的绝缘材料。

67. 发明申请

US20080272396A1 Simplified Method of Producing an Epitaxially Grown Structure 失效
标题翻译：生产外延生长结构的简化方法
公开(公告)号：US20080272396A1
公开(公告)日：2008-11-06
申请号：US12158191
申请日：2006-12-04
申请人： Frank Fournel , Hubert Moriceau
发明人： Frank Fournel , Hubert Moriceau
IPC分类号： H01L21/20 , H01L29/02
CPC分类号： H01L21/187 , C30B25/18 , C30B33/00 , H01L21/0237 , H01L21/02381 , H01L21/0243 , H01L21/02521 , H01L21/02639 , H01L21/0265 , H01L21/02664 , H01L21/30604
摘要： Method to produce a structure consisting of depositing a material by columnar epitaxy on a crystalline face of a substrate (2), of continuing so that the columns (4) give a continuous layer (5). The surface is provided with a period array of bumps (3) on a nanometric scale, each bump (3) having a support zone (35) and being obtained from an array of crystalline defects and/or strain fields created within a crystalline region (16) located in the vicinity of a bonding interface (15) between two crystalline elements (11, 12) whose crystalline lattices have a twist and/or tilt angle and/or have interfacial lattice mismatch, able to condition the period (38) of the array of bumps (3). The period (38) of the array, the height (36) of the bumps and the size of their support zone (35) being adjusted so that the continuous layer (40) has a critical thickness that is greater than that obtained using epitaxy without the bumps.
摘要翻译：一种制造结构的方法，该结构包括通过柱状外延在衬底（2）的结晶面上沉积材料，继续使得柱（4）产生连续层（5）。该表面设有一个具有纳米尺度的凸块（3）的周期阵列，每个凸块（3）具有一个支撑区（35），并由结晶区域内产生的晶体缺陷和/或应变场的阵列获得（ 16）位于结晶界面（15）附近，其结晶晶格具有扭转和/或倾斜角和/或具有界面晶格失配的两个晶体元件（11,12）之间，能够调节凸块阵列（3）。阵列的周期（38），凸块的高度（36）和它们的支撑区域（35）的尺寸被调整，使得连续层（40）的临界厚度大于没有颠簸

68. 发明授权

US07407867B2 Method for concurrently producing at least a pair of semiconductor structures that each include at least one useful layer on a substrate 失效
标题翻译：用于同时产生至少一对半导体结构的方法，每个半导体结构在衬底上包括至少一个有用层
公开(公告)号：US07407867B2
公开(公告)日：2008-08-05
申请号：US11509047
申请日：2006-08-24
申请人： Bruno Ghyselen , Cécile Aulnette , Benoĩt Bataillou , Carlos Mazure , Hubert Moriceau
发明人： Bruno Ghyselen , Cécile Aulnette , Benoĩt Bataillou , Carlos Mazure , Hubert Moriceau
IPC分类号： H01L21/20
CPC分类号： H01L21/76254 , Y10S438/977
摘要： A method for producing a semiconductor structure that includes at least one useful layer on a substrate. This method includes providing a source substrate with a zone of weakness therein that defines a relatively thick useful layer between the zone of weakness and a front face of the source substrate; bonding the front face of the source substrate to a support substrate and detaching the useful layer from the source substrate at the zone of weakness to transfer the useful layer to the support substrate; implanting atomic species into a free face of the useful layer to a controlled mean implantation depth therein to form a zone of weakness within the useful layer that defines front and rear useful layers, with the rear useful layer contacting the source substrate and the front useful layer containing a greater concentration of defects; bonding a stiffening substrate to the free face of the front useful layer after implantation of the atomic species; and detaching the front useful layer from the rear useful layer along the zone of weakness to form a semiconductor structure comprising the support substrate and the rear useful layer thereon. The structures obtained can be used in the fields of electronics, optoelectronics or optics.
摘要翻译：一种用于制造半导体结构的方法，所述半导体结构在衬底上包括至少一个有用层。该方法包括提供源极基底中的弱化区域，其在弱化区域和源极基底的前面之间限定相对较厚的有用层; 将源极基板的正面粘合到支撑基板上，并在弱化区域将有用层与源极基板分离，以将有用层转移到支撑基板; 将原子物质植入有用层的自由面中，以在其中形成受控的平均注入深度，以在限定前后有用层的有用层内形成弱化区，其中后部有用层与源极基底和前部有用层接触含有较大浓度的缺陷; 在加入原子物质之后将加强基底粘合到前有用层的自由面上; 并且沿着弱化区从后部有用层分离前部有用层，以形成包括支撑基板和其上的后部有用层的半导体结构。所获得的结构可用于电子学，光电子学或光学领域。

69. 发明申请

US20080063143A1 Method and Device for Measuring Bond Energy 有权
标题翻译：测量结合能的方法和装置
公开(公告)号：US20080063143A1
公开(公告)日：2008-03-13
申请号：US11666368
申请日：2005-10-24
申请人： Francois Rieutord , Hubert Moriceau , Benoit Bataillou
发明人： Francois Rieutord , Hubert Moriceau , Benoit Bataillou
IPC分类号： G01N23/20
CPC分类号： G01N23/20 , G01N19/04
摘要： The adhesion between two layers, in particular two thin layers of a microelectronic device, is a data item of importance. It was found that the closure ratio of the interface could be used, in non-destructive manner, to determine a measurement of bond energy. A method and a device using a magnitude characteristic of this length are described, in particular using low incidence X-ray reflection and electronic density at the interface.
摘要翻译：两层之间的粘附，特别是微电子器件的两个薄层，是重要的数据项。已经发现界面的封闭比可以以非破坏性方式用于确定键能的测量。具体地说，使用该长度的幅度特性的方法和装置，特别是在界面处使用低入射X射线反射和电子密度。

70. 发明申请

US20080041517A1 Assembling Two Substrates by Molecular Adhesion, One of the Two Supporting an Electrically Conductive Film 审中-公开
标题翻译：通过分子粘附组装两个底物，两个支持导电膜之一
公开(公告)号：US20080041517A1
公开(公告)日：2008-02-21
申请号：US11630033
申请日：2005-06-29
申请人： Hubert Moriceau , Guy Feuillet , Stephane Pocas
发明人： Hubert Moriceau , Guy Feuillet , Stephane Pocas
IPC分类号： B29C65/02 , B29C65/14
CPC分类号： H01L24/29 , H01L24/32 , H01L24/83 , H01L27/14634 , H01L27/1469 , H01L2224/04026 , H01L2224/05009 , H01L2224/29082 , H01L2224/29117 , H01L2224/29138 , H01L2224/29155 , H01L2224/29164 , H01L2224/83193 , H01L2224/83801 , H01L2224/8381 , H01L2224/8383 , H01L2224/83894 , H01L2224/9202 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01057 , H01L2924/01058 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/10329 , Y10T156/10 , H01L2924/01014 , H01L2924/01028 , H01L2924/01049 , H01L2924/01031 , H01L2924/3512 , H01L2924/00 , H01L2924/00014
摘要： A process assembling first and second substrates on contact faces by molecular bonding. The first substrate contact face has an electrically conducting layer on at least part of its surface. The process deposits a bond layer on at least part of the electrically conducting layer, which bond layer can molecularly bond with a zone of the second substrate contact face and be combined with the electrically conducting layer to form a conducting alloy, contacts the bond layer with the zone of the second substrate contact face and molecularly bond them, and transforms over all or part of its thickness of all or part of the electrically conducting layer with all or part of the bond layer and with at least part of the thickness of the zone of the contact face on all or part of the surface of the second substrate to form a conducting alloy(s) zone.
摘要翻译：通过分子结合在接触面上组装第一和第二基板的工艺。第一基板接触面在其表面的至少一部分上具有导电层。该工艺在导电层的至少一部分上沉积接合层，该接合层可以与第二基板接触面的区域分子结合并与导电层组合以形成导电合金，第二基板接触面的区域并将其分子结合，并且将全部或部分导电层的全部或部分厚度与全部或部分接合层以及至少部分厚度的区域的接触面在第二基底的全部或部分表面上以形成导电合金区。

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