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    • 5. 发明申请
    • Method for producing a stacked structure
    • 叠层结构体的制造方法
    • US20050101095A1
    • 2005-05-12
    • US10450528
    • 2001-12-27
    • Franck FournelHubert MoriceauMarc ZussyNoel Magnea
    • Franck FournelHubert MoriceauMarc ZussyNoel Magnea
    • H01L27/12H01L21/02H01L21/18H01L21/762H01L21/336
    • H01L21/187H01L21/76251
    • Method for producing a stacked structure by obtaining at least two crystalline parts by detaching them from a same initial structure, each crystalline part having one face created by the detachment having a tilt angle with a reference crystalline plane of the initial structure. Structures are formed from the crystalline parts, each structure having a face to be assembled that has a controlled tilt angle in relation to the tilt angle of the created face of the corresponding crystalline part. The structures are assembled while controlling their relative positions, rotating in an interface plane, in relation to relative positions of respective crystalline parts within the initial structure, to obtain a controlled resulting tilt angle at the interface between the structures. The method may find application particularly in microelectronics, optics, and optoelectronics.
    • 通过从相同的初始结构中分离出至少两个结晶部分来制造层叠结构的方法,每个结晶部分具有通过与初始结构的参考晶面具有倾斜角度的分离产生的一个面。 结构由结晶部分形成,每个结构具有相对于相应结晶部分的产生面的倾斜角具有受控倾斜角的待组装面。 结构被组装,同时控制它们在界面平面中相对于初始结构内的各结晶部分的相对位置旋转的相对位置,以在结构之间的界面处获得受控的所得到的倾斜角。 该方法可以特别在微电子学,光学和光电子学中得到应用。
    • 8. 发明授权
    • Method of producing mixed substrates and structure thus obtained
    • 制备混合基材的方法和由此获得的结构
    • US07494897B2
    • 2009-02-24
    • US10540303
    • 2003-12-22
    • Franck FournelHubert MoriceauBernard AsparMarc Zussy
    • Franck FournelHubert MoriceauBernard AsparMarc Zussy
    • H01L21/30
    • H01L21/76264H01L21/187H01L21/76275
    • The inventive method includes a preparation step during which the substrate is covered with a layer, a pressing step in which a mould including a pattern of recesses and protrusions is pressed into part of the thickness of the aforementioned layer, at least one etching step in which the layer is etched until parts of the surface of the substrate have been stripped, and a substrate etching step whereby the substrate is etched using an etching pattern which is defined from the mould pattern. The preparation step includes a sub-step consisting of the formation of a lower sub-layer of curable material, a step involving the curing of said layer and a sub-step including the formation of an outer sub-layer which is adjacent to the cured sub-layer. Moreover, during the pressing step, the above-mentioned protrusions in the mould penetrate the outer sub-layer until contact is reached with the cured sub-layer.
    • 本发明的方法包括一个制备步骤,在该步骤中衬底被一层覆盖,一个压制步骤,其中将包括凹凸图案的模具压入上述层的厚度的一部分中,至少一个蚀刻步骤,其中 蚀刻该层,直到基板的表面的一部分被剥离,以及基板蚀刻步骤,由此使用从模具图案限定的蚀刻图案来蚀刻该基板。 制备步骤包括由可固化材料的下层形成的子步骤,涉及所述层的固化的步骤和包括形成邻近固化的外部亚层的子步骤 子层。 此外,在挤压步骤中,模具中的上述突起穿透外部子层,直到与固化的子层接触。
    • 10. 发明授权
    • Method for producing ordered nanostructures
    • 生产有序纳米结构的方法
    • US08207048B2
    • 2012-06-26
    • US11612829
    • 2006-12-19
    • Franck FournelHubert MoriceauChrystel Deguet
    • Franck FournelHubert MoriceauChrystel Deguet
    • H01L21/30H01L21/46
    • H01L21/2007B81C1/00031H01L21/76254
    • Method for producing nanostructures comprising: a step of providing a substrate (100) having a buried barrier layer (2) and above said barrier layer (2) a crystalline film (5) provided with a network of crystalline defects and/or stress fields (12) in a crystalline zone (13), one or several steps of attacking the substrate (100), of which a preferential attack either of the crystalline defects and/or the stress fields, or the crystalline zone (13) between the crystalline defects and/or the stress fields, said attack steps enabling the barrier layer (2) to be laid bared locally and protrusions (7) to be formed on a nanometric scale, separated from each other by hollows (7.1) having a base located in the barrier layer, the protrusions leading to nanostructures (7, 8).
    • 一种生产纳米结构的方法,包括:提供具有掩埋阻挡层(2)和所述阻挡层(2)上方的衬底(100)的步骤,所述结晶膜(5)具有晶体缺陷和/或应力场网络 12)在结晶区域(13)中,攻击衬底(100)的一个或几个步骤,其中晶体缺陷和/或应力场的优先攻击或晶体缺陷之间的结晶区域(13) 和/或应力场,所述攻击步骤使得阻挡层(2)能够局部放置并且以纳米尺度形成突起(7),所述突起(7)通过具有位于 阻挡层,导致纳米结构的突起(7,8)。