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51. 发明授权

US5488000A Method of fabricating a thin film transistor using a nickel silicide layer to promote crystallization of the amorphous silicon layer 失效
标题翻译：使用硅化镍层制造薄膜晶体管以促进非晶硅层的结晶的方法
公开(公告)号：US5488000A
公开(公告)日：1996-01-30
申请号：US260413
申请日：1994-06-14
申请人： Hongyong Zhang , Satoshi Teramoto
发明人： Hongyong Zhang , Satoshi Teramoto
IPC分类号： H01L27/12 , H01L21/20 , H01L21/336 , H01L21/77 , H01L21/84 , H01L21/00
CPC分类号： H01L27/1277 , H01L21/2022 , H01L27/1214 , H01L29/66757 , Y10S148/016 , Y10S148/154
摘要： Method of fabricating TFTs starts with forming a nickel film selectively on a bottom layer which is formed on a substrate. An amorphous silicon film is formed on the nickel film and heated to crystallize it. The crystallized film is irradiated with infrared light to anneal it. Thus, a crystalline silicon film having excellent crystailinity is obtained. TFTs are built, using this crystalline silicon film.
摘要翻译：制造TFT的方法首先在形成在基板上的底层上选择性地形成镍膜。在镍膜上形成非晶硅膜并加热使其结晶。用红外光照射结晶膜使其退火。因此，获得了具有优异结晶度的结晶硅膜。使用这种晶体硅膜构建TFT。

52. 发明授权

US5478777A Method of making a semiconductor photoelectric conversion device having a crystalline I-type layer 失效
标题翻译：制造具有晶体I型层的半导体光电转换装置的方法
公开(公告)号：US5478777A
公开(公告)日：1995-12-26
申请号：US310375
申请日：1994-09-22
申请人： Shunpei Yamazaki
发明人： Shunpei Yamazaki
IPC分类号： H01L31/0224 , H01L31/076 , H01L31/18 , H01L21/26
CPC分类号： H01L31/076 , H01L31/022466 , H01L31/1864 , Y02E10/548 , Y02P70/521 , Y10S148/004 , Y10S148/154 , Y10S438/931
摘要： A method for forming a semiconductor material involves forming an i-type non-single crystalline layer on a substrate and crystallizing the semiconductor material by irradiation with a light having a wavelength in the range of 250 to 600 nm. Desirably, the crystals of the semiconductor material extend in column form approximately perpendicular to the substrate. Preferably, the i-type layer is doped with a recombination center neutralizer selected from hydrogen and a halogen element and the concentration of impurities forming recombination centers, such as oxygen, nitrogen, carbon, phosphorus and boron, are maintained at 1 atomic % or less.
摘要翻译：一种形成半导体材料的方法包括在衬底上形成i型非单晶层，并通过用波长在250至600nm范围内的光照射来使半导体材料结晶。理想地，半导体材料的晶体以大致垂直于衬底的柱形式延伸。优选地，i型层掺杂有选自氢和卤素元素的复合中心中和剂，并且形成复合中心的杂质如氧，氮，碳，磷和硼的浓度保持在1原子％以下。

53. 发明授权

US5061655A Method of producing SOI structures 失效
标题翻译：生产SOI结构的方法
公开(公告)号：US5061655A
公开(公告)日：1991-10-29
申请号：US653086
申请日：1991-02-11
申请人： Takashi Ipposhi , Kozuyuki Sugahara
发明人： Takashi Ipposhi , Kozuyuki Sugahara
IPC分类号： H01L21/20 , H01L21/263 , H01L21/321 , H01L21/762
CPC分类号： H01L21/2026 , H01L21/321 , H01L21/76248 , Y10S117/904 , Y10S148/093 , Y10S148/154
摘要： A method of producing so-called SOI structures according to this invention includes the step of forming an opening for seeding after an insulating layer of predetermined thickness has been formed on a first monocrystal silicon layer. Further, a non-monocrystal layer, e.g., a polycrystal silicon layer is formed on the surface of the insulating layer. The surface of the polycrystal silicon layer is smoothed as by grinding. A reflection-preventive film is formed on the smoothed surface of the polycrystal silicon layer. The reflection-preventive film has a thin film region whose reflectance is substantially zero and a thick film region having a predetermined reflectance. During laser annealing, the reflection-preventive film produces a predetermined temperature distribution in the polycrystal silicon layer. The polycrystal silicon layer which has melted according to this temperature distribution recrystallizes from adjacent the seed portion and thereby forms a new monocrystal silicon layer over the entire surface. The smoothing process for the polycrystal silicon layer prevents any change in the reflectance of the reflection-preventive film and improves control on the temperature distribution in the polycrystal silicon layer.
摘要翻译：根据本发明的制造所谓的SOI结构的方法包括在第一单晶硅层上形成预定厚度的绝缘层之后形成用于接种的开口的步骤。此外，在绝缘层的表面上形成非单晶层，例如多晶硅层。多晶硅层的表面通过研磨而平滑化。在多晶硅层的平滑表面上形成防反射膜。防反射膜具有反射率基本为零的薄膜区域和具有预定反射率的厚膜区域。在激光退火期间，防反射膜在多晶硅层中产生预定的温度分布。根据该温度分布熔融的多晶硅层从种子部分相邻再结晶，从而在整个表面上形成新的单晶硅层。多晶硅层的平滑处理防止防反射膜的反射率的任何变化，并且改善对多晶硅层中的温度分布的控制。

54. 发明授权

US5057452A Method of manufacturing a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US5057452A
公开(公告)日：1991-10-15
申请号：US650520
申请日：1991-02-05
申请人： Matthias J. J. Theunissen , Johanna M. L. Mulder , Jan Haisma , Wilhelmus P. M. Rutten
发明人： Matthias J. J. Theunissen , Johanna M. L. Mulder , Jan Haisma , Wilhelmus P. M. Rutten
IPC分类号： H01L21/20 , H01L21/285 , H01L21/321
CPC分类号： H01L21/2026 , H01L21/28525 , H01L21/321 , Y10S148/093 , Y10S148/154
摘要： The invention relates to a method of manufacturing a semiconductor device in which a polycrystalline or amorphous silicon oxide layer 3, which is provided on a silicon oxide layer 2 on a monocrystalline silicon substrate 1 and which is in contact with the silicon substrate 1 via an opening 4 in the silicon layer 2, is recrystallized by means of a heat treatment in the presence of means for concentrating the heat at the opening 4. In a simple and inexpensive manner, these means consist of a second silicon oxide layer 5 and a second polycrystalline silicon layer 6, the second silicon oxide layer 5 having a thickness at the openings 4 which is smaller than that of the rest of the layer 5.

55. 发明授权

US5045482A Method of making a tandem PIN semiconductor photoelectric conversion device 失效
标题翻译：制造串联PIN半导体光电转换装置的方法
公开(公告)号：US5045482A
公开(公告)日：1991-09-03
申请号：US536474
申请日：1990-06-12
申请人： Shunpei Yamazaki
发明人： Shunpei Yamazaki
IPC分类号： H01L31/0224 , H01L31/076 , H01L31/18
CPC分类号： H01L31/076 , H01L31/022466 , H01L31/1864 , Y02E10/548 , Y02P70/521 , Y10S148/004 , Y10S148/154 , Y10S438/931
摘要： A method of making a tandem type semiconductor photoelectric conversion device, comprising steps of: forming laminate member on a substrate by laminating first and second PIN structure of non-single crystal semiconductor in that order (or in the reverse order); forming an electrode on the laminate member; and crystallization an I-type layer of the second PIN structure by light irradiation (a) through the electrode (in this case, the electrode is transparent), or (b) from the side opposite from the substrate before formation of the electrode (or (a) from the side opposite from the substrate before formation of the first PIN structure, or (b) through the substrate (in this case, the substrate is transparent)).

56. 发明授权

US5024957A Method of fabricating a bipolar transistor with ultra-thin epitaxial base 失效
标题翻译：制造具有超薄外延基极的双极晶体管的方法
公开(公告)号：US5024957A
公开(公告)日：1991-06-18
申请号：US309510
申请日：1989-02-13
申请人： David L. Harame , Johannes M. C. Stork
发明人： David L. Harame , Johannes M. C. Stork
IPC分类号： H01L29/73 , H01L21/331 , H01L29/732
CPC分类号： H01L29/66287 , H01L29/66242 , H01L29/7322 , Y10S148/011 , Y10S148/154
摘要： A method of forming a bipolar transistor is provided, comprising the steps of: providing a semiconductor substrate including a first region of a first conductivity type; forming a layer of insulative material over a surface of the first region; forming a layer of conductive material over the layer of insulative material; patterning the first and second layers to form a generally vertical sidewall bounding an exposed portion of the first region surface; and epitaxially depositing a base region of a second conductivity type over the exposed portion of the first region surface and the sidewall such that the base region is in electrical contact with the second region.

57. 发明授权

US4935385A Method of forming intermediate buffer films with low plastic deformation threshold using lattice mismatched heteroepitaxy 失效
标题翻译：使用晶格失配的异质外延形成具有低塑性变形阈值的中间缓冲膜的方法
公开(公告)号：US4935385A
公开(公告)日：1990-06-19
申请号：US223036
申请日：1988-07-22
申请人： David K. Biegelsen
发明人： David K. Biegelsen
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L21/02381 , H01L21/0237 , H01L21/02439 , H01L21/02469 , H01L21/02474 , H01L21/02477 , H01L21/02546 , Y10S117/913 , Y10S148/025 , Y10S148/097 , Y10S148/149 , Y10S148/154 , Y10S438/933
摘要： Intermediate buffer films having a low plastic deformation threshold are provided for absorbing defects due to lattice mismatch and/or thermal coefficient of expansion mismatch between a substrate or layer support and an overlayer while concurrently providing a good template for subsequent crystalline growth at the overlayer. This is accomplished for diamond cubic structure substrates, such as Si or Ge or Si on sapphire or crystalline Si on glass, upon which are to be deposited lattice mismatch overlayers, such as, GaAs or ZnSe. Also, zinc blend type substrates, such as GaAs or InP may be employed with such intermediate buffer films. A characteristic of these intermediate buffer films is a substantially lower plastic deformation threshold compared to either the substrate support or the overlayer to be grown heteroepitaxially thereon. In particular, such high plastic deformable compound materials found suitable for such an intermediate buffer film are cubic III-V, II-VI or a I-VII zinc blend compound materials, respectively and specifically, (Zn.sub.X Cd.sub.Y Hg.sub.1-X-Y)(S.sub.A Se.sub.B Te.sub.1-A-B) and Cu(Cl.sub.X Br.sub.Y I.sub.1-X-Y) wherein X or Y respectively range between 0 and 1 such that X+ Y.ltoreq.1 and A and B respectively range between 0 and 1 such that A+B.ltoreq.1. Particular examples are GaAs, ZnSe, ZnS.sub.x Se.sub.1-x, CdS.sub.x Se.sub.1-x, HgS.sub.x Se.sub.1-x, CuCl, CuBr or CuI, et al.
摘要翻译：提供具有低塑性变形阈值的中间缓冲膜用于吸收由于晶格失配和/或基底或层载体与覆盖层之间的膨胀失配的热系数而引起的缺陷，同时为覆盖层上随后的晶体生长同时提供良好的模板。这对于金刚石立方结构衬底（例如蓝宝石上的Si或Ge或玻璃上的晶体Si），其上将沉积的晶格失配覆盖层（例如GaAs或ZnSe）而言是完成的。此外，可以使用诸如GaAs或InP的锌共混型衬底与这种中间缓冲膜。与衬底支撑体或异质外延生长的覆盖层相比，这些中间缓冲膜的特征是相当低的塑性变形阈值。特别地，适用于这种中间缓冲膜的这种高塑性可变形化合物材料分别是立方体III-V，II-VI或I-VII锌混合物，分别具体地（ZnXCdYHg1-XY）（SASeBTe1-AB）和Cu（ClXBrYI1-XY），其中X或Y分别在0和1之间变化，使得X + Y 1和A和B分别在0和1之间变化，使得A + B <1。具体实例是GaAs，ZnSe，ZnSxSe1-x，CdSxSe1-x，HgSxSe1-x，CuCl，CuBr或CuI等。

58. 发明授权

US4646427A Method of electrically adjusting the zener knee of a lateral polysilicon zener diode 失效
标题翻译：电子调整侧面多晶硅齐纳二极管的齐纳膝盖的方法
公开(公告)号：US4646427A
公开(公告)日：1987-03-03
申请号：US625751
申请日：1984-06-28
申请人： James T. Doyle
发明人： James T. Doyle
IPC分类号： G11C17/08 , G11C17/16 , H01L21/326 , H01L21/768 , H01L29/04 , H01L29/866
CPC分类号： H01L29/04 , G11C17/08 , G11C17/16 , H01L21/326 , H01L21/76888 , H01L29/866 , Y10S148/013 , Y10S148/018 , Y10S148/055 , Y10S148/122 , Y10S148/154 , Y10S148/174 , Y10S438/983
摘要： In a method of electrically altering the characteristics of a semiconductor device, a lateral polysilicon zener diode's zener knee voltage may be shifted either to a higher or lower voltage. An electrical potential may be applied in the forward direction to shift the zener knee to a higher voltage level. An electrical potential may be applied in the reverse bias direction to shift the zener knee to a lower voltage. In the limit, the zener may be changed into a forward diode of reverse polarity with respect to the original zener. The electrical potential used should be of appropriate magnitude to melt the polysilicon without damage to the zener's terminals. This induces migration of the impurities causing a rediffusion of impurities thereby altering the characteristics of the diode. This method may be used to program a PROM by either converting the zener to a diode or not to program each binary bit. The device may also be used as an analog memory element by setting an entire word equal to a predetermined zener knee voltage.
摘要翻译：在电子改变半导体器件的特性的方法中，横向多晶硅齐纳二极管的齐纳拐点电压可以移动到更高或更低的电压。可以向前方向施加电位以将齐纳膝盖移动到更高的电压水平。可以在反向偏置方向上施加电位以将齐纳膝盖移动到较低的电压。在极限情况下，可以将齐纳二极管变成相对于原始齐纳二极管的正极二极管。所使用的电位应该是适当的大小，以熔化多晶硅而不损坏齐纳尔的端子。这引起杂质的迁移，导致杂质的再扩散，从而改变二极管的特性。该方法可用于通过将齐纳二极管转换为二极管来编程PROM来对每个二进制位进行编程。该设备也可以通过设置等于预定的齐纳膝盖电压的整个字来用作模拟存储器元件。

59. 发明授权

US4590130A Solid state zone recrystallization of semiconductor material on an insulator 失效
标题翻译：半导体材料在绝缘体上的固态区重结晶
公开(公告)号：US4590130A
公开(公告)日：1986-05-20
申请号：US593064
申请日：1984-03-26
申请人： Harvey E. Cline
发明人： Harvey E. Cline
IPC分类号： C30B1/02 , H01L21/20 , B32B9/04 , B32B9/00 , B32B19/00
CPC分类号： C30B29/06 , C30B1/02 , H01L21/2022 , Y10S148/154
摘要： Dielectrically isolated, thin single crystal films of semiconductor material suitable for integrated circuit applications and preparation thereof by solid state zone recrystallization of a polycrystalline layer of the semiconductor material are disclosed.
摘要翻译：公开了适用于集成电路应用的半导体材料的绝缘隔离的薄单晶膜，并且通过半导体材料的多晶层的固态区再结晶制备它。

60. 发明授权

US3740261A Modified czochralski grown spinel substrate by solid state diffusion 失效
标题翻译：通过固体状态扩散改性CZOCHRALSKI GROWN螺旋柱基体
公开(公告)号：US3740261A
公开(公告)日：1973-06-19
申请号：US3740261D
申请日：1971-02-09
申请人： RCA CORP
发明人： BOLIN S
IPC分类号： B01J21/00 , C30B31/00 , C30B31/02 , H01L21/20 , B44D1/18
CPC分类号： B01J21/005 , C30B29/26 , C30B31/00 , C30B31/02 , H01L21/0242 , H01L21/02488 , H01L21/02532 , Y10S117/913 , Y10S148/154 , Y10S438/967
摘要： A MODIFIED SINGLE-CRYSTAL, MAGNESIUM ALUMINATE SPINEL WAFER IS FORMED FROM COMMERCIALLY AVAILABLE SPINEL BY A SOLID STATE DIFFUSION OF ALUMINA FROM SUBMICRON ALUMINA PARTICLES. THE RESULTANT WAFTER IS PARTICULARLY SUITED FOR USE AS AN EPITAXIAL SILICON UBSTRATE. A METHOD IS GIVEN FOR PRODUCING THESE MODIFIED SPINEL WAFTERS BY SOLID STATE DIFFUSION.

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