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51. 发明申请

US20130105788A1 OXIDE SEMICONDUCTOR, THIN FILM TRANSISTOR, AND DISPLAY DEVICE 审中-公开
标题翻译：氧化物半导体，薄膜晶体管和显示器件
公开(公告)号：US20130105788A1
公开(公告)日：2013-05-02
申请号：US13393335
申请日：2010-05-06
申请人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Takeshi Hara , Okifumi Nakagawa , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Yoshiyuki Harumoto , Kazuo Nakagawa , Hinae Mizuno
发明人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Takeshi Hara , Okifumi Nakagawa , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Yoshiyuki Harumoto , Kazuo Nakagawa
IPC分类号： H01L29/786
CPC分类号： H01L29/786 , G02F1/1368 , H01L29/7869
摘要： The present invention provides an oxide semiconductor capable of achieving a thin film transistor with excellent electric property and credibility, a thin film transistor having a channel layer formed of the oxide semiconductor, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, and includes Si, In, Zn, and O as constituent atoms.
摘要翻译：本发明提供一种能够实现电性能和可靠性优异的薄膜晶体管的氧化物半导体，具有由氧化物半导体形成的沟道层的薄膜晶体管，以及配备有该薄膜晶体管的显示装置。本发明的氧化物半导体是用于薄膜晶体管的氧化物半导体，并且包括Si，In，Zn和O作为构成原子。

52. 发明申请

US20130099227A1 OXIDE SEMICONDUCTOR, THIN FILM TRANSISTOR, AND DISPLAY DEVICE 审中-公开
标题翻译：氧化物半导体，薄膜晶体管和显示器件
公开(公告)号：US20130099227A1
公开(公告)日：2013-04-25
申请号：US13394343
申请日：2010-04-22
申请人： Okifumi Nakagawa , Hirohiko Nishiki , Yoshimasa Chikama , Yoshifumi Ohta , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Kazuo Nakagawa , Michiko Takei , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Okifumi Nakagawa , Hirohiko Nishiki , Yoshimasa Chikama , Yoshifumi Ohta , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Kazuo Nakagawa , Yuuji Mizuno , Michiko Takei , Yoshiyuki Harumoto
IPC分类号： H01L29/786
CPC分类号： H01L29/786 , G02F1/1368 , H01L29/7869
摘要： The present invention provides an oxide semiconductor capable of achieving a thin film transistor with excellent electric property, a thin film transistor having a channel layer formed of the oxide semiconductor, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, and includes Al, In, Zn, and O as constituent atoms.
摘要翻译：本发明提供能够实现电性能优异的薄膜晶体管的氧化物半导体，具有由氧化物半导体形成的沟道层的薄膜晶体管，以及配备有薄膜晶体管的显示装置。本发明的氧化物半导体是用于薄膜晶体管的氧化物半导体，并且包括Al，In，Zn和O作为构成原子。

53. 发明申请

US20130092923A1 ACTIVE MATRIX SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：主动矩阵基板及其制造方法
公开(公告)号：US20130092923A1
公开(公告)日：2013-04-18
申请号：US13521316
申请日：2011-01-12
申请人： Takeshi Hara , Hirohiko Nishiki , Yoshifumi Ohta , Yoshimasa Chikama , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Takeshi Hara , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Yoshimasa Chikama , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
IPC分类号： H01L29/786 , H01L29/66
CPC分类号： H01L29/786 , G02F1/136227 , H01L27/1214 , H01L27/1225 , H01L27/1248 , H01L27/1288 , H01L27/1292 , H01L29/66742
摘要： An active matrix substrate includes a plurality of pixel electrodes (19a) arranged in a matrix, and a plurality of TFTs (5a) connected to the respective corresponding pixel electrodes (19a). Each TFT (5a) includes a gate electrode (11aa) provided on an insulating substrate (10a), a gate insulating layer (12) covering the gate electrode (11aa), an oxide semiconductor layer (13a) provided on the gate insulating layer (12) over the gate electrode (11aa) and having a channel region (C), and a source electrode (16aa) and a drain electrode (16b) provided on the oxide semiconductor layer (13a), overlapping the gate electrode (11aa) and facing each other with the channel region (C) being interposed between the source and drain electrodes. A protection insulating layer (17) made of a spin-on glass material is provided on the channel region (C) of the oxide semiconductor layer (13a).
摘要翻译：有源矩阵基板包括以矩阵布置的多个像素电极（19a）和连接到各个相应的像素电极（19a）的多个TFT（5a）。每个TFT（5a）包括设置在绝缘基板（10a）上的栅电极（11aa），覆盖栅极电极（11aa）的栅极绝缘层（12），设置在栅极绝缘层上的氧化物半导体层 12a）和具有沟道区（C）的栅极电极（11a）和设置在氧化物半导体层（13a）上的源电极（16aa）和漏电极（16b），与栅极电极（11aa）和沟道区域（C）插入在源极和漏极之间彼此面对。在氧化物半导体层（13a）的沟道区（C）上设置由旋涂玻璃材料制成的保护绝缘层（17）。

54. 发明申请

US20130023086A1 ACTIVE MATRIX SUBSTRATE, DISPLAY PANEL PROVIDED WITH SAME, AND METHOD FOR MANUFACTURING ACTIVE MATRIX SUBSTRATE 审中-公开
标题翻译：有源矩阵基板，与其相同的显示面板以及制造有源矩阵基板的方法
公开(公告)号：US20130023086A1
公开(公告)日：2013-01-24
申请号：US13517079
申请日：2010-08-23
申请人： Yoshimasa Chikama , Hiromitsu Katsui , Hirohiko Nishiki , Yoshifumi Ohta , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Yoshimasa Chikama , Hiromitsu Katsui , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
IPC分类号： H01L21/336
CPC分类号： H01L27/1225 , G02F1/136213 , G02F1/1368 , G02F2001/13606 , G02F2001/136231 , G02F2001/136236 , G02F2201/501 , H01L27/1248 , H01L27/1288
摘要： An active matrix substrate includes a plurality of pixel electrodes (P) provided in a matrix, and a plurality of TFTs (5) connected to the pixel electrodes (P). Each of the TFTs (5) includes a gate electrode (11a) provided on an insulating substrate, a gate insulating film (12a) provided to cover the gate electrode (11a), an oxide semiconductor layer (13a) provided on the gate insulating film (12a) to overlap the gate electrode (11a), and a source electrode (17a) and a drain electrode (17b) facing each other and being connected to the oxide semiconductor layer (13a). A protective insulating film (14a) is provided between the oxide semiconductor layer (13a) and the source and drain electrodes (17a) and (17b) to cover the oxide semiconductor layer (13a).
摘要翻译：有源矩阵基板包括设置在矩阵中的多个像素电极（P）和连接到像素电极（P）的多个TFT（5）。每个TFT（5）包括设置在绝缘基板上的栅极电极（11a），设置成覆盖栅极电极（11a）的栅极绝缘膜（12a），设置在栅极绝缘膜上的氧化物半导体层（12a）与栅极电极（11a）重叠，并且与氧化物半导体层（13a）连接的源电极（17a）和漏电极（17b）彼此相对。在氧化物半导体层（13a）和源极和漏极（17a）和（17b）之间设置保护绝缘膜（14a）以覆盖氧化物半导体层（13a）。

55. 发明申请

US20120108018A1 METHOD FOR MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE 有权
标题翻译：制造薄膜晶体管基板的方法
公开(公告)号：US20120108018A1
公开(公告)日：2012-05-03
申请号：US13383220
申请日：2010-03-16
申请人： Tohru Okabe , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara
发明人： Tohru Okabe , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara
IPC分类号： H01L21/336
CPC分类号： H01L29/7869 , G02F1/1368 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L29/42384
摘要： A method for manufacturing a thin film transistor substrate includes a step of forming a gate electrode (11a) and a first interconnect on a substrate (10), a step of forming a gate insulating film (12a) having a contact hole at a position overlapping the first interconnect, a step of forming a source electrode (13a) and a drain electrode (13b) overlapping the gate electrode (11a) and separated apart from each other, and a second interconnect connected via the contact hole to the first interconnect, a step of successively forming an oxide semiconductor film (14) and a second insulating film (15), and thereafter, patterning the second insulating film (15) to form an interlayer insulating film (15a), and a step of reducing the resistance of the oxide semiconductor film (14) exposed through the interlayer insulating film (15a) to form a pixel electrode (14b).
摘要翻译：制造薄膜晶体管基板的方法包括在基板（10）上形成栅极（11a）和第一布线的步骤，在重叠的位置形成具有接触孔的栅极绝缘膜（12a）的步骤所述第一互连，形成与所述栅电极（11a）重叠并分离的源电极（13a）和漏电极（13b）的步骤，以及经由所述接触孔与所述第一互连件连接的第二互连件，连续地形成氧化物半导体膜（14）和第二绝缘膜（15）的步骤，然后对第二绝缘膜（15）进行图案化以形成层间绝缘膜（15a），并且降低氧化物半导体膜（14）通过层间绝缘膜（15a）露出以形成像素电极（14b）。

56. 发明授权

US07957151B2 Circuit component, electrode connection structure and display device including the same 有权
标题翻译：电路部件，电极连接结构和包括其的显示装置
公开(公告)号：US07957151B2
公开(公告)日：2011-06-07
申请号：US12063152
申请日：2006-10-30
申请人： Tetsuya Aita , Yoshimasa Chikama
发明人： Tetsuya Aita , Yoshimasa Chikama
IPC分类号： H05K1/00
CPC分类号： H05K3/323 , G02F1/13452 , H01L24/16 , H01L24/83 , H01L2224/05572 , H01L2224/05573 , H01L2224/2929 , H01L2224/293 , H01L2224/83192 , H01L2224/83851 , H01L2924/00014 , H01L2924/01004 , H01L2924/01078 , H01L2924/01079 , H01L2924/07802 , H05K3/3452 , H05K3/386 , H05K3/388 , H05K2201/0179 , H05K2201/0989 , H05K2201/10674 , H01L2924/3512 , H01L2924/00 , H01L2924/0665 , H01L2224/05599
摘要： An electrode connection structure including a first circuit component including a resin plate, a barrier film stacked on a surface of the resin plate, a circuit section formed on the barrier film and a first electrode provided on the surface of the resin plate on which the barrier film is stacked, and a second circuit component arranged to face the first circuit component and having a second electrode facing the first electrode, wherein the first and second electrodes are electrically connected via pressure applied thereto in the directions approaching each other and a portion of the barrier film surrounding the first electrode is at least partially removed from the surface of the resin plate.
摘要翻译：一种电极连接结构，包括：第一电路部件，包括树脂板，层叠在树脂板的表面上的阻挡膜，形成在阻挡膜上的电路部分和设置在树脂板的表面上的第一电极，并且第二电路部件布置成面向第一电路部件并且具有面向第一电极的第二电极，其中第一和第二电极经由施加到其上的压力在彼此接近的方向上电连接，并且部分围绕第一电极的阻挡膜至少部分地从树脂板的表面去除。

57. 发明申请

US20100316870A1 MANUFACTURING METHOD FOR DISPLAY DEVICE AND DISPLAY DEVICE 有权
标题翻译：用于显示设备和显示设备的制造方法
公开(公告)号：US20100316870A1
公开(公告)日：2010-12-16
申请号：US12526288
申请日：2008-01-11
申请人： Tohru Okabe , Yoshimasa Chikama
发明人： Tohru Okabe , Yoshimasa Chikama
IPC分类号： B32B33/00
CPC分类号： G02F1/1333 , G02F1/1303 , G02F2001/133302 , Y10T428/266
摘要： A method for manufacturing a display device includes a first step of preparing a first substrate which has a first area to be etched and a second area located at a periphery of the first area and which has a display element on its surface, a second step of etching and removing the first area of the first substrate, a third step of forming a second substrate on a surface of the first substrate that is opposite to the surface on which the display element is located, and a fourth step of removing the second area of the first substrate.
摘要翻译：一种制造显示装置的方法包括：制备具有第一待蚀刻区域的第一基板和位于第一区域周边的第二区域并在其表面上具有显示元件的第一步骤，第二步骤蚀刻和去除第一衬底的第一区域;第三步骤，在与第一衬底的与显示元件所在的表面相对的表面上形成第二衬底;以及第四步骤，第一个底物。

58. 发明授权

US06897135B2 Method for fabricating metal interconnections 有权
标题翻译：制造金属互连的方法
公开(公告)号：US06897135B2
公开(公告)日：2005-05-24
申请号：US10138755
申请日：2002-05-03
申请人： Yoshihiro Izumi , Yoshimasa Chikama
发明人： Yoshihiro Izumi , Yoshimasa Chikama
IPC分类号： G09F9/30 , G02F1/1343 , H01L21/288 , H01L21/3205 , H01L21/44 , H01L21/4763 , H01L21/768 , H01L29/49 , H01L29/786
CPC分类号： H01L21/76838 , H01L29/4908
摘要： In the present method for fabricating metal interconnections, a Ni film is deposited on an insulating substrate by electroless plating, and a photoresist film is formed in a specified pattern on the Ni film. An Au film is deposited by electroless plating in a region where the Ni film is exposed and where the resist is not formed. The photoresist film is removed, and the Ni film exposed by the removal of the photoresist film is removed by etching. A Cu film is formed on the Au film by electroplating or electroless plating selectively. This method consists of only wet deposition process, involves less etching process and provides metal interconnections of low resistance.
摘要翻译：在本发明的金属互连制造方法中，通过化学镀将Ni膜沉积在绝缘基板上，并且在Ni膜上以规定的图案形成光致抗蚀剂膜。通过无电镀在沉积Ni膜的区域中沉积Au膜，并且不形成抗蚀剂。去除光致抗蚀剂膜，通过蚀刻去除通过去除光致抗蚀剂膜曝光的Ni膜。选择性地通过电镀或无电镀在Au膜上形成Cu膜。该方法仅包括湿式沉积工艺，涉及较少的蚀刻工艺，并提供低电阻的金属互连。

59. 发明授权

US06802985B1 Method for fabricating metal wirings 失效
标题翻译：制造金属布线的方法
公开(公告)号：US06802985B1
公开(公告)日：2004-10-12
申请号：US09648657
申请日：2000-08-25
申请人： Yoshimasa Chikama , Yoshihiro Izumi
发明人： Yoshimasa Chikama , Yoshihiro Izumi
IPC分类号： C25D554
CPC分类号： H05K3/182 , C23C2/02 , C25D1/04 , C25D5/022 , C25D5/54
摘要： There is provided a method for fabricating electrical wirings capable of being manufactured with low cost and easily applied to large-scale substrates. A photosensitive ground resin film is formed on an insulating substrate by coating process. The ground resin film is subjected to exposure and development processes, by which a ground resin film patterned into a wiring pattern is obtained. Then, on the patterned ground resin film, a low-resistance metal film made of Cu is formed by electroless plating.
摘要翻译：提供了一种制造能够以低成本制造且易于应用于大尺寸基板的电气布线的方法。通过涂布工艺在绝缘基板上形成感光性研磨树脂膜。对研磨树脂膜进行曝光和显影处理，由此获得图案化为布线图案的研磨树脂膜。然后，在图案化的研磨树脂膜上，通过无电镀形成由Cu制成的低电阻金属膜。

60. 发明授权

US06750475B1 Method for fabricating electric interconnections and interconnection substrate having electric interconnections fabricated by the same method 有权
公开(公告)号：US06750475B1
公开(公告)日：2004-06-15
申请号：US09573464
申请日：2000-05-17
申请人： Yoshihiro Izumi , Yoshimasa Chikama , Hisao Ochi
发明人： Yoshihiro Izumi , Yoshimasa Chikama , Hisao Ochi
IPC分类号： H01L2943
CPC分类号： H01L21/288 , H01L27/12 , H01L27/1285 , H01L27/1292 , H01L27/14609 , H01L27/14676 , H01L27/3244 , H01L29/4908
摘要： An oxide film is formed on an insulating substrate by means of a wet type film forming technique such as a sol-gel method, a chemical deposition method or a liquid phase deposition method. Next, the oxide film is patterned according to the shape of interconnections. Then, a metal film made of Ni is formed on an oxide film pattern by such a wet type film forming technique as a wet type plating method. Further, a metal film made of Au that has a low resistance is laminated on the metal film made of Ni by electroless plating, and a metal film made of Cu that has a low resistance and is low cost is laminated on the Au film by electroplating. Thus, by the above method for manufacturing electric interconnections, a large-area interconnection substrate for a display device and an image detector is able to be fabricated at low cost without using a vacuum film forming apparatus.

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