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51. 发明授权

US08274642B2 Maskless exposure method 有权
标题翻译：无掩膜曝光方法
公开(公告)号：US08274642B2
公开(公告)日：2012-09-25
申请号：US12390687
申请日：2009-02-23
申请人： Hiroyasu Matsuura , Seiji Ishikawa , Tadamichi Wachi , Toshimasa Ishigaki
发明人： Hiroyasu Matsuura , Seiji Ishikawa , Tadamichi Wachi , Toshimasa Ishigaki
IPC分类号： G03B27/32 , G03B27/44 , G03B27/42
CPC分类号： G03F7/70791 , G03F7/70433
摘要： A maskless exposure method of drawing a circuit pattern includes: moving a substrate with respect to a projection optical system; scanning, by the projection optical system, the substrate in a first direction; shifting a scanning region in a second direction; scanning the substrate in the first direction so that an overlapping part is formed. A plurality of marks different from the circuit pattern are exposed in a vicinity of the overlapping part. The plurality of marks are a set of marks at least including two marks disposed on one side of the overlapping part and two marks disposed on another side of the overlapping part. Deviations between the pair of the scanning regions, an inclination of exposing light, and a yawing angle of a stage are analyzed by measuring deviations of distances among the plurality of marks. Calibration data are obtained from a result of the analyzing.
摘要翻译：绘制电路图案的无掩模曝光方法包括：相对于投影光学系统移动基板; 通过投影光学系统沿第一方向扫描基板; 沿第二方向移动扫描区域; 在第一方向扫描基板，从而形成重叠部分。与电路图案不同的多个标记在重叠部分附近露出。多个标记是至少包括设置在重叠部分的一侧上的两个标记和设置在重叠部分的另一侧上的两个标记的一组标记。通过测量多个标记之间的距离的偏差来分析一对扫描区域之间的偏差，曝光的倾斜度和舞台的偏航角度。校准数据是从分析结果中获得的。

52. 发明授权

US07945410B2 Semiconductor device yield prediction system and method 失效
标题翻译：半导体器件产量预测系统及方法
公开(公告)号：US07945410B2
公开(公告)日：2011-05-17
申请号：US11836199
申请日：2007-08-09
申请人： Natsuyo Morioka , Seiji Ishikawa , Katsumi Ikegaya , Yasunori Yamaguchi , Kazuo Ito , Yuichi Hamamura
发明人： Natsuyo Morioka , Seiji Ishikawa , Katsumi Ikegaya , Yasunori Yamaguchi , Kazuo Ito , Yuichi Hamamura
IPC分类号： G01N37/00 , G06F19/00
CPC分类号： G05B15/02 , G05B17/02
摘要： An average fault ratio is calculated from product characteristics of a product as a target of yield prediction, in order to predict yield accurately in the course of manufacturing the prediction target product.With respect to a reference product, whose wiring pattern is different from the prediction target product but manufactured by the same manufacturing process, a monthly electric fault density is calculated from actually measured data. Respective average fault ratios are obtained from product characteristics of the prediction target product and the reference product. A monthly electric fault density of the prediction target product is obtained by multiplying the monthly electric fault density of the reference product by the ratio of the average fault ratios. The yield is calculated by using the monthly electric fault density of the month in which a yield prediction target lot of the prediction target product was processed.
摘要翻译：从作为产量预测目标的产品的产品特性计算平均故障率，以便在制造预测目标产品的过程中准确地预测产量。对于其参考产品，其布线图案与预测目标产品不同但通过相同的制造工艺制造，每月电故障密度由实际测量数据计算。相应的平均故障率是从预测目标产品和参考产品的产品特性获得的。通过将参考产品的每月电气故障密度乘以平均故障率的比率来获得预测目标乘积的每月电气故障密度。通过使用处理预测目标产品的产量预测目标批次的月份的每月电气故障密度来计算产量。

53. 发明申请

US20080241486A1 Liquid Crystal Display Device with Evaluation Patterns Disposed Thereon, and Method for Manufacturing the Same 审中-公开
标题翻译：具有评估模式的液晶显示装置及其制造方法
公开(公告)号：US20080241486A1
公开(公告)日：2008-10-02
申请号：US12055501
申请日：2008-03-26
申请人： Seiji Ishikawa , Hiroyasu Matsuura , Yuichi Hamamura , Tadamichi Wachi
发明人： Seiji Ishikawa , Hiroyasu Matsuura , Yuichi Hamamura , Tadamichi Wachi
IPC分类号： G03F7/20 , B32B5/00
CPC分类号： G03F9/7003 , G03F7/70275 , G03F7/70383 , G03F7/70475 , G03F7/70791 , Y10T428/24802
摘要： Direct exposure equipment having a multiple heads generally conducts overlapping exposure at an exposure area boundary between the heads. In such a case, if the heads are misaligned, a flaw will occur in a pattern shape at an area that is subject to overlapping exposure. To overcome this, TEGs are disposed for evaluating line width and resistance at an overlapping exposure area between the exposure heads and at a returning exposure area formed when direct exposure equipment having a multi-head configuration exposes a substrate. By examining measured values from these TEGs, a misalignment in the multiple exposure heads is detected.
摘要翻译：具有多个头部的直接曝光设备通常在头部之间的曝光区域边界处进行重叠曝光。在这种情况下，如果头部不对准，则在受到重叠曝光的区域上的图案形状的缺陷将发生。为了克服这个原因，TEG被设置用于评估曝光头之间的重叠曝光区域和在具有多头构造的直接曝光设备暴露基板时形成的返回曝光区域的线宽和电阻。通过检查这些TEG的测量值，检测多个曝光头中的未对准。

54. 发明申请

US20070247937A1 INFORMATION PROCESSING SYSTEM FOR CALCULATING THE NUMBER OF REDUNDANT LINES OPTIMAL FOR MEMORY DEVICE 审中-公开
标题翻译：用于计算存储器件最佳冗余线数量的信息处理系统
公开(公告)号：US20070247937A1
公开(公告)日：2007-10-25
申请号：US11736435
申请日：2007-04-17
申请人： Ichiro Moriyama , Seiji Ishikawa
发明人： Ichiro Moriyama , Seiji Ishikawa
IPC分类号： G11C29/00
CPC分类号： G11C29/56 , G11C29/56008 , G11C29/72
摘要： An information processing system of the invention has a database in which test results for a plurality of memory devices mounted on a wafer are stored and a computer for analyzing the test results. The computer includes a data retrieval section for retrieving a test result from the database; and a required redundant line quantity calculation section for determining the total number of redundant lines which is required for recovering failed bits of the memory device based on the test results, deciding how the required total number of redundant lines should be assigned in each of the row and column directions, and calculating the total number of redundant lines required for recovery and the number of redundant lines assigned in each of the row and columns directions on the memory device, and the computer displays a result of calculation by the required redundant line quantity calculation section.
摘要翻译：本发明的信息处理系统具有数据库，其中存储安装在晶片上的多个存储器件的测试结果和用于分析测试结果的计算机。计算机包括用于从数据库检索测试结果的数据检索部分; 以及所需的冗余线路量计算部分，用于基于测试结果来确定用于恢复存储器件的故障比特所需的冗余线路的总数，决定如何在每行中分配所需的冗余线路总数和列方向，以及计算恢复所需的冗余线路总数和在存储设备上的行和列方向中的每一个方向上分配的冗余线路数量，并且计算机根据所需的冗余线路数量计算显示计算结果部分。

55. 发明授权

US07150386B2 Systems and structures for supporting vibrators 有权
标题翻译：用于支撑振动器的系统和结构
公开(公告)号：US07150386B2
公开(公告)日：2006-12-19
申请号：US10346661
申请日：2003-01-17
申请人： Seiji Ishikawa , Takayuki Kikuchi
发明人： Seiji Ishikawa , Takayuki Kikuchi
IPC分类号： H01L41/053
CPC分类号： G01C19/5783
摘要： An object of the present invention is to provide a novel system for supporting a vibrator having a terminal for electrical connection so that the vibrator may be miniaturized and the deviation of vibration property among vibrators mounted on the supporting systems may be prevented. The supporting system has a substrate 11 and bonding wires 9, 10 supported on the substrate 11 and to be joined with a vibrator 1. The vibrator 1 is supported with the bonding wires 9, 10 so that the vibrator 1 does not directly contact the substrate 11 and bonding wires 9, 10 are electrically connected with a terminal 6 of the vibrator 1.
摘要翻译：本发明的目的是提供一种用于支撑具有用于电连接的端子的振动器的新型系统，使得振动器可以小型化，并且可以防止安装在支撑系统上的振动器之间的振动特性的偏差。支撑系统具有基板11和支撑在基板11上并与振动器1接合的接合线9,10。振动器1由接合线9,10支撑，使得振动器1不直接接触基板11，并且接合线9,10与振动器1的端子6电连接。

56. 发明授权

US06404911B2 Semiconductor failure analysis system 失效
标题翻译：半导体故障分析系统
公开(公告)号：US06404911B2
公开(公告)日：2002-06-11
申请号：US09731745
申请日：2000-12-08
申请人： Kazuko Ishihara , Seiji Ishikawa , Masao Sakata , Isao Miyazaki , Yoshiyuki Miyamoto , Jun Nakazato
发明人： Kazuko Ishihara , Seiji Ishikawa , Masao Sakata , Isao Miyazaki , Yoshiyuki Miyamoto , Jun Nakazato
IPC分类号： G06K900
CPC分类号： H01L22/20 , G01N21/88 , G01N21/956
摘要： A semiconductor failure analysis system and method therefor facilitated by a failure information collection unit for collection, by bit, failure information of a semiconductor, an inspection unit for examining relations between various types of inspection data obtained by inspection of the semiconductor and for examining relations between the inspection data and failure information, a storage unit for storing design information of the semiconductor, an analysis unit for analyzing the failure information from the failure information collection unit, from the inspection unit and design information stored in the storage unit, a display unit for displaying at least one of the result of analysis from the analysis unit and the failure information, a failure cause estimation unit for estimating a cause of the failure information, and a unit for feeding the estimated cause of the failure information back to a process in which the failure has occurred.
摘要翻译：一种半导体故障分析系统及其方法，由用于收集半导体的故障信息的故障信息收集单元，用于检查通过半导体检查获得的各种检查数据之间的关系的检查单元以及用于检查检查数据和故障信息，用于存储半导体的设计信息的存储单元，用于从故障信息收集单元分析故障信息的分析单元和存储在存储单元中的设计信息的显示单元，显示来自分析单元的分析结果和故障信息中的至少一个;故障原因估计单元，用于估计故障信息的原因;以及单元，用于将故障信息的估计原因反馈到其中发生故障。

57. 发明授权

US06185324B2 Semiconductor failure analysis system 失效
标题翻译：半导体故障分析系统
公开(公告)号：US06185324B2
公开(公告)日：2001-02-06
申请号：US08381490
申请日：1995-01-31
申请人： Kazuko Ishihara , Seiji Ishikawa , Masao Sakata , Isao Miyazaki , Yoshiyuki Miyamoto , Jun Nakazato
发明人： Kazuko Ishihara , Seiji Ishikawa , Masao Sakata , Isao Miyazaki , Yoshiyuki Miyamoto , Jun Nakazato
IPC分类号： G06K900
CPC分类号： H01L22/20 , G01N21/88 , G01N21/956
摘要： A semiconductor failure analysis system which includes a failure information collection unit for collecting, by bit, failure information concerned with a failure of a semiconductor, an inspection unit for examining relations between various types of inspection data obtained by inspection of the semiconductor and for examining relations between said inspection data and the failure information, a storage unit for storing information concerned with design of said semiconductor, an analysis unit for analyzing the failure information on the basis of output information output from the failure information collection unit, output information output from the inspection unit and design information stored in the storage unit, a display unit for displaying at least one of the result of analysis output from the analysis unit and the failure information, a failure cause estimation unit for estimating a cause of said failure information, and an unit for feeding the estimated cause of said failure information back to a process in which the failure has occurred.
摘要翻译：一种半导体故障分析系统，包括故障信息收集单元，用于逐位地收集与半导体故障有关的故障信息;检查单元，用于检查通过半导体检查获得的各种检查数据与检查关系之间的关系在所述检查数据和故障信息之间，存储单元，用于存储与所述半导体的设计有关的信息;分析单元，用于基于从故障信息收集单元输出的输出信息分析故障信息，从检查输出的输出信息存储在存储单元中的单元和设计信息，用于显示从分析单元输出的分析结果和故障信息中的至少一个的显示单元，用于估计所述故障信息的原因的故障原因估计单元，以及单元用于喂养所述故障inf的估计原因还原到发生故障的过程。

58. 发明授权

US5931890A Positioning system utilizing GPS satellites 失效
标题翻译： GPS卫星定位系统
公开(公告)号：US5931890A
公开(公告)日：1999-08-03
申请号：US808955
申请日：1997-02-19
申请人： Yoshihisa Suwa , Seiji Ishikawa , Tomohiro Yamamoto , Takeshi Ito , Tomio Yasuda
发明人： Yoshihisa Suwa , Seiji Ishikawa , Tomohiro Yamamoto , Takeshi Ito , Tomio Yasuda
IPC分类号： G01C21/00 , G01S1/00 , G01S19/22 , G01S19/28 , G01S19/49 , G06F165/00
CPC分类号： G01S19/42 , G01S19/22 , G01S19/28
摘要： A positioning system is disclosed in which a rate of change .DELTA..DELTA.f in a Doppler shift .DELTA.f of the radio wave transmitted from a GPS satellite is detected in order to determine whether or not an extraordinary radio wave as caused by a multi-path or the like is being received, and a GPS satellite from which an extraordinary radio wave is received is excluded from a group of GPS satellites which are utilized in a positioning calculation. A difference .DELTA.f between a signal frequency f0 transmitted from a GPS satellite and a signal frequency fR receiver is calculated, and a rate of change .DELTA..DELTA.f in the difference .DELTA.f is also calculated. The position of a receiver is calculated on the basis of information transmitted from a plurality of GPS satellites for which the rate of change .DELTA..DELTA.f is equal to or less than a first threshold value, or .DELTA..DELTA.f.ltoreq.30 Hz/s, and the azimuth of a traveling direction of the receiver is calculated on the basis of information transmitted from a plurality of GPS satellites for which the rate of change .DELTA..DELTA.f is equal to or less than a second smaller threshold value or .DELTA..DELTA.f.ltoreq.15 Hz/s.
摘要翻译：公开了一种定位系统，其中检测到从GPS卫星发射的无线电波的多普勒频移DELTA f中的变化率DELTA DELTA f，以便确定由多路径引起的非凡无线电波正在接收，并且从定位计算中使用的一组GPS卫星中排除从其接收非正常无线电波的GPS卫星。计算从GPS卫星发送的信号频率f0和信号频率fR接收机之间的差ΔTA，并且还计算差ΔTATA中的变化率DELTA DELTA f。基于从变化率DELTA DELTA f等于或小于第一阈值或DELTA DELTA f 30Hz / s的多个GPS卫星发送的信息来计算接收机的位置并且基于从其变化率DELTA DELTA f等于或小于第二较小阈值或DELTA DELTA f'的多个GPS卫星发送的信息来计算接收机的行进方向的方位角， / = 15Hz / s。

59. 发明授权

US5841893A Inspection data analyzing system 失效
公开(公告)号：US5841893A
公开(公告)日：1998-11-24
申请号：US908550
申请日：1992-06-30
申请人： Seiji Ishikawa , Masao Sakata , Jun Nakazato , Sadao Shimoyashiro , Hiroto Nagatomo , Yuzo Taniguchi , Osamu Satou , Tsutomu Okabe , Yuzaburo Sakamoto , Kimio Muramatsu , Kazuhiko Matsuoka , Taizo Hashimoto , Yuichi Ohyama , Yutaka Ebara , Isao Miyazaki , Shuichi Hanashima
发明人： Seiji Ishikawa , Masao Sakata , Jun Nakazato , Sadao Shimoyashiro , Hiroto Nagatomo , Yuzo Taniguchi , Osamu Satou , Tsutomu Okabe , Yuzaburo Sakamoto , Kimio Muramatsu , Kazuhiko Matsuoka , Taizo Hashimoto , Yuichi Ohyama , Yutaka Ebara , Isao Miyazaki , Shuichi Hanashima
IPC分类号： H01L21/66 , G01N21/88 , G01N21/956 , G06K9/00
CPC分类号： G01N21/88 , G01N21/956 , H01L22/20 , H01L2924/0002
摘要： The present invention provides data analysis stations respectively for a probing tester and an automatic particle inspection machine. And, in the data analysis station, the coordinates on which the disposition of the chips are described on a product basis are equal to those on which the locations of the defects are described. Further, the station provides a function of determining which of the chips each defect belongs to. These data analysis stations are connected through a communication line. The present invention is capable of analyzing the data on a chip basis, resulting in being able to grasp the relation between how the defects are caused on each chip and the product character of the chip.

60. 发明授权

US5779426A Loading and unloading unit for polishing apparatus 失效
标题翻译：抛光装置的装卸单元
公开(公告)号：US5779426A
公开(公告)日：1998-07-14
申请号：US677732
申请日：1996-07-08
申请人： Seiji Ishikawa , Takao Mitsukura
发明人： Seiji Ishikawa , Takao Mitsukura
IPC分类号： B24B37/00 , B24B37/04 , B24B37/30 , B24B41/00 , B24B47/02
CPC分类号： B24B37/345 , B24B41/005 , Y10T29/47
摘要： A polishing apparatus has a turntable and a top ring for gripping a semiconductor wafer to be polished by an abrasive cloth on the turntable. The polishing apparatus incorporates a loading and unloading unit having a supply holder for holding and supplying a semiconductor wafer to be polished to the top ring at a transfer position, and a reception holder for receiving a polished semiconductor wafer from the top ring at the transfer position. The reception holder and the supply holder are mounted on respective opposite ends of a support block which is angularly movable in a vertical plane by a turning mechanism for moving the supply holder and the reception holder alternatively to the transfer position.
摘要翻译：抛光装置具有转盘和顶环，用于夹持通过研磨布在转台上抛光的半导体晶片。抛光装置包括装载和卸载单元，该装载和卸载单元具有用于在转移位置处将要抛光的半导体晶片保持并提供给顶环的供应保持器，以及用于在转移位置处从顶环接收抛光的半导体晶片的接收保持器。接收支架和供电保持器安装在支撑块的相应的相对端上，支撑块的相对的两端可通过转动机构在垂直平面内成角度地移动，用于将供应架和接收架交替地移动到转移位置。

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