专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 发明授权

US6013943A Etch stop for use in etching of silicon oxide 失效
标题翻译：蚀刻停止用于蚀刻氧化硅
公开(公告)号：US6013943A
公开(公告)日：2000-01-11
申请号：US850461
申请日：1997-05-05
申请人： David A. Cathey , J. Brett Rolfson , Valerie A. Ward , Karen M. Winchester
发明人： David A. Cathey , J. Brett Rolfson , Valerie A. Ward , Karen M. Winchester
IPC分类号： H01L21/311 , H01L21/318 , H01L23/58
CPC分类号： H01L21/31116 , H01L21/3185 , Y10S438/97
摘要： A etch stop layer for use in a silicon oxide dry fluorine etch process is made of silicon nitride with hydrogen incorporated in it either in the form of N--H bonds, O--H bonds, or entrapped free hydrogen. The etch stop layer is made by either increasing the NH.sub.3 flow, decreasing the SiH.sub.4 flow, decreasing the nitrogen flow, or all three, in a standard PECVD silicon nitride fabrication process. The etch stop can alternatively be made by pulsing the RF field in either a PECVD process or an LPCVD process.
摘要翻译：用于氧化硅干氟蚀刻工艺中的蚀刻停止层由氮化物制成，其中以氢键连接在其中，其形式为N-H键，O-H键或截留的游离氢。蚀刻停止层是通过在标准PECVD氮化硅制造工艺中增加NH 3流，降低SiH4流量，降低氮气流量或全部三种来制备的。替代地，蚀刻停止可以通过在PECVD工艺或LPCVD工艺中脉冲RF场来制造。

52. 发明授权

US6001189A Method for reducing gaseous species of contamination in wet processes 失效
公开(公告)号：US6001189A
公开(公告)日：1999-12-14
申请号：US724578
申请日：1996-09-30
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： B08B3/04 , B08B3/14 , H01L21/00 , H01L21/306 , C02F1/20
CPC分类号： H01L21/02052 , B01D19/0036 , B01D19/0068 , B08B3/04 , B08B3/14 , H01L21/67057 , H01L21/67086 , Y10S134/902 , Y10S438/906
摘要： A method for wet processing of a semiconductor-containing substrate that reduces contamination in the wet process by removing undesired sources of gas contamination, the method comprising: pumping a processing liquid through a degasifier, exposing the semiconductor wafer, in a vessel, to the degasified processing liquid; and optionally recirculating the processing liquid through the degasifier and back into the vessel.

53. 发明授权

US5804336A Method of forming opaque border on semiconductor photomask 失效
标题翻译：在半导体光掩模上形成不透明边界的方法
公开(公告)号：US5804336A
公开(公告)日：1998-09-08
申请号：US696173
申请日：1996-08-13
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： G03F1/00 , G03F1/26 , G03F1/32 , G03F9/00
CPC分类号： G03F1/32 , G03F1/26
摘要： The present invention provides a method of fabricating photomasks having a border region and a pattern region, which may be electrically isolated. The border region may include a nontransparent region, such as an opaque chrome layer. The pattern region may include a substantially nontransparent region, such as a leaky chrome layer. The methods of the present invention include placing the photomask in an electrochemical cell and electrically connecting a portion of the photomask to an electrode, and applying a potential, thereby electrochemically transferring a layer between the electrochemical cell and the photomask.
摘要翻译：本发明提供一种制造具有边界区域和图案区域的光掩模的方法，其可以是电隔离的。边界区域可以包括不透明区域，例如不透明铬层。图案区域可以包括基本不透明的区域，例如渗漏铬层。本发明的方法包括将光掩模放置在电化学电池中并将光掩模的一部分电连接到电极，并施加电位，从而在电化学电池和光掩模之间电化学转移一层。

54. 发明授权

US5786116A Atom lithographic mask having diffraction grating aligned with primary mask pattern 失效
$Atom lithographic mask having diffraction grating aligned with primary mask pattern$
标题翻译：具有与原始掩模图案对准的衍射光栅的原子光刻掩模
公开(公告)号：US5786116A
公开(公告)日：1998-07-28
申请号：US799166
申请日：1997-02-14
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： G03F1/00 , G03F1/34 , G03F7/20 , G03F9/00
CPC分类号： G03F7/70125 , G03F1/50 , G03F7/70283 , G03F1/34
摘要： An ATOM lithographic mask includes a transparent substrate having both a primary mask pattern and a diffraction grating. The diffraction grating includes chromeless phase shifters configured to diffract exposure energy directed through the substrate to provide off axis illumination for the primary mask pattern. The primary mask pattern can include a patterned opaque layer having an alignment mark formed therein. The alignment mark can be used during fabrication of the mask for accurately aligning the grating pattern and the primary mask pattern. Because of the accurate alignment, the layout, orientation and pitch of the diffraction grating with respect to the primary mask pattern, can be selected to optimize image formation from the mask pattern.
摘要翻译： ATOM光刻掩模包括具有主掩模图案和衍射光栅两者的透明基板。衍射光栅包括无铬移相器，其被配置为衍射穿过衬底的曝光能量，以为初级掩模图案提供离轴照明。主掩模图案可以包括其中形成有对准标记的图案化不透明层。可以在制造掩模期间使用对准标记，以精确对准光栅图案和主掩模图案。由于精确对准，可以选择衍射光栅相对于主掩模图案的布局，取向和间距，以优化从掩模图案形成图像。

55. 发明授权

US5709754A Method and apparatus for removing photoresist using UV and ozone/oxygen mixture 失效
标题翻译：使用UV和臭氧/氧气混合物去除光刻胶的方法和设备
公开(公告)号：US5709754A
公开(公告)日：1998-01-20
申请号：US581107
申请日：1995-12-29
申请人： Keith Morinville , J. Brett Rolfson
发明人： Keith Morinville , J. Brett Rolfson
IPC分类号： B08B7/00 , B23K26/12 , G03F7/42
CPC分类号： B23K26/123 , B08B7/0042 , B23K26/12 , B23K26/125 , B23K26/126 , B23K26/127 , B23K26/1436 , G03F7/42
摘要： A method and apparatus for removing photoresist from a substrate such as a semiconductor wafer are provided. The method includes placing the substrate in a reaction chamber containing an oxidizing gas that includes an ozone/oxygen mixture. At the same time, a UV laser beam is directed across the surface of the photoresist for driving an oxidation reaction. Specifically, the oxone decomposes into atomic and diatomic oxygen which react with carbon in the photoresist to form gaseous by-products such as (CO) and (CO.sub.2). These by-products are continuously exhausted from the reaction chamber by an evacuation pump. The method can be performed in stages wherein a first oxidizing gas comprising (O.sub.2) is used to remove a bulk of the photoresist and a second oxidizing gas comprising (O.sub.3 /O.sub.2) is used to remove a remaining portion of the photoresist.
摘要翻译：提供了用于从诸如半导体晶片的衬底去除光致抗蚀剂的方法和设备。该方法包括将基板放置在包含氧化气体的反应室中，该氧化气体包括臭氧/氧气混合物。同时，UV激光束被引导穿过光致抗蚀剂的表面以驱动氧化反应。具体地，该酮分解为与光致抗蚀剂中的碳反应形成气态副产物如（CO）和（CO 2）的原子和双原子氧。这些副产物通过抽空泵从反应室中不断排出。该方法可以在其中使用包含（O 2）的第一氧化气体去除大部分光致抗蚀剂并且包含（O 3 / O 2）的第二氧化气体用于除去光致抗蚀剂的剩余部分的阶段中进行。

56. 发明授权

US5707485A Method and apparatus for facilitating removal of material from the backside of wafers via a plasma etch 失效
标题翻译：通过等离子体蚀刻便于从晶片背面去除材料的方法和装置
公开(公告)号：US5707485A
公开(公告)日：1998-01-13
申请号：US575647
申请日：1995-12-20
申请人： J. Brett Rolfson , William J. Crane
发明人： J. Brett Rolfson , William J. Crane
IPC分类号： H01J37/32 , H01L21/00
CPC分类号： H01J37/32431 , Y10S438/977
摘要： The present invention is a method and apparatus, particularly adaptable to plasma etchers having horizontal base electrodes, for removing films such as silicon nitride from the backside of semiconductor wafers without leaving unetched residue or bumps thereon. Following the loading of a wafer in a plasma etch chamber, the wafer is positioned above the base electrode and within an etchant plasma for a period of time, with all portions of the front side surface and all portions of the back side surface of the wafer being subjected to the plasma for at least a portion of the period.
摘要翻译：本发明是一种特别适用于具有水平基底电极的等离子体蚀刻器的方法和装置，用于从半导体晶片的背面去除诸如氮化硅的膜，而不会在其上留下未蚀刻的残余物或凸块。在等离子体蚀刻室中加载晶片之后，将晶片定位在基极电极的上方并在蚀刻剂等离子体内一段时间，晶片的正面和背面的所有部分的所有部分在等离子体中进行至少一段时间的处理。

57. 发明授权

US5567644A Method of making a resistor 失效
标题翻译：制作电阻的方法
公开(公告)号：US5567644A
公开(公告)日：1996-10-22
申请号：US528124
申请日：1995-09-14
申请人： J. Brett Rolfson , Monte Manning
发明人： J. Brett Rolfson , Monte Manning
IPC分类号： H01L21/02 , H01L21/768 , H01L21/8244 , H01L27/11
CPC分类号： H01L28/20 , H01L21/76888 , H01L21/76895 , H01L27/11 , H01L27/1112 , Y10S257/903 , Y10S257/904 , Y10S438/98
摘要： Disclosed are methods of forming resistors and diodes from semiconductive material, and static random access memory (SRAM) cells incorporating resistors, and to integrated circuitry incorporating resistors and diodes. A node to which electrical connection is to be made is provided. An electrically insulative layer is provided outwardly of the node. An opening is provided in the electrically insulative layer over the node. The opening is filled with semiconductive material which depending on configuration serves as one or both of a vertically elongated diode and resistor.
摘要翻译：公开了从半导体材料形成电阻器和二极管的方法，以及结合电阻器的静态随机存取存储器（SRAM）单元以及并入电阻器和二极管的集成电路的方法。提供要进行电连接的节点。在节点外部设置一个电绝缘层。在节点上的电绝缘层中设置开口。开口填充有半导体材料，其取决于配置用作垂直细长的二极管和电阻器中的一个或两个。

58. 发明授权

US5495959A Method of making substractive rim phase shifting masks 失效
标题翻译：制造消减边缘相移掩模的方法
公开(公告)号：US5495959A
公开(公告)日：1996-03-05
申请号：US489777
申请日：1995-06-13
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： G03F1/29 , B44C1/22
CPC分类号： G03F1/29
摘要： An improved method for fabricating phase shifting masks suitable for semiconductor manufacture is provided. A photolithographic mask blank comprising a transparent substrate having an opaque layer of a standard thickness is provided. Using a photoresist mask, the opaque layer is patterned and etched with openings to form opaque light blockers. The substrate under the openings is then etched to a predetermined depth using the same photoresist mask or the opaque layer as a hard mask. A phase shift material, such as silicon dioxide, is then deposited over the opaque light blockers and into the openings to form rim phase shifters on the sidewalls of the light blockers and light transmission areas in the openings. The depth of the etch into the substrate and the thickness of the opaque layer determines the amount of the phase shift. These parameters are controlled to achieve a phase shift of 180.degree. or odd multiple thereof.
摘要翻译：提供了一种用于制造适合于半导体制造的相移掩模的改进方法。提供一种包括具有标准厚度的不透明层的透明基板的光刻掩模坯料。使用光致抗蚀剂掩模，将不透明层图案化并用开口蚀刻以形成不透明光阻挡剂。然后使用相同的光致抗蚀剂掩模或不透明层作为硬掩模将开口下方的基底蚀刻至预定深度。然后将相移材料（例如二氧化硅）沉积在不透明光阻挡件上并进入开口中，以在光阻挡件的侧壁和开口中的光透射区域上形成边缘移相器。蚀刻到衬底中的深度和不透明层的厚度决定了相移量。控制这些参数以实现180°或其奇数倍的相移。

59. 发明授权

US5372901A Removable bandpass filter for microlithographic aligners 失效
标题翻译：用于微光刻对准器的可移动带通滤光片
公开(公告)号：US5372901A
公开(公告)日：1994-12-13
申请号：US927210
申请日：1992-08-05
申请人： J. Brett Rolfson , David A. Cathey
发明人： J. Brett Rolfson , David A. Cathey
IPC分类号： G03F1/00 , G03F1/26 , G03F7/20 , G03F9/00
CPC分类号： G03F1/26 , G03F7/70575
摘要： A removable bandpass filter layer (22), which is preferably part of a pattern transfer tool (10), improves the resolution of a semiconductor wafer aligner that uses a relatively broad bandwidth radiation source. A narrower bandwidth filter layer provides more complete destructive interference of undesirable diffraction patterns when it is used with a phase-shift pattern transfer tool and removes radiation of longer wavelengths to improve resolution when it is used with a nonphase-shift pattern transfer tool. Using a removable bandpass filter layer, rather than permanently installing a narrow bandpass filter in the aligner, does not affect the speed of patterning layers that do not require the enhanced resolution. The same aligner can thus be used for either high resolution or high throughput without substantial modification to the aligner.
摘要翻译：优选为图案转印工具（10）的一部分的可拆卸带通滤光层（22）提高了使用相对宽的带宽辐射源的半导体晶片对准器的分辨率。较窄的带宽滤波器层当与相移图案转移工具一起使用时，提供更为完整的不希望的衍射图形的相消干涉，并且当与非相移图案转印工具一起使用时，可以去除较长波长的辐射以提高分辨率。使用可拆卸的带通滤光层，而不是在对准器中永久性安装窄带通滤光片，不会影响不需要增强分辨率的图案层的速度。因此，相同的对准器可以用于高分辨率或高通量而不对对准器进行实质修改。

60. 发明授权

US5358599A Process for etching a semiconductor device using an improved protective etching mask 失效
标题翻译：使用改进的保护蚀刻掩模蚀刻半导体器件的工艺
公开(公告)号：US5358599A
公开(公告)日：1994-10-25
申请号：US84394
申请日：1993-06-29
申请人： David A. Cathey , J. Brett Rolfson
发明人： David A. Cathey , J. Brett Rolfson
IPC分类号： H01L21/30 , H01L21/02 , H01L21/027 , H01L21/302 , H01L21/3065 , H01L21/308 , H01L21/311 , H01L21/3213 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108 , H01L21/306 , B44C1/22
CPC分类号： H01L28/40 , H01L21/0274 , H01L21/3081 , H01L21/31144 , H01L21/32139 , Y10S438/948
摘要： The subject process relates to the etching of a semiconductor device having a re-entrant profile area which causes residual positive photoresist material to remain therewithin after formation of an etch mask of the positive photoresist material. A negative photoresist etch mask is formed on a major surface of the outer conductive film structural layer. The etch mask comprises a plurality of photoresist lines arranged in a predetermined pattern which defines a plurality of spaces therebetween, which in turn expose a plurality of areas of the major surface of the semiconductor device. Substantially all of the negative photosensitive material located within the re-entrant profile area is removed during the etch mask formation process. The exposed areas of the major surface of the outer structural layer can then be etched to form the requisite etch pattern with a chemical etchant system without regard to interference by unwanted residual photoresist material.
摘要翻译：本发明涉及一种半导体器件的蚀刻，该半导体器件具有在形成正型光致抗蚀剂材料的蚀刻掩模之后残留的正性光致抗蚀剂材料保留在其中的重新设计的轮廓区域。在外导电膜结构层的主表面上形成负光致抗蚀剂蚀刻掩模。蚀刻掩模包括以预定图案布置的多个光致抗蚀剂线，其限定了它们之间的多个间隔，其又暴露半导体器件的主表面的多个区域。在蚀刻掩模形成工艺期间，基本上所有位于重入轮廓区域内的负感光材料都被去除。然后可以用化学蚀刻剂系统蚀刻外部结构层的主表面的暴露区域以形成必要的蚀刻图案，而不考虑不想要的残留光致抗蚀剂材料的干扰。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式