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51. 发明授权

US06271816B1 Power saving circuit and method for driving an active matrix display 有权
标题翻译：用于驱动有源矩阵显示器的节电电路和方法
公开(公告)号：US06271816B1
公开(公告)日：2001-08-07
申请号：US09148583
申请日：1998-09-04
申请人： Deog-Kyoon Jeong , Gyudong Kim
发明人： Deog-Kyoon Jeong , Gyudong Kim
IPC分类号： G09G336
CPC分类号： G09G3/3655 , G09G3/3614 , G09G3/3648 , G09G3/3688 , G09G2310/0248 , G09G2330/021 , G09G2330/023
摘要： Switches and capacitors are efficiently used to passively change the voltage level on column electrodes without active driving by the column driver circuit. This significantly reduces the power needed by the column driver circuit to drive voltages of alternating polarity onto the column electrodes. In this way, significant power is saved in both the pixel inversion and the row inversion schemes. The average power savings of various of the embodiments exceeds 50% compared with a simple conventional implementation of a column driver circuit. Another aspect similarly reduces the power used by the column driver circuit in the back plane switching scheme.
摘要翻译：开关和电容器被有效地用于被动地改变列电极上的电压电平，而无需由列驱动电路进行有源驱动。这显着地降低了列驱动电路所需的功率，以驱动交替极性的电压到列电极上。以这种方式，在像素反转和行反转方案中节省了显着的功率。与列驱动电路的简单常规实施方式相比，各种实施例的平均功率节省超过了50％。另一方面类似地减少了在背面切换方案中列驱动电路所使用的功率。

52. 发明授权

US09234930B2 Determination of physical connectivity status of devices based on electrical measurement 有权
公开(公告)号：US09234930B2
公开(公告)日：2016-01-12
申请号：US13021958
申请日：2011-02-07
申请人： Jason Wong , Gyudong Kim
发明人： Jason Wong , Gyudong Kim
IPC分类号： G06F13/36 , G01R31/02 , G06F11/34 , G06F11/30
CPC分类号： G01R31/021 , G06F11/3055 , G06F11/3485 , G06F11/349
摘要： Embodiments of the invention are generally directed to determination of physical connectivity status of devices based on electrical measurement. An embodiment of a method includes discovering a connection of a first device with a second device, and performing an electrical measurement of the second device by the first device via the connection between the first device and the second device, where performing the electrical measurement includes sensing by the first device of an element of the second device. The method further includes, if the sensing by the first device fails to detect the element of the second device and a predetermined condition for the electrical measurement is enabled, then determining by the first device that the connection with the second device has been lost.

53. 发明授权

US08601173B2 Detection of cable connections for electronic devices 有权
标题翻译：检测电子设备的电缆连接
公开(公告)号：US08601173B2
公开(公告)日：2013-12-03
申请号：US13172742
申请日：2011-06-29
申请人： Baegin Sung , MyounHwan Kim , Gyudong Kim , Chandlee Harrell
发明人： Baegin Sung , MyounHwan Kim , Gyudong Kim , Chandlee Harrell
IPC分类号： G06F3/00 , G06F13/12
CPC分类号： H04Q1/136
摘要： Embodiments of the invention are generally directed to detection of cable connections for electronic devices. An embodiment of an apparatus includes a port for the connection of a cable, the port being compatible with a first protocol and a second protocol, the port including a connector for the second protocol, the port including multiple pins including a first pin and a second pin. The apparatus further includes a pull-up resistor coupled between the first pin and a voltage source, a pull-down resistor coupled between the second pin and ground, and a voltage detection element coupled with the second pin. The apparatus is to determine that a cable compatible with the first protocol is connected to the port if the voltage detection element detects a voltage above a first threshold.
摘要翻译：本发明的实施例一般涉及电子设备的电缆连接的检测。装置的实施例包括用于连接电缆的端口，该端口与第一协议和第二协议兼容，该端口包括用于第二协议的连接器，该端口包括多个引脚，包括第一引脚和第二引脚销。该装置还包括耦合在第一引脚和电压源之间的上拉电阻，耦合在第二引脚和地之间的下拉电阻以及与第二引脚耦合的电压检测元件。如果电压检测元件检测到高于第一阈值的电压，则该装置确定与第一协议兼容的电缆连接到端口。

54. 发明授权

US08116240B2 Bi-directional bridge circuit having high common mode rejection and high input sensitivity 有权
标题翻译：具有高共模抑制和高输入灵敏度的双向电桥电路
公开(公告)号：US08116240B2
公开(公告)日：2012-02-14
申请号：US12573847
申请日：2009-10-05
申请人： Gyudong Kim , Min-Kyu Kim
发明人： Gyudong Kim , Min-Kyu Kim
IPC分类号： H04B3/20 , H04B1/52 , H04B1/58
CPC分类号： H04B3/30 , H04L25/0276 , H04L25/085
摘要： A bidirectional communications interface is provided that connects a transmitter and a receiver, or a transceiver, to a transmission line. Under an embodiment, the bidirectional interface generates positive and negative polarity data signals using two separate differential amplifiers that receive differential signal pairs from each side of a differential link to the transmission line and the transmitter. The bidirectional interface controls common mode rejection in each of the separate differential amplifiers using bias signals generated in response to an output common mode feedback voltage from each of the differential amplifiers. An output amplifier combines the positive and negative polarity data signals to form single-ended output logic signals. The output logic signals represent data received on the transmission line, and are provided to the receiver.
摘要翻译：提供了将发射器和接收器或收发器连接到传输线的双向通信接口。在一个实施例中，双向接口使用两个单独的差分放大器产生正极性和负极性数据信号，差分放大器从差分链路的每一侧接收到传输线和发射器的差分信号对。双向接口通过响应于来自每个差分放大器的输出共模反馈电压产生的偏置信号来控制每个单独的差分放大器中的共模抑制。输出放大器组合正极性和负极性数据信号，形成单端输出逻辑信号。输出逻辑信号表示在传输线上接收的数据，并提供给接收机。

55. 发明授权

US07991096B1 Data sampling method and apparatus using through-transition counts to reject worst sampling position 有权
标题翻译：数据采样方法和使用过渡计数的装置来排除最差采样位置
公开(公告)号：US07991096B1
公开(公告)日：2011-08-02
申请号：US10842231
申请日：2004-05-10
申请人： Bruce Kim , Hoon Choi , Gyudong Kim
发明人： Bruce Kim , Hoon Choi , Gyudong Kim
IPC分类号： H04L7/00
CPC分类号： H04L7/033 , H04J3/0608
摘要： A data sampling circuit that employs an oversampling clock to oversample a data signal, a phase tracking circuit for use in such a sampling circuit, and a receiver and system including such a sampling circuit. Preferably, phase tracking is implemented by systematically identifying and rejecting at least one worst sampling position, and sampling the data signal at a non-rejected sampling position. Preferably, phase tracking is accomplished by counting through-transitions of edges of the sampled data signal through each oversampling position, and rejecting an oversampling position having a highest count of through-transitions. In some embodiments, different phase tracking methods (at least one of which includes the step of generating through-transition counts) are used for different types of input data. Other aspects of the invention are methods for determining an oversampling position for oversampling a data signal, and methods for oversampling a data signal including by generating through-transition counts.
摘要翻译：使用过采样时钟对数据信号进行过采样的数据采样电路，用于这种采样电路的相位跟踪电路以及包括这种采样电路的接收机和系统。优选地，相位跟踪通过系统地识别和拒绝至少一个最差采样位置并且在未拒绝的采样位置对数据信号进行采样来实现。优选地，通过对采样数据信号的边缘通过每个过采样位置的过渡进行计数，以及拒绝具有最高通过过渡计数的过采样位置来实现相位跟踪。在一些实施例中，不同类型的输入数据使用不同的相位跟踪方法（其中至少一个包括生成通过转换计数的步骤）。本发明的其它方面是用于确定用于过采样数据信号的过采样位置的方法，以及用于过采样数据信号的方法，包括通过产生通过转换计数。

56. 发明授权

US07589559B2 Current mode circuitry to modulate a common mode voltage 有权
标题翻译：用于调制共模电压的电流模式电路
公开(公告)号：US07589559B2
公开(公告)日：2009-09-15
申请号：US11643388
申请日：2006-12-20
申请人： Daeyun Shim , Min-Kyu Kim , Gyudong Kim , Keewook Jung , Seung Ho Hwang
发明人： Daeyun Shim , Min-Kyu Kim , Gyudong Kim , Keewook Jung , Seung Ho Hwang
IPC分类号： H03K19/0175
CPC分类号： H04L5/20
摘要： In some embodiments, a chip includes transmitters to transmit differential signals on conductors; and current mode circuitry to selectively modulate a common mode voltage of the differential signals to communicate data. In other embodiments, a system includes a first chip to transmit first and second differential signals on conductors, and a second chip. The second chip includes receivers to receive the first and second differential signals from the conductors and provide received signals representative thereof, and current mode circuitry to selectively modulate a common mode voltage of either the first or second differential signals to communicate data and wherein the first chip includes common mode detection circuitry to detect changes in the common mode voltage. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，芯片包括在导体上传输差分信号的发射器; 以及电流模式电路，用于选择性地调制差分信号的共模电压以传送数据。在其他实施例中，系统包括用于在导体上传输第一和第二差分信号的第一芯片和第二芯片。第二芯片包括接收器，用于从导体接收第一和第二差分信号并提供表示其的接收信号;以及电流模式电路，用于选择性地调制第一或第二差分信号的共模电压以传送数据，并且其中第一芯片包括用于检测共模电压变化的共模检测电路。描述和要求保护其他实施例。

57. 发明申请

US20090178097A1 METHOD, APPARATUS AND SYSTEM FOR GENERATING AND FACILITATING MOBILE HIGH-DEFINITION MULTIMEDIA INTERFACE 有权
标题翻译：用于生成和促进移动高清晰度多媒体接口的方法，装置和系统
公开(公告)号：US20090178097A1
公开(公告)日：2009-07-09
申请号：US11969847
申请日：2008-01-04
申请人： Gyudong Kim , Baegin Sung , Hoon Choi
发明人： Gyudong Kim , Baegin Sung , Hoon Choi
IPC分类号： H04N7/173
CPC分类号： G06F3/14 , G06F13/4072 , G09G5/006 , G09G2370/045 , G09G2370/047 , H04L65/605
摘要： A method, apparatus and system are provided for generating and facilitating Mobile High-Definition Multimedia Interface. In one embodiment, an apparatus includes a transmitter configured to merge multiple channels of a high-definition interface into a single channel to generate a mobile high-definition interface, the mobile high-definition interface configured to facilitate carrying of high-definition media content in a mobile device. The apparatus further includes a receiver coupled with the transmitter, the receiver configured to receive the single channel, and to unmerge the single channel into the multiple channels.
摘要翻译：提供了一种用于生成和促进移动高分辨率多媒体接口的方法，装置和系统。在一个实施例中，一种装置包括：发射机，被配置为将高清晰度接口的多个信道合并成单个信道以产生移动高清晰度接口，所述移动高清晰度接口被配置为便于携带高清晰度媒体内容移动设备。所述设备还包括与所述发射机耦合的接收机，所述接收机被配置为接收所述单个信道，并且将所述单个信道解除合并到所述多个信道中。

58. 发明授权

US07557863B2 Digital display jitter correction apparatus and method 有权
公开(公告)号：US07557863B2
公开(公告)日：2009-07-07
申请号：US11219323
申请日：2005-09-01
申请人： Stephen J. Keating , Russel Martin , Victor M. Da Costa , Gyudong Kim
发明人： Stephen J. Keating , Russel Martin , Victor M. Da Costa , Gyudong Kim
IPC分类号： H04N9/64 , G06K19/06
CPC分类号： H04L7/02 , H04N5/208 , H04N5/21
摘要： A jitter correction apparatus and method are disclosed. In one embodiment, the apparatus has a rising edge corrector to receive a jittered signal and to output a jitter corrected rising edge of the jittered signal. The apparatus may also have a falling edge corrector to receive the jittered signal and to output a jitter corrected falling edge of the jittered signal. The jitter correction apparatus may include an output device to receive the jitter corrected rising edge, to receive the jitter corrected falling edge, and to output a jitter corrected signal.

59. 发明授权

US07456648B2 Differential amplifiers using asymmetric transfer characteristics to suppress input noise in output logic signals 有权
标题翻译：使用非对称传输特性的差分放大器抑制输出逻辑信号中的输入噪声
公开(公告)号：US07456648B2
公开(公告)日：2008-11-25
申请号：US11330047
申请日：2006-01-10
申请人： Gyudong Kim , Min-Kyu Kim
发明人： Gyudong Kim , Min-Kyu Kim
IPC分类号： H03K17/16
CPC分类号： H04L25/0292 , H03F3/45179 , H03F3/45632 , H03K5/2481 , H04L5/18 , H04L25/0272
摘要： An output amplifier is provided for use in a bidirectional communications interface, for example, connecting a transmitter and a receiver to a transmission line. The output amplifier includes a differential amplifier pair connected to output circuitry. The differential amplifier pair receives differential data signal pairs from each of a transmission line and a transmitter. The output circuitry receives signals from the differential amplifier pair and, in response, forms single-ended output logic signals. The output amplifier suppresses electronic input noise throughput using an asymmetric transfer characteristic that offsets output signal logic levels with respect to input noise signal levels. The asymmetric transfer characteristic is produced by skewing a transfer characteristic of the differential amplifier pair using an asymmetrical transistor configuration at an output side of the differential amplifier pair. The output logic signals represent data received on the transmission line, and are provided to the receiver.
摘要翻译：输出放大器被提供用于双向通信接口，例如将发射器和接收器连接到传输线。输出放大器包括连接到输出电路的差分放大器对。差分放大器对从传输线和发送器中的每一个接收差分数据信号对。输出电路从差分放大器对接收信号，作为响应，形成单端输出逻辑信号。输出放大器使用偏移相对于输入噪声信号电平的输出信号逻辑电平的非对称传输特性来抑制电子输入噪声吞吐量。非对称传输特性是通过在差分放大器对的输出侧使用不对称晶体管配置来歪斜差分放大器对的传输特性而产生的。输出逻辑信号表示在传输线上接收的数据，并提供给接收机。

60. 发明申请

US20080169838A1 Current mode circuitry to modulate a common mode voltage 有权
标题翻译：用于调制共模电压的电流模式电路
公开(公告)号：US20080169838A1
公开(公告)日：2008-07-17
申请号：US11643388
申请日：2006-12-20
申请人： Daeyun Shim , Min-Kyu Kim , Gyudong Kim , Keewook Jung , Seung Ho Hwang
发明人： Daeyun Shim , Min-Kyu Kim , Gyudong Kim , Keewook Jung , Seung Ho Hwang
IPC分类号： H01P5/00
CPC分类号： H04L5/20
摘要： In some embodiments, a chip includes transmitters to transmit differential signals on conductors; and current mode circuitry to selectively modulate a common mode voltage of the differential signals to communicate data. In other embodiments, a system includes a first chip to transmit first and second differential signals on conductors, and a second chip. The second chip includes receivers to receive the first and second differential signals from the conductors and provide received signals representative thereof, and current mode circuitry to selectively modulate a common mode voltage of either the first or second differential signals to communicate data and wherein the first chip includes common mode detection circuitry to detect changes in the common mode voltage. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，芯片包括在导体上传输差分信号的发射器; 以及电流模式电路，用于选择性地调制差分信号的共模电压以传送数据。在其他实施例中，系统包括用于在导体上传输第一和第二差分信号的第一芯片和第二芯片。第二芯片包括接收器，用于从导体接收第一和第二差分信号并提供表示其的接收信号;以及电流模式电路，用于选择性地调制第一或第二差分信号的共模电压以传送数据，并且其中第一芯片包括用于检测共模电压变化的共模检测电路。描述和要求保护其他实施例。

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