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51. 发明申请

US20060054889A1 Thin film transistor array panel 审中-公开
标题翻译：薄膜晶体管阵列面板
公开(公告)号：US20060054889A1
公开(公告)日：2006-03-16
申请号：US10942039
申请日：2004-09-16
申请人： Jang-Soo Kim , Hyang-Shik Kong , Hye-Young Ryu , Sung-Man Kim
发明人： Jang-Soo Kim , Hyang-Shik Kong , Hye-Young Ryu , Sung-Man Kim
IPC分类号： H01L29/04
CPC分类号： H01L27/124 , G02F1/136213 , G02F1/136259 , G02F2001/13629 , H01L27/1255 , H01L27/1288
摘要： A thin film transistor array panel comprising: an insulating substrate; a plurality of gate lines formed on the insulating substrate and including a plurality of gate electrodes and end portions; a plurality of storage electrode lines formed on the insulating substrate; a gate insulating layer formed on the gate lines and storage electrode lines; a semiconductor layer formed on the gate insulating layer; a ohmic contact layer formed on the semiconductor layer; a plurality of data lines formed on the gate insulating layer, intersecting the gate lines to define a display area, and having source electrodes and end portions; a plurality of drain electrodes facing the source electrodes; a passivation layer formed on the data lines and drain electrodes and having contact holes; a plurality of pixel electrodes formed on the passivation layer and connected to the drain electrodes through the contact holes; a storage line connecting bar connecting the storage electrode lines; and a redundant connecting line connecting the storage electrode lines is provided.
摘要翻译： 1.一种薄膜晶体管阵列面板，包括：绝缘基板; 多个栅极线，形成在所述绝缘基板上并且包括多个栅电极和端部; 形成在所述绝缘基板上的多个存储电极线; 形成在栅极线和存储电极线上的栅极绝缘层; 形成在所述栅极绝缘层上的半导体层; 形成在所述半导体层上的欧姆接触层; 形成在所述栅极绝缘层上的多条数据线，与所述栅极线交叉以限定显示区域，并具有源电极和端部; 面对所述源电极的多个漏电极; 形成在数据线和漏电极上并具有接触孔的钝化层; 多个像素电极，形成在钝化层上并通过接触孔连接到漏电极; 连接存储电极线的存储线连接条; 并且提供连接存储电极线的冗余连接线。

52. 发明授权

US06445004B1 Composition for a wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof 有权
标题翻译：配线用组合物，使用该组合物的布线及其制造方法，使用布线的显示器及其制造方法
公开(公告)号：US06445004B1
公开(公告)日：2002-09-03
申请号：US09617311
申请日：2000-07-14
申请人： Chang-Oh Jeong , Yang-Sun Kim , Myung-Koo Hur , Young-Jae Tak , Mun-Pyo Hong , Chi-Woo Kim , Jang-Soo Kim , Chun-Gi You
发明人： Chang-Oh Jeong , Yang-Sun Kim , Myung-Koo Hur , Young-Jae Tak , Mun-Pyo Hong , Chi-Woo Kim , Jang-Soo Kim , Chun-Gi You
IPC分类号： H01L2904
CPC分类号： G02F1/136286 , G02F1/136227 , G02F1/1368 , G02F2001/13629 , H01L21/28008 , H01L23/4827 , H01L29/42384 , H01L29/4908 , H01L2924/0002 , H01L2924/00
摘要： The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with an Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl(+He) or SF6+Cl2(+He) can form the edge profile of contact holes to be smoothed. Also, when an amorphous silicon layer formed under the Mo or MoW layer is etched using the Mo or MoW layer as a mask, using an etch gas system that employs a gas such as hydrogen halide and at least one gas selected from CF4, CHF3, CHClF2, CH3F, and C2F6, yields good TFT characteristics, and H2 plasma treatment can further improve the TFT characteristics.
摘要翻译： Mo或MoW组合物层具有小于15μOMEGAcm的低电阻率，并且使用Al合金附魔或Cr附魔被蚀刻成具有平滑的锥角，并且Mo或MoW层用于显示器或半导体显示器以及Al层或Cr层。由于通过调节沉积压力可以沉积Mo或MoW层以便对基底施加低应力，所以可以单独使用单个MoW层作为布线。当在钝化层或栅极绝缘层中形成接触孔时，通过使用聚合物层减少横向蚀刻，使用CF 4 + O 2的蚀刻气体系统可以防止Mo或MoW合金层的蚀刻，以及蚀刻气体 SF6 + HCl（+ He）或SF6 + Cl2（+ He）可以形成要平滑的接触孔的边缘轮廓。此外，当使用Mo或MoW层作为掩模蚀刻形成在Mo或MoW层下面的非晶硅层时，使用采用诸如卤化氢和至少一种选自CF 4，CHF 3的气体的气体的蚀刻气体系统， CHClF 2，CH 3 F和C 2 F 6，产生良好的TFT特性，并且H 2等离子体处理可以进一步提高TFT特性。

53. 发明授权

US06441401B1 Thin film transistor array panel for liquid crystal display and method for repairing the same 有权
标题翻译：用于液晶显示器的薄膜晶体管阵列面板及其修复方法
公开(公告)号：US06441401B1
公开(公告)日：2002-08-27
申请号：US09527803
申请日：2000-03-17
申请人： Cheol-Soo Jung , Young-Sun Kim , Ho-Joon Lee , Yeong-Hwan Cho , Hyeon-Hwan Kim , Bung-Hyuk Min , Woon-Yong Park , Il-Gon Kim , Jang-Soo Kim , Jin-Oh Kwag , Seog-Chae Lee
发明人： Cheol-Soo Jung , Young-Sun Kim , Ho-Joon Lee , Yeong-Hwan Cho , Hyeon-Hwan Kim , Bung-Hyuk Min , Woon-Yong Park , Il-Gon Kim , Jang-Soo Kim , Jin-Oh Kwag , Seog-Chae Lee
IPC分类号： H01L2900
CPC分类号： G02F1/136259 , G02F2001/136263 , G02F2001/136272 , H01L27/12
摘要： A gate line extending in a horizontal direction is formed on an insulating substrate, and a data line is formed perpendicular to the gate line defining a pixel of a matrix array. Pixel electrodes receiving image signals through the data line are formed in a pixel, and a thin film transistor having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode is formed on the portion where the gate lines and the data lines intersect. A storage wire including a storage electrode line in the horizontal direction, a storage electrode connected to the storage electrode line, and at least one of the storage electrode connection portions connecting storage electrodes of neighboring pixels is formed in the same direction as the gate line. A redundant repair line overlaps and is insulated from the storage wire at one end and overlaps the storage wire or the gate wire of a neighboring pixel at the other end is formed in the same layer as the data wire. Also, a storage wire connection portion connecting the storage wires of a neighboring pixel is formed in the same layer as the pixel electrode. In this structure, if portions of the gate wire or the data wire are disconnected, the portions overlapping the disconnected wire, the storage wire, and the redundant repair line are shorted to repair an open wire defect.
摘要翻译：在绝缘基板上形成沿水平方向延伸的栅极线，并且垂直于限定矩阵阵列的像素的栅极线形成数据线。通过数据线接收图像信号的像素电极形成在像素中，并且形成具有连接到栅极线的栅电极，连接到数据线的源电极和连接到像素电极的漏电极的薄膜晶体管在栅极线和数据线相交的部分。包括在水平方向上存储电极线的存储线，连接到存储电极线的存储电极以及连接相邻像素的存储电极的至少一个存储电极连接部分沿与栅极线相同的方向形成。冗余维修线在一端重叠并与存储线绝缘，并与存储线重叠，另一端的相邻像素的栅极线形成在与数据线相同的层中。此外，连接相邻像素的存储线的存储线连接部分形成在与像素电极相同的层中。在这种结构中，如果栅极线或数据线的部分断开，与断开的线，存储线和冗余修复线重叠的部分短路以修复开路的线缺陷。

54. 发明授权

US08648985B2 Liquid crystal display device 有权
标题翻译：液晶显示装置
公开(公告)号：US08648985B2
公开(公告)日：2014-02-11
申请号：US12612620
申请日：2009-11-04
申请人： Yong-Hwan Kim , Jang-Soo Kim , Hong-Suk Yoo , Seung-Soo Baek , Hwa-Yeul Oh , Jae-Ho Choi , Jong-In Kim , Sang-Hee Jang
发明人： Yong-Hwan Kim , Jang-Soo Kim , Hong-Suk Yoo , Seung-Soo Baek , Hwa-Yeul Oh , Jae-Ho Choi , Jong-In Kim , Sang-Hee Jang
IPC分类号： G02F1/1343 , G02F1/1368
CPC分类号： G02F1/136209
摘要： The present invention relates to a liquid crystal display. The liquid crystal display has a lower panel including a first pixel area having a first pixel electrode and a first light leakage preventing member, a final pixel area having a second pixel electrode and a second light leakage preventing member, and middle pixel areas disposed between the first pixel area and the final pixel area, each of the middle pixel areas including a first middle pixel electrode and a second middle pixel electrode. Accordingly, light leakage may be effectively prevented at the first pixel area and the final pixel area that are disposed on the edge.
摘要翻译：本发明涉及一种液晶显示器。液晶显示器具有包括具有第一像素电极和第一防漏光部件的第一像素区域，具有第二像素电极和第二防漏光部件的最终像素区域的下面板，以及设置在第二像素区域之间的中间像素区域第一像素区域和最终像素区域，每个中间像素区域包括第一中间像素电极和第二中间像素电极。因此，可以有效地防止在设置在边缘上的第一像素区域和最终像素区域处的光泄漏。

55. 发明授权

US08564748B2 Liquid crystal display and manufacturing method thereof 有权
标题翻译：液晶显示及其制造方法
公开(公告)号：US08564748B2
公开(公告)日：2013-10-22
申请号：US12611492
申请日：2009-11-03
申请人： Kyung-Sook Jeon , Jang-Soo Kim , Hong-Suk Yoo , Yong-Hwan Kim , Hwa-Yeul Oh , Jong-In Kim , Sang-Hee Jang
发明人： Kyung-Sook Jeon , Jang-Soo Kim , Hong-Suk Yoo , Yong-Hwan Kim , Hwa-Yeul Oh , Jong-In Kim , Sang-Hee Jang
IPC分类号： G02F1/1333
CPC分类号： G02F1/133514 , G02F1/133516 , G02F1/13394 , G02F2001/133388
摘要： Exemplary embodiments of the present invention disclose a liquid crystal display (LCD) and a method of manufacturing the same. The LCD may have a display area and a peripheral area. An organic layer of the peripheral area may be patterned using a half-tone mask, and a protrusion member may be formed in the peripheral area. Accordingly, the thin film transistor array panel and the corresponding substrate may be prevented from being temporary adhered in the peripheral area such that the density of the liquid crystal molecules filled in the peripheral area may be uniformly maintained and the display quality of the liquid crystal display may be improved.
摘要翻译：本发明的示例性实施例公开了液晶显示器（LCD）及其制造方法。 LCD可以具有显示区域和外围区域。可以使用半色调掩模对周边区域的有机层进行图案化，并且可以在周边区域中形成突起构件。因此，可以防止薄膜晶体管阵列面板和对应的基板临时粘附在周边区域中，使得可以均匀地保持填充在周边区域中的液晶分子的密度，并且液晶显示器的显示质量可以改进。

56. 发明申请

US20120199530A1 SEAMING CAP COUPLED WITH REINFORCEMENT PLATE OF SPIN-ON FILTER 审中-公开
公开(公告)号：US20120199530A1
公开(公告)日：2012-08-09
申请号：US13501078
申请日：2009-10-09
申请人： Jang Soo Kim
发明人： Jang Soo Kim
IPC分类号： B01D27/08
CPC分类号： F02M37/22 , B01D27/08 , B01D27/103 , B01D2201/34 , B29C45/14311 , B29L2031/14
摘要： Disclosed is a seaming cap coupled with a reinforcement plate of a spin-on filter. The seaming cap (41) includes: a central hole (41a) formed in an annular shape; a securing groove (41b) formed in an annular shape by folding the lower end of the outer periphery of the central hole (41a), with an annular packing member (42) inserted therein; a seaming coupling section (41c) protruded and folded downwards at the outer periphery of the securing groove (41b) for seam-coupling to an outer peripheral surface at the upper end of a spin-on filter housing (10); and a plurality of injection-molding object extrusion holes (41d) formed in the securing groove (41b) of the seaming cap (41) at the same intervals. An extrusion object (40e) of the reinforcement plate (40) is extruded into the securing groove (41b) to which an annular packing member (42) of the seaming cap (41) is secured, when injection-molding the reinforcement plate (40) via the injection-molding object extrusion holes (41d). According to the present invention of the above structure, the reinforcement plate is injection-molded from the plastic material and coupled with the seaming cap, so that the extrusion object is formed in the annular shape on the bottom surface in the securing groove of the seaming cap, thereby being stably coupled with the seaming cap. In addition, the seaming cap is positioned between the upper mold and the lower mold of the injection molds and the threads of a spiral hole of the reinforcement plate are formed simultaneously with the injection of the reinforcement plate, so that the coupling time between the reinforcement plate and the seaming cap is reduced, thereby increasing productivity. The reinforcement plate is produced by insert injection molding with the seaming cap, which is inserted into an injection molding machine, so as to reduce weight. The plastic injection molded object and the seaming cap may be easily separated when discarding the spin-on filter. It is possible to reuse the plastic material and employ the same as an energy source.

57. 发明申请

US20120098800A1 GATE DRIVER AND LIQUID CRYSTAL DISPLAY INCLUDING SAME 审中-公开
标题翻译：闸门驱动器和液晶显示器，包括它们
公开(公告)号：US20120098800A1
公开(公告)日：2012-04-26
申请号：US13070394
申请日：2011-03-23
申请人： Kwi-Hyun KIM , Jang-Soo Kim , Hyeong-Jun Jin , Soo-Chul Kim , Kyoung-Hae Min
发明人： Kwi-Hyun KIM , Jang-Soo Kim , Hyeong-Jun Jin , Soo-Chul Kim , Kyoung-Hae Min
IPC分类号： G09G3/36 , G09G5/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G09G2300/0426 , G09G2310/0286 , G09G2330/04 , G11C19/28
摘要： Provided are a gate-lines driver circuit and a liquid crystal display (LCD) device including the same. The gate-lines driver may be in danger of being subjected to static electricity and it includes: a wiring unit which receives signals from an external source and a circuit unit which outputs driving signals in response to a plurality of control signals received from the wiring unit. The circuit unit includes a plurality of shift registers, each having shift register wirings, wherein the wiring unit includes first through n-th vertical signal lines arranged sequentially in order of distance from the shift registers, with the first vertical signal line being located farthest from the shift registers. The first vertical signal line is connected to each of the shift registers by a first horizontal connection line, and the first horizontal connection line includes a first contact portion which is formed over and contacting with the first signal line and a second contact portion which is located between the n-th vertical signal line and a boundary of the shift registers and is connected to each of the shift registers by a shift register wiring. The first horizontal connection line is structured to reduce a danger that the shift registers will be burned out by a surge of static electricity current received through the wiring unit.
摘要翻译：提供了一种栅线驱动电路和包括该电路的液晶显示器（LCD）装置。栅线驱动器可能具有受静电的危险，它包括：接收来自外部源的信号的接线单元和响应于从接线单元接收的多个控制信号而输出驱动信号的电路单元。电路单元包括多个移位寄存器，每个移位寄存器均具有移位寄存器布线，其中布线单元包括按照与移位寄存器的距离顺序依次布置的第一至第n垂直信号线，第一垂直信号线位于移位寄存器。第一垂直信号线通过第一水平连接线连接到每个移位寄存器，并且第一水平连接线包括形成在第一信号线上并与第一信号线接触的第一接触部分和位于在第n垂直信号线和移位寄存器的边界之间，并通过移位寄存器布线连接到每个移位寄存器。第一条水平连接线的结构是为了减少移位寄存器将被通过接线单元接收到的静电电流浪涌而被烧掉的危险。

58. 发明授权

US07977677B2 Thin-film transistor substrate, method of manufacturing the same and display apparatus having the same 有权
标题翻译：薄膜晶体管基板及其制造方法以及具有该薄膜晶体管基板的显示装置
公开(公告)号：US07977677B2
公开(公告)日：2011-07-12
申请号：US11840161
申请日：2007-08-16
申请人： Hye-Young Ryu , Jang-Soo Kim , Su-Hyoung Kang
发明人： Hye-Young Ryu , Jang-Soo Kim , Su-Hyoung Kang
IPC分类号： H01L29/04
CPC分类号： G02F1/136227 , G02F2001/136222 , H01L27/3258
摘要： In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.
摘要翻译：在薄膜晶体管（TFT）基板中，栅极绝缘层设置在与栅极线电连接的栅电极上。半导体层设置在栅极绝缘层上。源极电极与与栅极线相交的数据线电连接。漏电极面对源电极并限定半导体层的沟道面积。有机层设置在数据线上，并且具有暴露通道区域的第一开口。无机绝缘层设置在有机层上。像素电极设置在无机绝缘层上并与漏电极电连接。无机绝缘层覆盖第一开口，无机绝缘层的厚度基本均匀。

59. 发明授权

US07888675B2 Thin film transistor array panel and fabrication 有权
标题翻译：薄膜晶体管阵列和制造
公开(公告)号：US07888675B2
公开(公告)日：2011-02-15
申请号：US12099718
申请日：2008-04-08
申请人： Sang-Gab Kim , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
发明人： Sang-Gab Kim , Woo-Geun Lee , Shi-Yul Kim , Jin-Ho Ju , Jang-Soo Kim , Sang-Woo Whangbo , Min-Seok Oh , Hye-Young Ryu , Hong-Kee Chin
IPC分类号： H01L21/00
CPC分类号： H01L27/124 , G02F2001/13629 , H01L29/458
摘要： The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.
摘要翻译：本发明提供一种薄膜晶体管阵列面板的制造方法，其包括在基板上形成栅极线; 在栅极线上形成栅极绝缘层，半导体层和欧姆接触; 形成包括Mo的第一导电膜，包括Al的第二导电膜和在欧姆接触上包含Mo的第三导电膜; 在所述第三导电膜上形成第一光致抗蚀剂图案; 使用第一光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜，欧姆接触和半导体层; 将第一光致抗蚀剂图案去除预定厚度以形成第二光致抗蚀剂图案; 使用第二光致抗蚀剂图案作为掩模蚀刻第一，第二和第三导电膜以暴露欧姆接触的一部分; 并使用含Cl气体和含F气体蚀刻暴露的欧姆接触。

60. 发明申请

US20100001276A1 THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD OF THE SAME 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US20100001276A1
公开(公告)日：2010-01-07
申请号：US12335928
申请日：2008-12-16
申请人： Jang-Soo KIM , Sang-Soo KIM , Shi-Yul KIM , Jang-Sub KIM
发明人： Jang-Soo KIM , Sang-Soo KIM , Shi-Yul KIM , Jang-Sub KIM
IPC分类号： H01L27/088 , H01L21/77
CPC分类号： G02F1/136227 , G02F1/133512 , G02F2001/136222 , H01L27/1248
摘要： A thin film transistor array panel includes an insulating substrate, a gate line and a data line disposed on the insulating substrate and insulated from and intersecting each other, a thin film transistor connected to the gate line and the data line, a partition disposed corresponding to the gate line and the data line and defining a color filter filling region, a color filter disposed in the filling region, a passivation layer disposed on the color filter and the partition, and a pixel electrode disposed on the passivation layer and connected to the thin film transistor through a contact hole disposed through the passivation layer and the color filter. A plane shape of the color filter filling region is substantially a rectangle.
摘要翻译：薄膜晶体管阵列面板包括绝缘基板，栅极线和设置在绝缘基板上并彼此绝缘和相交的数据线，连接到栅极线和数据线的薄膜晶体管，对应于栅极线和数据线，并且限定滤色器填充区域，布置在填充区域中的滤色器，设置在滤色器和隔板上的钝化层，以及设置在钝化层上并连接到薄膜上的像素电极薄膜晶体管通过设置穿过钝化层和滤色器的接触孔。滤色器填充区域的平面形状基本上是矩形。

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