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41. 发明授权

US08921816B2 Semiconductor device having a diode 有权
标题翻译：具有二极管的半导体器件
公开(公告)号：US08921816B2
公开(公告)日：2014-12-30
申请号：US13178762
申请日：2011-07-08
申请人： Bo-Young Seo , Byung-Suo Shim , Yong-Kyu Lee , Tea-Kwang Yu , Ji-Hoon Park
发明人： Bo-Young Seo , Byung-Suo Shim , Yong-Kyu Lee , Tea-Kwang Yu , Ji-Hoon Park
IPC分类号： H01L29/02 , H01L27/24 , H01L27/102 , H01L45/00
CPC分类号： H01L27/1021 , H01L27/2409 , H01L27/2463 , H01L45/06
摘要： Provided is a semiconductor device. The semiconductor device includes a lower active region on a semiconductor substrate. A plurality of upper active regions protruding from a top surface of the lower active region and having a narrower width than the lower active region are provided. A lower isolation region surrounding a sidewall of the lower active region is provided. An upper isolation region formed on the lower isolation region, surrounding sidewalls of the upper active regions, and having a narrower width than the lower isolation region is provided. A first impurity region formed in the lower active region and extending into the upper active regions is provided. Second impurity regions formed in the upper active regions and constituting a diode together with the first impurity region are provided. A method of fabricating the same is provided as well.
摘要翻译：提供一种半导体器件。该半导体器件包括半导体衬底上的下部有源区。提供从下部有源区域的顶表面突出并且具有比下部有源区域更窄的多个上部有源区域。提供了围绕下部有源区域的侧壁的下部隔离区域。提供了形成在下隔离区域上的上隔离区域，其围绕上活性区域的侧壁，并且具有比下隔离区域窄的宽度。提供形成在下部有源区并延伸到上部有源区的第一杂质区。提供形成在上部有源区并与第一杂质区一起构成二极管的第二杂质区。还提供了制造该方法的方法。

42. 发明申请

US20120007212A1 SEMICONDUCTOR DEVICE HAVING A DIODE 有权
标题翻译：具有二极管的半导体器件
公开(公告)号：US20120007212A1
公开(公告)日：2012-01-12
申请号：US13178762
申请日：2011-07-08
申请人： Bo-Young SEO , Byung-Suo Shim , Yong-Kyu Lee , Tea-Kwang Yu , Ji-Hoon Park
发明人： Bo-Young SEO , Byung-Suo Shim , Yong-Kyu Lee , Tea-Kwang Yu , Ji-Hoon Park
IPC分类号： H01L29/06
CPC分类号： H01L27/1021 , H01L27/2409 , H01L27/2463 , H01L45/06
摘要： Provided is a semiconductor device. The semiconductor device includes a lower active region on a semiconductor substrate. A plurality of upper active regions protruding from a top surface of the lower active region and having a narrower width than the lower active region are provided. A lower isolation region surrounding a sidewall of the lower active region is provided. An upper isolation region formed on the lower isolation region, surrounding sidewalls of the upper active regions, and having a narrower width than the lower isolation region is provided. A first impurity region formed in the lower active region and extending into the upper active regions is provided. Second impurity regions formed in the upper active regions and constituting a diode together with the first impurity region are provided. A method of fabricating the same is provided as well.
摘要翻译：提供一种半导体器件。该半导体器件包括半导体衬底上的下部有源区。提供从下部有源区域的顶表面突出并且具有比下部有源区域更窄的多个上部有源区域。提供了围绕下部有源区域的侧壁的下部隔离区域。提供了形成在下隔离区域上的上隔离区域，其围绕上活性区域的侧壁，并且具有比下隔离区域窄的宽度。提供形成在下部有源区并延伸到上部有源区的第一杂质区。提供形成在上部有源区并与第一杂质区一起构成二极管的第二杂质区。还提供了制造该方法的方法。

43. 发明授权

US07745871B2 Fin field effect transistors including oxidation barrier layers 有权
标题翻译：鳍场效应晶体管包括氧化阻挡层
公开(公告)号：US07745871B2
公开(公告)日：2010-06-29
申请号：US11871453
申请日：2007-10-12
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
IPC分类号： H01L29/78
CPC分类号： H01L29/7854 , B82Y10/00 , H01L29/66545 , H01L29/66553 , H01L29/66795 , H01L29/78645
摘要： A method of forming a fin field effect transistor on a semiconductor substrate includes forming a fin-shaped active region vertically protruding from the substrate. An oxide layer is formed on a top surface and opposing sidewalls of the fin-shaped active region. An oxidation barrier layer is formed on the opposing sidewalls of the fin-shaped active region and is planarized to a height no greater than about a height of the oxide layer to form a fin structure. The fin structure is oxidized to form a capping oxide layer on the top surface of the fin-shaped active region and to form at least one curved sidewall portion proximate the top surface of the fin-shaped active region. The oxidation barrier layer has a height sufficient to reduce oxidation on the sidewalls of the fin-shaped active region about halfway between the top surface and a base of the fin-shaped active region. Related devices are also discussed.
摘要翻译：在半导体衬底上形成鳍状场效应晶体管的方法包括形成从衬底垂直突出的鳍状有源区。在鳍状有源区的上表面和相对侧壁上形成氧化物层。在翅片状有源区域的相对的侧壁上形成氧化阻挡层，并将其平坦化至不大于氧化物层高度的高度以形成翅片结构。翅片结构被氧化以在翅片形有源区的顶表面上形成封盖氧化层，并且在翅片形有源区的顶表面附近形成至少一个弯曲的侧壁部分。氧化阻挡层的高度足以减小翅片形有源区的侧壁上的氧化，大约在鳍状有源区的顶表面和基底之间的一半处。还讨论了相关设备。

44. 发明申请

US20070063263A1 Non-volatile memory devices and method for forming the same 有权
标题翻译：非易失性存储器件及其形成方法
公开(公告)号：US20070063263A1
公开(公告)日：2007-03-22
申请号：US11602032
申请日：2006-11-20
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
IPC分类号： H01L29/788
CPC分类号： H01L29/785 , B82Y10/00 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L27/1203 , H01L29/42392 , H01L29/66545 , H01L29/66795 , H01L29/66825 , H01L29/66833 , H01L29/7851 , H01L29/7854 , H01L29/78645
摘要： According to a nonvolatile memory device having a multi gate structure and a method for forming the same of the present invention, a gate electrode is formed using a damascene process. Therefore, a charge storage layer, a tunneling insulating layer, a blocking insulating layer and a gate electrode layer are not attacked from etching in a process for forming the gate electrode, thereby forming a nonvolatile memory device having good reliability.
摘要翻译：根据本发明的具有多栅极结构的非易失性存储器件及其形成方法，使用镶嵌工艺形成栅电极。因此，在用于形成栅电极的工艺中，电荷存储层，隧道绝缘层，阻挡绝缘层和栅极电极层不会被蚀刻侵蚀，从而形成具有良好可靠性的非易失性存储器件。

45. 发明授权

US06563168B2 Non-volatile semiconductor device with anti-punch through regions 有权
标题翻译：具有抗穿透区域的非易失性半导体器件
公开(公告)号：US06563168B2
公开(公告)日：2003-05-13
申请号：US09989113
申请日：2001-11-21
申请人： Yong-Kyu Lee
发明人： Yong-Kyu Lee
IPC分类号： H01L29788
CPC分类号： H01L27/11543 , H01L21/84 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/1203 , H01L29/66825
摘要： A non-volatile semiconductor device and a method of making such a device having a memory cell formation part and a peripheral circuit part having high and low-voltage transistor formation parts, wherein the device includes an anti-punch through region surrounding a drain region in the memory cell formation part, and surrounding drain and source regions of the low-voltage transistor formation part.
摘要翻译：一种非易失性半导体器件及其制造方法，该器件具有存储单元形成部分和具有高电压和低电压晶体管形成部分的外围电路部分，其中该器件包括围绕漏极区域的反穿通区域存储单元形成部分以及低压晶体管形成部分的周围的漏极和源极区域。

46. 发明授权

US09646687B2 Resistive memory device and operating method 有权
公开(公告)号：US09646687B2
公开(公告)日：2017-05-09
申请号：US14619992
申请日：2015-02-11
申请人： Hyo-Jin Kwon , Yeong-Taek Lee , Dae-Seok Byeon , Yong-Kyu Lee , Hyun-Kook Park
发明人： Hyo-Jin Kwon , Yeong-Taek Lee , Dae-Seok Byeon , Yong-Kyu Lee , Hyun-Kook Park
IPC分类号： G06F11/07 , G11C13/00 , G11C29/52
CPC分类号： G11C13/0033 , G06F11/073 , G06F11/0751 , G06F11/0793 , G06F11/1048 , G11C13/0035 , G11C13/0069 , G11C29/52 , G11C2013/0092 , G11C2213/77
摘要： Provided are a resistive memory device and an operating method for the resistive memory device. The operating method includes detecting a write cycle, determining whether or not to perform a recovery operation by comparing the detected write cycle with a first reference value, and upon determining to perform the recovery operation, performing the recovery operation on target memory cells of the memory cell array.

47. 发明授权

US09570170B2 Resistive memory device and method of operating the same 有权
标题翻译：电阻式存储器件及其操作方法
公开(公告)号：US09570170B2
公开(公告)日：2017-02-14
申请号：US14839606
申请日：2015-08-28
申请人： Chi-Weon Yoon , Hyun-Kook Park , Yeong-Taek Lee , Bo-Geun Kim , Yong-Kyu Lee
发明人： Chi-Weon Yoon , Hyun-Kook Park , Yeong-Taek Lee , Bo-Geun Kim , Yong-Kyu Lee
IPC分类号： G11C8/00 , G11C13/00 , G11C11/56 , G11C11/16
CPC分类号： G11C13/0069 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/5607 , G11C11/5678 , G11C11/5685 , G11C13/0004 , G11C13/0007 , G11C13/0028 , G11C13/004 , G11C2213/72
摘要： A memory device includes a memory cell array having multiple memory cells arranged respectively in regions where first signal lines cross second signal lines. The memory device further includes a decoder having multiple line selection switch units connected respectively to the of first signal lines. Each of the multiple line selection switch units applies a bias voltage to a first signal line corresponding to each of the multiple line selection switch units in response selectively to a first switching signal and a second switching signal, voltage levels of which are different from each other in activated states.
摘要翻译：存储器件包括具有分别布置在第一信号线与第二信号线交叉的区域中的多个存储单元的存储单元阵列。存储装置还包括具有分别连接到第一信号线的多个线路选择开关单元的解码器。多个线路选择开关单元中的每一个选择性地响应于第一开关信号和彼此不同的第二开关信号的第一信号线施加偏置电压到对应于多个线路选择开关单元中的每一个的第一信号线处于激活状态。

48. 发明申请

US20120070949A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件及半导体器件制造方法
公开(公告)号：US20120070949A1
公开(公告)日：2012-03-22
申请号：US13180613
申请日：2011-07-12
申请人： Tea-Kwang Yu , Byung-Sup Shim , Yong-Kyu Lee , Bo-Young Seo , Yong-Tae Kim
发明人： Tea-Kwang Yu , Byung-Sup Shim , Yong-Kyu Lee , Bo-Young Seo , Yong-Tae Kim
IPC分类号： H01L21/8239 , H01L21/8229
CPC分类号： H01L27/2436 , H01L27/105 , H01L27/2445 , H01L45/1683
摘要： A method of fabricating a semiconductor device includes providing a substrate having a memory block and a logic block defined therein, forming a dummy gate pattern on the memory block; forming a first region of a first conductivity type at one side of the dummy gate pattern and a second region of a second conductivity type at the other side of the dummy gate pattern, and forming a nonvolatile memory device electrically connected to the first region.
摘要翻译：一种制造半导体器件的方法包括提供具有存储块和在其中定义的逻辑块的衬底，在存储块上形成伪栅极图案; 在伪栅极图案的一侧形成第一导电类型的第一区域和在虚拟栅极图案的另一侧形成第二导电类型的第二区域，以及形成与第一区域电连接的非易失性存储器件。

49. 发明授权

US07297600B2 Methods of forming fin field effect transistors using oxidation barrier layers 有权
标题翻译：使用氧化阻挡层形成鳍状场效应晶体管的方法
公开(公告)号：US07297600B2
公开(公告)日：2007-11-20
申请号：US11020899
申请日：2004-12-23
申请人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
发明人： Chang-Woo Oh , Dong-Gun Park , Dong-Won Kim , Yong-Kyu Lee
IPC分类号： H01L21/336
CPC分类号： H01L29/7854 , B82Y10/00 , H01L29/66545 , H01L29/66553 , H01L29/66795 , H01L29/78645
摘要： A method of forming a fin field effect transistor on a semiconductor substrate includes forming a fin-shaped active region vertically protruding from the substrate. An oxide layer is formed on a top surface and opposing sidewalls of the fin-shaped active region. An oxidation barrier layer is formed on the opposing sidewalls of the fin-shaped active region and is planarized to a height no greater than about a height of the oxide layer to form a fin structure. The fin structure is oxidized to form a capping oxide layer on the top surface of the fin-shaped active region and to form at least one curved sidewall portion proximate the top surface of the fin-shaped active region. The oxidation barrier layer has a height sufficient to reduce oxidation on the sidewalls of the fin-shaped active region about halfway between the top surface and a base of the fin-shaped active region. Related devices are also discussed.
摘要翻译：在半导体衬底上形成鳍状场效应晶体管的方法包括形成从衬底垂直突出的鳍状有源区。在鳍状有源区的上表面和相对侧壁上形成氧化物层。在翅片状有源区域的相对的侧壁上形成氧化阻挡层，并将其平坦化至不大于氧化物层高度的高度以形成翅片结构。翅片结构被氧化以在翅片形有源区的顶表面上形成封盖氧化层，并且在翅片形有源区的顶表面附近形成至少一个弯曲的侧壁部分。氧化阻挡层的高度足以减小翅片形有源区的侧壁上的氧化，大约在鳍状有源区的顶表面和基底之间的一半处。还讨论了相关设备。

50. 发明授权

US06589943B2 Formulation of amphiphilic heparin derivatives for enhancing mucosal absorption 失效
标题翻译：制备两亲肝素衍生物以增强粘膜吸收
公开(公告)号：US06589943B2
公开(公告)日：2003-07-08
申请号：US09852131
申请日：2001-05-09
申请人： Youngro Byun , Yong-Kyu Lee
发明人： Youngro Byun , Yong-Kyu Lee
IPC分类号： A61K31727
CPC分类号： C08B37/0075 , A61K31/727 , A61K47/542 , A61K47/554 , C08B37/00 , Y10S977/773 , Y10S977/775 , Y10S977/905 , Y10S977/915
摘要： Formulations for enhanced mucosal absorption of heparin are disclosed. In one embodiment, a powdered heparin composition is made by dissolving an amphiphilic heparin derivative including heparin covalently bonded to a hydrophobic agent in a water phase, dispersing the water phase in an organic phase such that an emulsion is formed, and drying the emulsion. In another embodiment, an amorphiphilic heparin derivative dispersed in an oil phase is made by dissolving the amphiphilic heparin derivative in water or a water/organic co-solvent, dispersing the water or co-solvent in the oil phase, and evaporating the water or co-solvent. In another embodiment, heparin-containing nanoparticles having surfactant molecules associated with a hydrophobic agent on the outside of the nanoparticles are made by dissolving the amphiphilic heparin derivative in an aqueous solvent, mixing the surfactant with the aqueous solvent, and disrupting nanoparticles of the amphiphilic heparin derivative. Compositions made according to these methods are also described.
摘要翻译：公开了用于增强肝素粘膜吸收的制剂。在一个实施方案中，通过将包含共价键合在疏水剂上的肝素的两亲性肝素衍生物溶解在水相中来制备粉状肝素组合物，将水相分散在有机相中，形成乳液，并干燥乳液。在另一个实施方案中，通过将两亲肝素衍生物溶解在水或水/有机共溶剂中，将水或助溶剂分散在油相中并蒸发水或共混物来制备分散在油相中的非晶性肝素衍生物 -溶剂。在另一个实施方案中，通过将两亲性肝素衍生物溶解在水性溶剂中，将表面活性剂与水性溶剂混合，并破坏两性肝素的纳米颗粒，制备具有与纳米颗粒外侧疏水剂相关的表面活性剂分子的含肝素的纳米颗粒衍生物。还描述了根据这些方法制备的组合物。

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