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41. 发明授权

US5428421A Exposure control device 失效
标题翻译：曝光控制装置
公开(公告)号：US5428421A
公开(公告)日：1995-06-27
申请号：US287463
申请日：1994-08-08
申请人： Hideo Kawahara , Hideyuki Arai
发明人： Hideo Kawahara , Hideyuki Arai
IPC分类号： H04N5/232 , H04N5/238 , G03B7/08
CPC分类号： H04N5/23203 , H04N5/23209 , H04N5/238
摘要： An exposure control device which permits exposure control either in an automatic mode or in a manual mode is arranged to smoothly perform the exposure control by holding exposure control information obtained immediately before change-over of the exposure control mode from one mode over to the other; and is provided with a correction circuit for uniformalizing an iris driving characteristic for the whole iris driving range by correcting the non-linearity of the characteristic.
摘要翻译：布置允许以自动模式或手动模式进行曝光控制的曝光控制装置，通过将曝光控制模式切换之前获得的曝光控制信息从一种模式保持到另一模式来平滑地执行曝光控制; 并且设置有校正电路，用于通过校正特性的非线性来使整个光圈驱动范围的光圈驱动特性均匀化。

42. 发明授权

US08392856B2 Semiconductor device and layout design method for the same 有权
标题翻译：半导体器件和布局设计方法相同
公开(公告)号：US08392856B2
公开(公告)日：2013-03-05
申请号：US13013442
申请日：2011-01-25
申请人： Akio Misaka , Yasuko Tabata , Hideyuki Arai , Takayuki Yamada
发明人： Akio Misaka , Yasuko Tabata , Hideyuki Arai , Takayuki Yamada
IPC分类号： G06F17/50
CPC分类号： H01L23/528 , G06F17/50 , G06F17/5072 , G06F2217/12 , H01L23/522 , H01L2924/0002 , Y02P90/265 , H01L2924/00
摘要： A semiconductor device includes: a plurality of line features including at least one real feature which includes a gate electrode portion, and at least one dummy feature. Two of multiple ones of the dummy feature, and at least one of the line features interposed between the two dummy features and including the at least one real feature form parallel running line features which are evenly spaced. The parallel running line features have an identical width, and line end portions of the parallel running line features are substantially flush. Line end portion uniformization dummy features are formed on extensions of the line end portions of the parallel running line features. The line end portion uniformization dummy features include a plurality of linear features each having a same width as each of the line features and spaced at intervals equal to an interval between each adjacent pair of the line features.
摘要翻译：半导体器件包括：多个线特征，包括至少一个实际特征，其包括栅电极部分和至少一个虚拟特征。两个虚拟特征中的两个，并且插入在两个虚拟特征之间并且包括至少一个真实特征的线特征中的至少一个形成均匀间隔的并行运行线特征。平行运行线特征具有相同的宽度，并行运行线特征的线端部分基本齐平。线端部均匀化虚拟特征形成在平行运行线特征的线端部的延伸部上。线端部均匀化虚拟特征包括多个线性特征，每个线性特征具有与每个线特征相同的宽度，并以等于每对相邻线特征之间的间隔间隔。

43. 发明授权

US08374761B2 Driving force distribution control method and device for four wheel drive vehicle 失效
标题翻译：四轮驱动车辆的驱动力分配控制方法及装置
公开(公告)号：US08374761B2
公开(公告)日：2013-02-12
申请号：US12186081
申请日：2008-08-05
申请人： Yoshiyuki Fukuda , Tomoaki Fujibayashi , Hideyuki Arai
发明人： Yoshiyuki Fukuda , Tomoaki Fujibayashi , Hideyuki Arai
IPC分类号： B60K28/16 , G06F17/00 , B60T8/24 , B60T8/58
CPC分类号： B60K23/0808 , B60W2520/14 , B60W2720/14
摘要： A driving force distribution control device for a four wheel drive vehicle having a mechanism that distributes the torque of an engine, which is transmitted to a main drive wheel, to a secondary drive wheel determines a first torque to be distributed to the secondary drive wheel on the basis of the engine torque, and corrects the determined first torque on the basis of a yaw rate deviation between a target yaw rate and an actual yaw rate of the vehicle. When an absolute value of the yaw rate deviation is equal to or greater than a predetermined value, the mechanism is controlled on the basis of the corrected torque.
摘要翻译：一种用于四轮驱动车辆的驱动力分配控制装置，其具有将发送到主驱动轮的发动机的扭矩分配给辅助驱动轮的机构，确定要分配给次驱动轮的第一扭矩，基于发动机扭矩的基础，并且基于目标横摆率和车辆的实际横摆角速度之间的横摆率偏差来校正所确定的第一扭矩。当偏航率偏差的绝对值等于或大于预定值时，基于校正扭矩来控制机构。

44. 发明申请

US20110278679A1 SEMICONDUCTOR DEVICE, MASK FOR FABRICATION OF SEMICONDUCTOR DEVICE, AND OPTICAL PROXIMITY CORRECTION METHOD 有权
标题翻译：半导体器件，半导体器件制造掩模和光学临近校正方法
公开(公告)号：US20110278679A1
公开(公告)日：2011-11-17
申请号：US13014346
申请日：2011-01-26
申请人： Yasuko Tabata , Akio Misaka , Takehiro Hirai , Hideyuki Arai , Yuji Nonami
发明人： Yasuko Tabata , Akio Misaka , Takehiro Hirai , Hideyuki Arai , Yuji Nonami
IPC分类号： H01L27/088 , G03F1/00 , G06F17/50
CPC分类号： G06F17/5068 , G03F1/36 , G03F1/38 , H01L21/28123 , H01L21/31144 , H01L21/32139 , H01L27/0207
摘要： A semiconductor device includes a circuit portion including at least one real feature, and a plurality of dummy feature groups each including a plurality of dummy features spaced apart from each other by a first distance. The plurality of dummy feature groups are spaced apart from each other by a second distance larger than the first distance, and the circuit portion and the plurality of dummy feature groups are spaced apart from each other by the second distance.
摘要翻译：半导体器件包括包括至少一个实际特征的电路部分和多个虚拟特征组，每个虚拟特征组包括彼此间隔开第一距离的多个虚拟特征。多个虚拟特征组彼此间隔开大于第一距离的第二距离，并且电路部分和多个虚拟特征组彼此间隔开第二距离。

45. 发明授权

US07973835B2 Solid-state image pickup apparatus 有权
标题翻译：固态摄像装置
公开(公告)号：US07973835B2
公开(公告)日：2011-07-05
申请号：US10967360
申请日：2004-10-19
申请人： Katsuhito Sakurai , Shigetoshi Sugawa , Hideyuki Arai , Isamu Ueno , Katsuhisa Ogawa , Toru Koizumi , Tetsunobu Kochi , Hiroki Hiyama
发明人： Katsuhito Sakurai , Shigetoshi Sugawa , Hideyuki Arai , Isamu Ueno , Katsuhisa Ogawa , Toru Koizumi , Tetsunobu Kochi , Hiroki Hiyama
IPC分类号： H04N5/217 , H04N3/14 , H01L27/00
CPC分类号： H04N5/35563 , H04N5/3559 , H04N5/3575
摘要： This invention is to provide a solid-state image pickup apparatus including a photoelectric conversion unit (PD), transfer switch (MTX) for transferring signal charges from the photoelectric conversion unit, capacitance for holding the transferred signal charges, and amplification transistor (MSF) for outputting a signal corresponding to the signal charges held by the capacitance. The amplification transistor includes a capacitance unit (CFD) having the first capacitance value and an additive capacitance unit (Cox) for adding a capacitance to the capacitance unit to increase the first capacitance value and obtain the second capacitance value. A signal read-out from the amplification transistor has a first read-out mode in which a signal is read out while keeping the signal charges held by the capacitance unit and additive capacitance unit, and a second read-out mode in which a signal is read out while keeping the signal charges held by the capacitance unit.
摘要翻译：本发明提供一种固态摄像装置，包括光电转换单元（PD），用于传送来自光电转换单元的信号电荷的转移开关（MTX），用于保持传送的信号电荷的电容和放大晶体管（MSF）用于输出对应于由电容保持的信号电荷的信号。放大晶体管包括具有第一电容值的电容单元（CFD）和用于将电容添加到电容单元的增加电容单元（Cox），以增加第一电容值并获得第二电容值。从放大晶体管读出的信号具有第一读出模式，其中在保持由电容单元和附加电容单元保持的信号电荷的同时读出信号，以及第二读出模式，其中信号为在保持由电容单元保持的信号电荷的同时读出。

46. 发明授权

US07795662B2 Semiconductor memory device and method for fabricating same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07795662B2
公开(公告)日：2010-09-14
申请号：US11822921
申请日：2007-07-11
申请人： Hideyuki Arai , Takashi Nakabayashi
发明人： Hideyuki Arai , Takashi Nakabayashi
IPC分类号： H01L27/108
CPC分类号： H01L28/91 , H01L27/10811 , H01L27/10852 , H01L27/10888
摘要： A semiconductor memory device has a first interlayer insulating film formed on a semiconductor substrate and having a capacitor opening portion provided in the film, and a capacitance element formed over the bottom and sides of the capacitor opening portion and composed of a lower electrode, a capacitance insulating film, and an upper electrode. A bit-line contact plug is formed through the first interlayer insulating film. At least parts of respective upper edges of the lower electrode, the capacitance insulating film, and the upper electrode at a side facing the bit-line contact plug are located below the surface of the first interlayer insulating film, the lower electrode, the capacitance insulating film, and the upper electrode being located over the sides of the capacitor opening portion. The upper electrode is formed over only the bottom and sides of the capacitor opening portion.
摘要翻译：半导体存储器件具有形成在半导体衬底上并具有设置在膜中的电容器开口部分的第一层间绝缘膜，以及形成在电容器开口部分的底部和侧面上并由下部电极构成的电容元件，绝缘膜和上电极。通过第一层间绝缘膜形成位线接触插头。下电极，电容绝缘膜和位于位线接触插塞的一侧的上电极的至少一部分位于第一层间绝缘膜的表面下方，下电极，电容绝缘层膜，并且上电极位于电容器开口部分的侧面上。上电极仅形成在电容器开口部的底部和侧面上。

47. 发明授权

US07737480B2 Semiconductor memory device and manufacturing method thereof 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US07737480B2
公开(公告)日：2010-06-15
申请号：US11826089
申请日：2007-07-12
申请人： Ryo Nakagawa , Takashi Nakabayashi , Hideyuki Arai
发明人： Ryo Nakagawa , Takashi Nakabayashi , Hideyuki Arai
IPC分类号： H01L31/062
CPC分类号： H01L27/10888 , H01L27/0207 , H01L27/10811
摘要： A semiconductor memory device includes: a transistor formed in a substrate; a capacitor formed above one of source/drain regions of the transistor; a bit line formed above the substrate and extending in the gate length direction of the transistor; a first conductive plug connecting one of the source/drain regions and the capacitor; a second conductive plug connected to the other source/drain region that is not connected to the first conductive plug; and a third conductive plug formed on the second conductive plug and connected to the bit line. The central axis of the third conductive plug is displaced from the central axis of the second conductive plug in the gate width direction of the transistor.
摘要翻译：半导体存储器件包括：形成在衬底中的晶体管; 形成在所述晶体管的源/漏区之一上的电容器; 形成在衬底上并沿晶体管的栅极长度方向延伸的位线; 连接源极/漏极区域和电容器之一的第一导电插头; 连接到未连接到第一导电插头的另一个源极/漏极区域的第二导电插头; 以及形成在所述第二导电插头上并连接到所述位线的第三导电插塞。第三导电插塞的中心轴线在晶体管的栅极宽度方向上从第二导电插头的中心轴线移位。

48. 发明申请

US20080035975A1 Semiconductor memory device and manufacturing method thereof 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20080035975A1
公开(公告)日：2008-02-14
申请号：US11826089
申请日：2007-07-12
申请人： Ryo Nakagawa , Takashi Nakabayashi , Hideyuki Arai
发明人： Ryo Nakagawa , Takashi Nakabayashi , Hideyuki Arai
IPC分类号： H01L27/108 , H01L21/8242
CPC分类号： H01L27/10888 , H01L27/0207 , H01L27/10811
摘要： A semiconductor memory device includes: a transistor formed in a substrate; a capacitor formed above one of source/drain regions of the transistor; a bit line formed above the substrate and extending in the gate length direction of the transistor; a first conductive plug connecting one of the source/drain regions and the capacitor; a second conductive plug connected to the other source/drain region that is not connected to the first conductive plug; and a third conductive plug formed on the second conductive plug and connected to the bit line. The central axis of the third conductive plug is displaced from the central axis of the second conductive plug in the gate width direction of the transistor.
摘要翻译：半导体存储器件包括：形成在衬底中的晶体管; 形成在所述晶体管的源/漏区之一上的电容器; 形成在衬底上并沿晶体管的栅极长度方向延伸的位线; 连接源极/漏极区域和电容器之一的第一导电插头; 连接到未连接到第一导电插头的另一个源极/漏极区域的第二导电插头; 以及形成在所述第二导电插头上并连接到所述位线的第三导电插塞。第三导电插塞的中心轴线在晶体管的栅极宽度方向上从第二导电插头的中心轴线移位。

49. 发明申请

US20070275529A1 Semiconductor device manufacturing method 有权
标题翻译：半导体器件制造方法
公开(公告)号：US20070275529A1
公开(公告)日：2007-11-29
申请号：US11702593
申请日：2007-02-06
申请人： Hideyuki Arai , Takashi Nakabayashi , Yasutoshi Okuno
发明人： Hideyuki Arai , Takashi Nakabayashi , Yasutoshi Okuno
IPC分类号： H01L21/336
CPC分类号： H01L21/823462 , H01L21/823412 , H01L29/7833
摘要： After protective insulating films are formed on first to third active regions, the protective insulating films formed on the first and third active regions are removed. Subsequently, an insulating film to be a first gate insulating film is formed on each of the first and third active regions, and then, the protective insulating film formed on the second active region is removed. Next, an insulating film to be a second gate insulating film is formed on the second active region, and then, the insulating film to be the first gate insulating film formed on the third active region is removed. Finally, an insulating film to be a third gate insulating film is formed on the third active region.
摘要翻译：在第一至第三有源区上形成保护绝缘膜之后，去除形成在第一和第三有源区上的保护绝缘膜。随后，在第一和第三有源区域中的每一个上形成作为第一栅极绝缘膜的绝缘膜，然后去除形成在第二有源区上的保护绝缘膜。接下来，在第二有源区上形成作为第二栅极绝缘膜的绝缘膜，然后除去形成在第三有源区上的作为第一栅极绝缘膜的绝缘膜。最后，在第三有源区上形成作为第三栅极绝缘膜的绝缘膜。

50. 发明申请

US20060086960A1 Semiconductor memory and method for manufacturing the same 失效
标题翻译：半导体存储器及其制造方法
公开(公告)号：US20060086960A1
公开(公告)日：2006-04-27
申请号：US11152109
申请日：2005-06-15
申请人： Hideyuki Arai , Takashi Nakabayashi , Takashi Ohtsuka
发明人： Hideyuki Arai , Takashi Nakabayashi , Takashi Ohtsuka
IPC分类号： H01L27/108
CPC分类号： H01L27/10852 , H01L27/10811 , H01L27/10888 , H01L28/91
摘要： A capacitor of a semiconductor memory of the present invention includes: a lower electrode which covers the surface of a storage node hole from the bottom to at least one of the sidewalls up to a level lower than the top surface of a second interlayer insulating film; a capacitive insulating film which covers the lower electrode; and an upper electrode which covers the capacitive insulating film.
摘要翻译：本发明的半导体存储器的电容器包括：下电极，其从底部到至少一个侧壁覆盖存储节点孔的表面直到比第二层间绝缘膜的顶表面低的水平; 覆盖下电极的电容绝缘膜; 以及覆盖电容绝缘膜的上电极。

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