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41. 发明专利

JPS6451252A CUTTING DEVICE 失效
公开(公告)号：JPS6451252A
公开(公告)日：1989-02-27
申请号：JP20401787
申请日：1987-08-19
申请人： HITACHI LTD
发明人： KAMATA CHIYOSHI
IPC分类号： B23Q11/08 , B23Q11/00 , B24B27/06
摘要： PURPOSE:To prevent chips from scattering into work environment in an effective manner by enclosing the circumference of a stage where a workpiece is mounted, with a cover, while setting up a shower nozzle, for spraying water, in this cover. CONSTITUTION:Water is sprayed in every direction from all shower nozzles 12 set up in an inner wall of a cover 2, then a blade 5 is rotated at high speed, while it moves downward toward a stage 3 whereby cutting of a wafer 4 is started. At this time, a large quantity of chips 14 produced are mixed in cooling water to be fed to a cutting spot of the wafer 4 from a cooling water nozzle 9, and these chips are accelerated by high speed rotation of the blade 5 and scattered sprayfully. A part of this spray flows in a drain hole 19 by its own weight, another part flows into the hole 10 by water sprayed out of the nozzle 12 after colliding with a side wall of the cover 2, furthermore the spray floated in the cover 2 also flows into the drain hole 10 by mixing with the water out of the nozzle 12. Accordingly, these chips are in no case scattered into work environment after coming to dust.

42. 发明专利

JPS62169429A SEMICONDUCTOR DEVICE AND MENUFACTURE THEREOF 失效
公开(公告)号：JPS62169429A
公开(公告)日：1987-07-25
申请号：JP1006986
申请日：1986-01-22
申请人： HITACHI LTD
发明人： KAMATA CHIYOSHI , OTSUKA KANJI , MITSUSADA KAZUMICHI
IPC分类号： H01L21/52 , H01L21/58
摘要： PURPOSE:To prevent detachment or cracks of pellets by bonding a semiconductor pellet consisting of GaAs on a substrate with good wettablity by bonding the GaAs semiconductor pellet to a pellet mounting substrate through an alloy which mainly consists of Au and includes at least Ga, As, and Sn. CONSTITUTION:On a bonding plane of a GaAs pellet 2, a first layer 8 composed of Ge of 8% and Au, a second layer 9 consisting of W, a third layer 10 of Ni, and further a fourth layer 11 coated with Au are laminated. This laminar body is put on a package substrate 1 coated with an Au layer 13 with a foil 12 composed of an Au alloy including Sn of 20% inserted between them. Under these conditions, those are heated to a predetermined temperature and is scrubbed. Consequently, the mounting of the GaAs pellet 2 using a bonding member 3 consisting of an alloy which mainly consists of Au and in addition, which includes Ga, As, Sn, W, Ni and Ge is attained steadily.

43. 发明专利

JPS61236130A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS61236130A
公开(公告)日：1986-10-21
申请号：JP7653385
申请日：1985-04-12
申请人： HITACHI LTD
发明人： KAMATA CHIYOSHI , OTSUKA KANJI , YAMADA TAKEO
IPC分类号： H01L21/60
摘要： PURPOSE:To accelerate the signal processing speed while shortening the wire length by a method wherein the end of lead is extended to the circuit forming face side of a pellet while bonding to the circuit forming face of the pellet to bond the lead to the nearest bonding pad by wire bonding process. CONSTITUTION:The inner end of a lead 1 as an outer terminal is bonded to the surface of a pellet 2 as a circuit forming face using silicon rubber base bonding agent 3. Moreover the inner end and the surface are electrically connected to each other by a bonding pad 4 of the pellet 2 and a wire 5. A package 6 is formed with said elements sealed as they are with epoxy resin. In such a constitution, the end of lead 1 is extended to the position near the bonding pad 4 on the surface of pellet 2 to extremely shorten the wire 5 besides the bonding pad 4 can be mounted on the pertinent position to receive signals from each circuit element within the shortest time.

44. 发明专利

JPS6020521A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6020521A
公开(公告)日：1985-02-01
申请号：JP12763083
申请日：1983-07-15
申请人： HITACHI LTD
发明人： ISHIDA TAKASHI , SEKI MASATOSHI , SAWARA KUNIZOU , EMOTO YOSHIAKI , KAMATA CHIYOSHI
IPC分类号： H01L21/60
摘要： PURPOSE:To obtain a wiring, dimensional accuracy thereof is high and resistance thereof is low, by forming the wiring on a package substrate by a multilayer wiring consisting of chromium and copper. CONSTITUTION:A wiring 4 is formed as three layer thin-film multilayer wirings consisting of a chromium layer 10 formed on a package substrate 1 after sintering through the evaporation of a thin-film, a copper layer 11 evaporated on the layer 10 in a thin-film shape and a chromium layer 12 evaporated on the layer 11 in the thin-film shape. A pedestal section 5 is composed of a copper layer 13 evaporated on the chromium layer 12 as the uppermost layer of the wiring 4 in the thin-film shape and a chromium layer 14 evaporated around the copper layer 13 in the thin-film shape. Since the wiring 4 is formed by the three layer thin- film evaporated layers of the chromium layer 10, the copper layer 11 and the chromium layer 12, the wiring 4 and the pedestal section 5 are formed with dimensional accuracy higher than a tungsten wiring formed through sintering. Accordingly, a large-sized pellet can be face-down bonded, and the resistance of the wiring 4 can be lowered by the presence of the copper layer 11.

45. 发明专利

JPH07221262A SEMICONDUCTOR MODULE 失效
公开(公告)号：JPH07221262A
公开(公告)日：1995-08-18
申请号：JP1386994
申请日：1994-02-07
申请人： HITACHI LTD
发明人： SUWA MOTOHIRO , TAKAHASHI HIROYUKI , KAMATA CHIYOSHI
IPC分类号： H01L25/18 , H01L23/52 , H01L25/065 , H01L25/07
摘要： PURPOSE:To obtain a semiconductor module in which every length of wirings for a plurality of semiconductor chips mounted on a wiring board is made shortest. CONSTITUTION:In a semiconductor module, a first semiconductor chip 1 is bonded facedown to the main face of a wiring board 3 via solder bumps 8, and a second semiconductor, chip 2 whose outside size is larger than that of the first semiconductor chip 1 is bonded facedown via a plurality of metal bumps 9 which have been overlapped in their height direction in such a way that it is piled up on the first semiconductor chip.

46. 发明专利

JPH04180401A HIGH FREQUENCY TRANSMISSION LINE 失效
公开(公告)号：JPH04180401A
公开(公告)日：1992-06-26
申请号：JP30925890
申请日：1990-11-15
申请人： HITACHI LTD
发明人： KAMATA CHIYOSHI
IPC分类号： H01L23/12 , H01L23/64 , H01P1/203 , H01P3/08 , H05K1/02 , H05K1/18
摘要： PURPOSE:To realize a line suitable for the transmission of a high frequency signal by arranging a reference potential wire comprising a couple of wires of prescribed connection in a specified way. CONSTITUTION:A reference potential wire 12 comprising a couple of wires G1, G2 whose one-side terminals are connected together and whose other terminals are connected to a reference level is arranged along a package wire 9 being a signal wire. Then currents of to the parts G1, G2 of the wire 12 flow opposite to each other, and the self-inductance of the wire 12 and the mutual inductance between the wires 9 and 12 are decreased because the inductance components are cancelled together resulting in increasing the resonance frequency. Thus, when the resonance frequency is shifted to the outside of the band, the resonance between the wires 9 and 12 is suppressed and the high frequency transmission line suitable for the transmission of a high frequency signal is realized.

47. 发明专利

JPH03195049A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH03195049A
公开(公告)日：1991-08-26
申请号：JP33603289
申请日：1989-12-25
申请人： HITACHI LTD
发明人： KAMATA CHIYOSHI
IPC分类号： H01L23/12 , H01L23/66 , H01L25/00 , H01P5/02 , H01P5/08
摘要： PURPOSE:To realize a high band of a signal frequency transmitted in a signal transmission line inside a package by a method wherein a specific adjustment impedance is installed at the inside of the package which houses a semiconductor chip. CONSTITUTION:A thick-film resistance 9 having a prescribed impedance is arranged near a package interconnection 6 formed at the outer circumference part of a substrate 2 so as to be nearly parallel with the package interconnection 6. The thick-film resistance 9 is a characteristic impedance of the package interconnection 6 and an adjustment impedance which compensates the mismatching to a terminal impedance of a signal transmission line. The thick- film resistance 9 is arranged one by one near all package interconnections 6 through which an input/output signal is transmitted out of a plurality of package interconnections 6; it is connected in parallel with the package interconnection 6 via bonding wires 10. Thereby, since the reflection of a signal and the waveform distortion at a terminal part are reduced, a transmission frequency of the signal transmission line inside a package can be made a high band.

48. 发明专利

JPH03106047A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH03106047A
公开(公告)日：1991-05-02
申请号：JP24452989
申请日：1989-09-20
申请人： HITACHI LTD
发明人： KAMATA CHIYOSHI
IPC分类号： H01L21/60 , H01L23/12
摘要： PURPOSE:To prevent the deterioration of a waveform by a method wherein a transmission line for making an exchange of an electrical signal with one terminal provided on a semiconductor chip is constituted into a hierarchical structure consisting of two layers or more and the upper and lower layer transmission lines of the transmission line are connected to each other by at least two pieces or more of connection conductors. CONSTITUTION:One end of a bonding wire 2 is connected to a bonding pad formed on a semiconductor chip 1. A transmission line 13 constituted into a two-layer hierarchical structure is connected to the other end of the wire 2. This line 13 constituted into a two-layer hierarchical structure is constituted of upper and lowe layer transmission lines 31 and 32 and via metals 41 and 42, which are connected with the lines 31 and 32 at both ends of each via metal. That is, as the line 13 is constituted into a two-layer hierarchical structure and the lines 31 and 32 are provided in such a way that they are connected to each other by two pieces of the metals 41 and 42, a transmission path can be made into two kinds like transmission paths A and B. Thereby, the deterioration of a waveform stops generating.

49. 发明专利

JPH02198158A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH02198158A
公开(公告)日：1990-08-06
申请号：JP1613589
申请日：1989-01-27
申请人： HITACHI LTD
发明人： KAMATA CHIYOSHI
IPC分类号： H01L23/12 , H01L23/50 , H01P5/02 , H01P5/08
摘要： PURPOSE:To improve the reliability of a high speed semiconductor device by a method wherein a plurality of wiring conductors, or plurality of other wiring conductors formed in a substrate so as to surround the former wiring conductors, a semiconductor chip, wires, metal films and a metal cap for sealing conductors are provided. CONSTITUTION:Outer constant potential wirings 7, inner constant potential wirings 5 and a metal film 2 are connected to each other with connection wirings 11 in a substrate 100. The top ends of the inner constant potential wirings 6 are connected to a cap 8 through metal films 9 on the surface of the substrate 100. The predetermined one of the inner constant potential wirings 6 is connected to a bonding pad on a semiconductor chip 1 for supplying a constant potential through a bonding wire 3. If the respective distances between a signal wiring 5 and the outer constant potential wirings 7, the inner constant potential wirings 6 and the metal film 2 are adjusted, various values of the impedance of the signal wiring 5 can be predelermined. With this constitution, a wiring structure suitable for microwave transmission can be obtained and the reliability of a high speed semiconductor device can be improved.

50. 发明专利

JPH02142134A MANUFACTURE OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINED THROUGH THE SAME METHOD 失效
公开(公告)号：JPH02142134A
公开(公告)日：1990-05-31
申请号：JP29535188
申请日：1988-11-22
申请人： HITACHI LTD
发明人： KAMATA CHIYOSHI , KOBASHI TAKAHIRO
IPC分类号： H01L21/60 , H01L21/321
摘要： PURPOSE:To improve reliability on connection between a pellet and a pellet mounting substrate by applying a first metallic film onto a bonding pad and applying a second metallic film onto the flat metallic film exposed from the surface of an insulating film through a resist. CONSTITUTION:When bumps are formed onto the bonding pads 4 of a wafer 1, first metallic films 6 are applied onto the bonding pads 4 through resists, an insulating film 7 covering the metallic films is applied onto the wafer, the insulating film 7 is etched back and the surface of the insulating film 7 is flattened, and second metallic films 9 are applied onto the flat metallic films 6 exposed from the surface of the insulating film through resists. A pellet 11 acquired through the manufacture is mounted to a pellet mounting substrate 12 through bumps 10a composed of the metallic films 6, 9 while being connected onto the rear of a cap 13 through solder 15 for heat transfer.

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