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41. 发明授权

US08501026B2 Method for making a planar membrane 失效
标题翻译：制造平面膜的方法
公开(公告)号：US08501026B2
公开(公告)日：2013-08-06
申请号：US13377319
申请日：2010-06-17
申请人： Christophe Constancias , Bernard Dalzotto , Frank Fournel , Philippe Michallon , Hubert Moriceau , Valerie Pouteau
发明人： Christophe Constancias , Bernard Dalzotto , Frank Fournel , Philippe Michallon , Hubert Moriceau , Valerie Pouteau
IPC分类号： B44C1/22 , H01L21/31 , G01N3/08
CPC分类号： B81C1/00158 , B81B2201/0264 , B81B2201/047 , B81C2201/017
摘要： A method for determining a minimum tension compensation stress which will have a membrane of a thickness of less than or equal to one micrometer, secured to a frame, having, in the absence of any external stress, a desired deflection. The membrane can be made as planar as possible in absence of any external stress, and its thickness can be less than or equal to one micrometer.
摘要翻译：一种用于确定最小张力补偿应力的方法，其将具有小于或等于1微米厚度的膜，固定到框架，在没有任何外部应力的情况下具有期望的偏转。膜可以在没有任何外部应力的情况下制成尽可能平坦的，并且其厚度可以小于或等于1微米。

42. 发明申请

US20120291861A1 PHOTOVOLTAIC CELL, INCLUDING A CRYSTALLINE SILICON OXIDE PASSIVATION THIN FILM, AND METHOD FOR PRODUCING SAME 审中-公开
标题翻译：包括晶体氧化硅钝化薄膜的光电池及其制造方法
公开(公告)号：US20120291861A1
公开(公告)日：2012-11-22
申请号：US13522901
申请日：2011-01-26
申请人： Pierre Mur , Hubert Moriceau , Pierre-Jean Ribeyron
发明人： Pierre Mur , Hubert Moriceau , Pierre-Jean Ribeyron
IPC分类号： H01L31/077 , H01L31/0352 , H01L31/18 , H01L31/075
CPC分类号： H01L31/0745 , H01L31/0747 , H01L31/1868 , Y02E10/50 , Y02P70/521
摘要： A heterojunction photovoltaic cell includes at least one crystalline silicon oxide film directly placed onto one of the front or rear faces of a crystalline silicon substrate, between said substrate and a layer of amorphous or microcrystalline silicon. The thin film is intended to enable the passivation of said face of the substrate. The thin film is more particularly obtained by radically oxidizing a surface portion of the substrate, before depositing the layer of amorphous silicon. Moreover, a thin layer of intrinsic or microdoped amorphous silicon can be placed between said think film and the layer of amorphous or microcrystalline silicon.
摘要翻译：异质结光伏电池包括直接放置在晶体硅衬底的前表面或后表面之一上的至少一个晶体氧化硅膜，位于所述衬底和非晶或微晶硅层之间。薄膜旨在使得能够钝化基底的所述面。在沉积非晶硅层之前，更特别地通过对衬底的表面部分进行自由基氧化来获得薄膜。此外，可以在所述思维膜和非晶或微晶硅层之间放置本征或微掺杂非晶硅的薄层。

43. 发明授权

US08207048B2 Method for producing ordered nanostructures 失效
标题翻译：生产有序纳米结构的方法
公开(公告)号：US08207048B2
公开(公告)日：2012-06-26
申请号：US11612829
申请日：2006-12-19
申请人： Franck Fournel , Hubert Moriceau , Chrystel Deguet
发明人： Franck Fournel , Hubert Moriceau , Chrystel Deguet
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/2007 , B81C1/00031 , H01L21/76254
摘要： Method for producing nanostructures comprising: a step of providing a substrate (100) having a buried barrier layer (2) and above said barrier layer (2) a crystalline film (5) provided with a network of crystalline defects and/or stress fields (12) in a crystalline zone (13), one or several steps of attacking the substrate (100), of which a preferential attack either of the crystalline defects and/or the stress fields, or the crystalline zone (13) between the crystalline defects and/or the stress fields, said attack steps enabling the barrier layer (2) to be laid bared locally and protrusions (7) to be formed on a nanometric scale, separated from each other by hollows (7.1) having a base located in the barrier layer, the protrusions leading to nanostructures (7, 8).
摘要翻译：一种生产纳米结构的方法，包括：提供具有掩埋阻挡层（2）和所述阻挡层（2）上方的衬底（100）的步骤，所述结晶膜（5）具有晶体缺陷和/或应力场网络 12）在结晶区域（13）中，攻击衬底（100）的一个或几个步骤，其中晶体缺陷和/或应力场的优先攻击或晶体缺陷之间的结晶区域（13）和/或应力场，所述攻击步骤使得阻挡层（2）能够局部放置并且以纳米尺度形成突起（7），所述突起（7）通过具有位于阻挡层，导致纳米结构的突起（7,8）。

44. 发明授权

US07906362B2 Assembling two substrates by molecular adhesion 有权
标题翻译：通过分子粘附装配两个底物
公开(公告)号：US07906362B2
公开(公告)日：2011-03-15
申请号：US11630283
申请日：2005-06-29
申请人： Guy Feuillet , Hubert Moriceau , Stephane Pocas , Eric Jalaguier , Norbert Moussy
发明人： Guy Feuillet , Hubert Moriceau , Stephane Pocas , Eric Jalaguier , Norbert Moussy
IPC分类号： H01L21/00 , H01L21/30 , H01L21/46 , H01L21/31 , H01L21/469
CPC分类号： H01L27/14636 , H01L24/83 , H01L27/14634 , H01L33/0079 , H01L2224/83801 , H01L2224/83894 , H01L2924/01079 , H01L2924/01087 , H01L2924/07811 , Y10T29/49126 , H01L2924/3512 , H01L2924/00
摘要： An assembly method to enable local electrical bonds between zones located on a face of a first substrate and corresponding zones located on a face of a second substrate, the faces being located facing each other, at least one of the substrates having a surface topography. The method forms an intermediate layer including at least one burial layer on the face of the substrate or substrates having a surface topography to make it (them) compatible with molecular bonding of the faces of substrates to each other from a topographic point of view, resistivity and/or thickness of the intermediate layer being chosen to enable the local electrical bonds, brings the two faces into contact, the substrates positioned to create electrical bonds between areas on the first substrate and corresponding areas on the second substrate, and bonds the faces by molecular bonding.
摘要翻译：一种组装方法，用于实现位于第一基板的表面上的区域和位于第二基板的表面上的对应区域之间的局部电粘合，所述表面彼此面对，所述基板中的至少一个具有表面形貌。该方法形成中间层，其包括在基底的表面上的至少一个埋置层或具有表面形貌的基底，以使其（它们）与基底的表面的分子结合相互匹配，从地形的角度来看，电阻率和/或中间层的厚度被选择以实现局部电接合，使两个面接触，所述基板被定位成在第一基板上的区域和第二基板上的对应区域之间产生电粘合，并且通过分子键合。

45. 发明申请

US20100200770A1 Solid Immersion Lens and Related Method for Making Same 失效
标题翻译：固体浸没透镜及其相关方法
公开(公告)号：US20100200770A1
公开(公告)日：2010-08-12
申请号：US12678730
申请日：2008-09-16
申请人： Mickaël Brun , Salim Mimouni , Sergio Nicoletti , Ludovic Poupinet , Hubert Moriceau
发明人： Mickaël Brun , Salim Mimouni , Sergio Nicoletti , Ludovic Poupinet , Hubert Moriceau
IPC分类号： G21K1/06 , G02B3/00 , G02B27/12 , C03C15/00
CPC分类号： G01Q60/22 , B29D11/00009 , B29D11/00346 , G01Q70/12 , G11B7/1374 , G11B7/1387
摘要： The invention generally pertains to the field of solid immersion lenses for optical applications in high resolution microscopy. The lens of the invention includes a spherical sector limited by a planar surface and an object having nanometric dimensions arranged on the planar surface at the focus of said solid immersion lens. A light-opaque layer having a central opening with nanometric dimensions can be provided on the planar surface, said opening being centred on the focus of the solid immersion lens. The nano-object can be a tube or a thread having a cylindrical shape. The lens of the invention can be made using lithography techniques.
摘要翻译：本发明一般涉及在高分辨率显微镜中用于光学应用的固体浸没透镜领域。本发明的透镜包括由平面表面限制的球形部分和在所述固体浸没透镜的焦点处的平面表面上具有纳米尺寸的物体。具有纳米尺寸的中心开口的不透光层可以设置在平坦表面上，所述开口以固体浸没透镜的焦点为中心。纳米物体可以是具有圆柱形状的管或线。本发明的透镜可以使用光刻技术制成。

46. 发明申请

US20100167499A1 METHOD FOR MAKING A STRESSED STRUCTURE DESIGNED TO BE DISSOCIATED 有权
标题翻译：制造受到破坏的结构的方法
公开(公告)号：US20100167499A1
公开(公告)日：2010-07-01
申请号：US12628772
申请日：2009-12-01
申请人： Franck Fournel , Hubert Moriceau , Christelle Lagahe
发明人： Franck Fournel , Hubert Moriceau , Christelle Lagahe
IPC分类号： H01L21/762
CPC分类号： H01L21/67092 , H01L21/304 , H01L21/76254
摘要： A method of making a complex microelectronic structure by assembling two substrates through two respective linking surfaces, the structure being designed to be dissociated at a separation zone. Prior to assembly, in producing a state difference in the tangential stresses between the two surfaces to be assembled, the state difference is selected so as to produce in the assembled structure a predetermined stress state at the time of dissociation.
摘要翻译：通过两个相应的连接表面组装两个基底来制造复杂的微电子结构的方法，该结构设计成在分离区离解。在组装之前，为了产生要组装的两个表面之间的切向应力的状态差，选择状态差以便在组装结构中产生解离时的预定应力状态。

47. 发明授权

US07586154B2 Method for fabricating a substrate with useful layer on high resistivity support 有权
标题翻译：在高电阻率支撑件上制造具有有用层的衬底的方法
公开(公告)号：US07586154B2
公开(公告)日：2009-09-08
申请号：US11831217
申请日：2007-07-31
申请人： Bruno Ghyselen , Hubert Moriceau
发明人： Bruno Ghyselen , Hubert Moriceau
IPC分类号： H01L21/30
CPC分类号： H01L21/3225 , H01L21/3226 , H01L21/76254 , H01L29/32
摘要： A substrate suitable for producing a high frequency electronic circuit. This substrate includes a support substrate having a controlled amount of interstitial oxygen and which is treated to precipitate at least some of the oxygen therein; and a useful layer supported by the support substrate. Advantageously, the support substrate has high resistivity and includes oxygen precipitates beneath the useful layer while also being free of depleted zones of oxygen precipitates adjacent the useful layer. This is prepared by the methods disclosed herein which are applicable in particular to SOI substrates.
摘要翻译：适用于生产高频电子电路的衬底。该衬底包括具有受控量的间隙氧的支撑衬底，并被处理以沉淀其中的至少一部分氧; 以及由支撑基板支撑的有用层。有利地，支撑衬底具有高电阻率并且在有用层下方包括氧沉淀物，同时也没有与有用层相邻的氧沉淀物的耗尽区域。这通过本文所公开的方法制备，其特别适用于SOI衬底。

48. 发明申请

US20090162991A1 PROCESS FOR ASSEMBLING SUBSTRATES WITH LOW-TEMPERATURE HEAT TREATMENTS 审中-公开
标题翻译：用低温热处理装配基板的方法
公开(公告)号：US20090162991A1
公开(公告)日：2009-06-25
申请号：US12296250
申请日：2007-04-06
申请人： Rémi Beneyton , Hubert Moriceau , Frank Fournel , Francois Rieutord , Yannick Le Tiec
发明人： Rémi Beneyton , Hubert Moriceau , Frank Fournel , Francois Rieutord , Yannick Le Tiec
IPC分类号： H01L21/30 , B32B37/06 , B32B38/10
CPC分类号： C09J5/06
摘要： The invention relates to a process for producing a bond between a first and a second substrate (2, 4), comprising: a) a step of preparing surfaces (6, 8) to be assembled, b) an assembly of these two surfaces, by direct molecular bonding, c) a heat treatment step involving at least maintaining the temperature within the range of 50° C. to 100° C. for at least one hour.
摘要翻译：本发明涉及一种用于在第一和第二基底（2,4）之间产生粘结的方法，包括：a）制备待组装的表面（6,8）的步骤，b）这两个表面的组装，通过直接分子键合，c）热处理步骤，其至少将温度保持在50℃至100℃的范围内至少1小时。

49. 发明授权

US07550052B2 Method of producing a complex structure by assembling stressed structures 有权
标题翻译：通过组装应力结构生产复杂结构的方法
公开(公告)号：US07550052B2
公开(公告)日：2009-06-23
申请号：US10537679
申请日：2003-12-04
申请人： Franck Fournel , Hubert Moriceau , Phillippe Montmayeul
发明人： Franck Fournel , Hubert Moriceau , Phillippe Montmayeul
IPC分类号： B32B37/00
CPC分类号： H01L21/6835 , H01L21/187 , H01L21/2007 , H01L21/67092 , H01L21/76251 , H01L24/75 , H01L2221/68363 , H01L2924/01029 , H01L2924/10253 , H01L2924/3511 , Y10S148/012 , Y10S148/135 , Y10S148/159 , H01L2924/00
摘要： The invention relates to a method of producing a complex microelectronic structure, in which two basic microelectronic structures are assembled at the two respective connecting faces thereof. The invention is characterized in that, before assembly, a difference is created in the tangential stress state between the two faces to be assembled, said difference being selected such as to produce a pre-determined stress state within the assembled structure under given conditions in relations to the assembly conditions.
摘要翻译：本发明涉及一种复合微电子结构的制造方法，其中两个基本的微电子结构组装在其两个相应的连接面上。本发明的特征在于，在组装之前，在要组装的两个面之间的切向应力状态产生差异，所述差异被选择为在关系中的给定条件下在组装结构内产生预定的应力状态到装配条件。

50. 发明申请

US20070228378A1 METHOD FOR PRODUCING ORDERED NANOSTRUCTURES 失效
标题翻译：生产订购的纳米结构的方法
公开(公告)号：US20070228378A1
公开(公告)日：2007-10-04
申请号：US11612829
申请日：2006-12-19
申请人： Franck FOURNEL , Hubert Moriceau , Chrystel Deguet
发明人： Franck FOURNEL , Hubert Moriceau , Chrystel Deguet
IPC分类号： H01L29/04 , H01L29/15 , H01L31/036
CPC分类号： H01L21/2007 , B81C1/00031 , H01L21/76254
摘要： Method for producing nanostructures comprising: a step of providing a substrate (100) having a buried barrier layer (2) and above said barrier layer (2) a crystalline film (5) provided with a network of crystalline defects and/or stress fields (12) in a crystalline zone (13), one or several steps of attacking the substrate (100), of which a preferential attack either of the crystalline defects and/or the stress fields, or the crystalline zone (13) between the crystalline defects and/or the stress fields, said attack steps enabling the barrier layer (2) to be laid bared locally and protrusions (7) to be formed on a nanometric scale, separated from each other by hollows (7.1) having a base located in the barrier layer, the protrusions leading to nanostructures (7, 8).
摘要翻译：一种生产纳米结构的方法，包括：提供具有掩埋阻挡层（2）和所述阻挡层（2）上方的衬底（100）的步骤，所述结晶膜（5）具有晶体缺陷和/或应力场网络 12）在结晶区域（13）中，攻击衬底（100）的一个或几个步骤，其中晶体缺陷和/或应力场的优先攻击或晶体缺陷之间的结晶区域（13）和/或应力场，所述攻击步骤使得阻挡层（2）能够局部放置并且以纳米尺度形成突起（7），所述突起（7）通过具有位于阻挡层，导致纳米结构的突起（7,8）。

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