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41. 发明申请

US20100187654A1 Semiconductor device having capacitor and method of fabricating the same 失效
标题翻译：具有电容器的半导体器件及其制造方法
公开(公告)号：US20100187654A1
公开(公告)日：2010-07-29
申请号：US12659724
申请日：2010-03-18
申请人： Jung-Min Oh , Jeong-Nam Han , Chang-Ki Hong , Woo-Gwan Shim , Im-Soo Park
发明人： Jung-Min Oh , Jeong-Nam Han , Chang-Ki Hong , Woo-Gwan Shim , Im-Soo Park
IPC分类号： H01L29/92
CPC分类号： H01L28/91 , H01L21/31116 , H01L27/10817 , H01L27/10852
摘要： A semiconductor device having a capacitor and a method of fabricating the same may be provided. A method of fabricating a semiconductor device may include forming an etch stop layer and a mold layer sequentially on a substrate, patterning the mold layer to form a mold electrode hole exposing a portion of the etch stop layer, etching selectively the exposed etch stop layer by an isotropic dry etching process to form a contact electrode hole through the etch stop layer to expose a portion of the substrate, forming a conductive layer on the substrate and removing the conductive layer on the mold layer on the mold layer to form a cylindrical bottom electrode in the mold and contact electrode holes. The isotropic dry etching process may utilize a process gas including main etching gas and selectivity adjusting gas. The selectivity adjusting gas may increase an etch rate of the etch stop layer by more than an etch rate of the mold layer by the isotropic wet etching process.
摘要翻译：可以提供具有电容器的半导体器件及其制造方法。制造半导体器件的方法可以包括在衬底上顺序地形成蚀刻停止层和模制层，图案化模具层以形成露出蚀刻停止层的一部分的模具电极孔，通过以下步骤选择性地蚀刻暴露的蚀刻停止层：各向同性干蚀刻工艺，以形成通过蚀刻停止层的接触电极孔，以露出衬底的一部分，在衬底上形成导电层，并去除模层上的模层上的导电层，形成圆柱形底电极在模具和接触电极孔中。各向同性干蚀刻工艺可以利用包括主蚀刻气体和选择性调节气体的工艺气体。选择性调节气体可以通过各向同性湿蚀刻工艺增加蚀刻停止层的蚀刻速率超过模具层的蚀刻速率。

42. 发明授权

US07745338B2 Method of forming fine pitch hardmask patterns and method of forming fine patterns of semiconductor device using the same 有权
标题翻译：形成细间距硬掩模图案的方法和使用其形成精细图案的半导体器件的方法
公开(公告)号：US07745338B2
公开(公告)日：2010-06-29
申请号：US11738155
申请日：2007-04-20
申请人： Ji-hoon Cha , Chang-ki Hong , Kun-tack Lee , Woo-gwan Shim , Chang-sup Mun , Ho-wook Choi
发明人： Ji-hoon Cha , Chang-ki Hong , Kun-tack Lee , Woo-gwan Shim , Chang-sup Mun , Ho-wook Choi
IPC分类号： H01L21/311 , H01L21/76 , H01L21/4763
CPC分类号： H01L21/3086 , H01L21/0337 , H01L21/0338 , H01L21/3088 , H01L21/32139
摘要： A method of forming fine pitch hardmask patterns includes forming a hardmask layer on a substrate and forming a plurality of first mask patterns on the hardmask layer. A buffer layer is formed on the plurality of first mask patterns, and has an upper surface defining recesses between adjacent first mask patterns. Second mask patterns are formed within the recesses formed in the upper surface of the buffer layer. The buffer layer is partially removed to expose upper surfaces of the plurality of first mask patterns, and the buffer layer is then partially removed using the first mask patterns and the second mask patterns as an etch mask to expose the hardmask layer between the first mask pattern and the second mask pattern. Using the first mask patterns and the second mask patterns as an etch mask, the hardmask layer is etched to form hardmask patterns.
摘要翻译：形成细间距硬掩模图案的方法包括在基底上形成硬掩模层并在硬掩模层上形成多个第一掩模图案。缓冲层形成在多个第一掩模图案上，并且具有在相邻的第一掩模图案之间限定凹部的上表面。在形成在缓冲层的上表面中的凹部内形成第二掩模图案。部分地去除缓冲层以暴露多个第一掩模图案的上表面，然后使用第一掩模图案和第二掩模图案作为蚀刻掩模来部分地去除缓冲层，以在第一掩模图案之间暴露硬掩模层和第二掩模图案。使用第一掩模图案和第二掩模图案作为蚀刻掩模，硬掩模层被蚀刻以形成硬掩模图案。

43. 发明申请

US20090137126A1 METHOD OF FORMING A SPACER 有权
标题翻译：形成间隔物的方法
公开(公告)号：US20090137126A1
公开(公告)日：2009-05-28
申请号：US12277332
申请日：2008-11-25
申请人： Yu-Kyung Kim , Kun-Tack Lee , Woo-Gwan Shim , Chang-Ki Hong
发明人： Yu-Kyung Kim , Kun-Tack Lee , Woo-Gwan Shim , Chang-Ki Hong
IPC分类号： H01L21/311
CPC分类号： H01L21/31144 , H01L21/30617 , H01L21/31111 , H01L21/76802 , H01L21/76831 , H01L21/76897 , H01L29/6653
摘要： A sacrificial layer and wet etch are used to form a sidewall spacer so as to prevent damage to the structure on which the spacer is formed and to the underlying substrate as well. Once the structure is formed on the substrate a spacer formation layer is formed to cover the structure, and a sacrificial layer is formed on the spacer formation layer. The sacrificial layer is wet etched to form a sacrificial layer pattern on that portion of the spacer formation layer extending along a sidewall of the structure. The spacer is formed on the sidewall of the structure by wet etching the spacer formation layer using the sacrificial layer pattern as a mask.
摘要翻译：使用牺牲层和湿蚀刻来形成侧壁间隔物，以便防止对形成间隔物的结构和下面的衬底造成损坏。一旦在衬底上形成结构，形成间隔物形成层以覆盖该结构，并且在间隔物形成层上形成牺牲层。对牺牲层进行湿蚀刻以在沿着结构的侧壁延伸的间隔物形成层的该部分上形成牺牲层图案。通过使用牺牲层图案作为掩模湿蚀刻间隔物形成层，在该结构的侧壁上形成间隔物。

44. 发明授权

US07435644B2 Method of manufacturing capacitor of semiconductor device 有权
标题翻译：制造半导体器件电容器的方法
公开(公告)号：US07435644B2
公开(公告)日：2008-10-14
申请号：US11329577
申请日：2006-01-11
申请人： Woo-Gwan Shim , Jung-Min Oh , Chang-Ki Hong , Sang-Jun Choi , Sang-Yong Kim
发明人： Woo-Gwan Shim , Jung-Min Oh , Chang-Ki Hong , Sang-Jun Choi , Sang-Yong Kim
IPC分类号： H01L21/8242
CPC分类号： H01L28/91 , H01L27/10852
摘要： Provided is a method of manufacturing a capacitor of a semiconductor device, which can prevent tilting or an electrical short of a lower electrode. In the method, a mesh-type bridge insulating layer is formed above the contact plug on a mold oxide layer. The mold oxide layer and the bridge insulating layer are etched to define an electrode region. The mold oxide layer is removed using an etching gas having an etch selectivity of 500 or greater for the mold oxide layer with respect to the bridge insulating layer.
摘要翻译：提供一种制造半导体器件的电容器的方法，其可以防止下电极的倾斜或电短路。在该方法中，在模具氧化物层上的接触插塞上方形成网状桥接绝缘层。蚀刻模具氧化物层和桥接绝缘层以限定电极区域。使用相对于桥接绝缘层的模具氧化物层的蚀刻选择性为500以上的蚀刻气体去除模具氧化物层。

45. 发明申请

US20080194110A1 METHODS OF FABRICATING A SEMICONDUCTOR DEVICE USING A DILUTE AQUEOUS SOLUTION OF AN AMMONIA AND PEROXIDE MIXTURE 失效
标题翻译：使用氨水和过氧化物混合物的稀释水溶液制备半导体器件的方法
公开(公告)号：US20080194110A1
公开(公告)日：2008-08-14
申请号：US12032048
申请日：2008-02-15
申请人： Doo-Won Kwon , Hyung-Ho Ko , Chang-Sup Mun , Woo-Gwan Shim , Im-Soo Park , Yu-Kyung Kim , Jeong-Nam Han
发明人： Doo-Won Kwon , Hyung-Ho Ko , Chang-Sup Mun , Woo-Gwan Shim , Im-Soo Park , Yu-Kyung Kim , Jeong-Nam Han
IPC分类号： H01L21/302
CPC分类号： H01L21/02052
摘要： This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.
摘要翻译：本发明提供制造半导体器件的方法，其中在半导体衬底上形成合金层以形成衬底结构，该方法包括使用稀氨水溶液和过氧化物混合物（APM）进行清洗和/或湿蚀刻处理步骤在衬底结构上。

46. 发明授权

US07354868B2 Methods of fabricating a semiconductor device using a dilute aqueous solution of an ammonia and peroxide mixture 失效
标题翻译：使用氨和过氧化物混合物的稀水溶液制造半导体器件的方法
公开(公告)号：US07354868B2
公开(公告)日：2008-04-08
申请号：US11089208
申请日：2005-03-24
申请人： Doo-Won Kwon , Hyung-Ho Ko , Chang-Sup Mun , Woo-Gwan Shim , Im-Soo Park , Yu-Kyung Kim , Jeong-Nam Han
发明人： Doo-Won Kwon , Hyung-Ho Ko , Chang-Sup Mun , Woo-Gwan Shim , Im-Soo Park , Yu-Kyung Kim , Jeong-Nam Han
IPC分类号： H01L21/461 , H01L21/302
CPC分类号： H01L21/02052
摘要： This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.
摘要翻译：本发明提供制造半导体器件的方法，其中在半导体衬底上形成合金层以形成衬底结构，该方法包括使用稀氨水溶液和过氧化物混合物（APM）进行清洗和/或湿蚀刻处理步骤在衬底结构上。

47. 发明申请

US20080047576A1 SINGLE-SUBSTRATE TYPE APPARATUS FOR PROCESSING A SUBSTRATE 审中-公开
标题翻译：用于处理基板的单基板类型设备
公开(公告)号：US20080047576A1
公开(公告)日：2008-02-28
申请号：US11844241
申请日：2007-08-23
申请人： Young-Ok KIM , Chang-Ki HONG , Kun-Tack LEE , In-Gi KIM , Woo-Gwan SHIM , Jeong-Nam HAN , Kang-Youn LEE
发明人： Young-Ok KIM , Chang-Ki HONG , Kun-Tack LEE , In-Gi KIM , Woo-Gwan SHIM , Jeong-Nam HAN , Kang-Youn LEE
IPC分类号： B08B3/12 , B08B3/10
CPC分类号： H01L21/67057 , H01L21/67034
摘要： In a single-substrate type apparatus for processing a substrate, the apparatus includes a chamber, a bottom panel, a solution supplying part and a substrate holder. The chamber has an upper portion and a lower portion. The bottom panel is detachably connected to the lower portion. The solution supplying part is connected to the bottom panel to supply a processing solution to the substrate in the chamber. The substrate holder provides the substrate into the chamber, the substrate holder holding both side portions of the substrate such that the substrate is vertically arranged.
摘要翻译：在用于处理基板的单基板型装置中，该装置包括室，底板，溶液供应部和基板保持件。腔室具有上部和下部。底板可拆卸地连接到下部。溶液供应部分连接到底板，以将处理溶液供应到室中的基板。衬底保持器将衬底提供到腔室中，衬底保持器保持衬底的两侧部分，使得衬底垂直布置。

48. 发明授权

US07122478B2 Method of manufacturing a semiconductor device using a polysilicon etching mask 失效
标题翻译：使用多晶硅蚀刻掩模制造半导体器件的方法
公开(公告)号：US07122478B2
公开(公告)日：2006-10-17
申请号：US10818266
申请日：2004-04-02
申请人： Jeong-Nam Han , Woo-Gwan Shim , Woo-Sung Han , Chang-Ki Hong , Sang Jun Choi
发明人： Jeong-Nam Han , Woo-Gwan Shim , Woo-Sung Han , Chang-Ki Hong , Sang Jun Choi
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/76897 , H01L21/31144 , H01L21/32134 , H01L21/32137 , H01L21/76802 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device using a polysilicon layer as an etching mask includes: (a) forming an interlayer dielectric over a semiconductor substrate; (b) forming a polysilicon layer pattern over the interlayer dielectric; (c) forming a contact hole in the interlayer dielectric by etching the interlayer dielectric using the polysilicon layer pattern as an etching mask; (d) removing the polysilicon layer pattern by an etching process that has a large etching selectivity of the polisilicon layer with respect to the interlayer dielectric and about 3% or less etching uniformity; and (e) forming a contact by filling the contact hole with a conductive material.
摘要翻译：使用多晶硅层作为蚀刻掩模制造半导体器件的方法包括：（a）在半导体衬底上形成层间电介质; （b）在层间电介质上形成多晶硅层图案; （c）通过使用多晶硅层图案作为蚀刻掩模蚀刻层间电介质，在层间电介质中形成接触孔; （d）通过蚀刻工艺去除多晶硅层图案，所述蚀刻工艺对于硅酸盐层相对于层间电介质具有大的蚀刻选择性，蚀刻均匀性为约3％以下; 和（e）通过用导电材料填充接触孔来形成接触。

49. 发明申请

US20060189148A1 Transistor having a metal nitride layer pattern, etchant and methods of forming the same 有权
标题翻译：具有金属氮化物层图案的晶体管，蚀刻剂及其形成方法
公开(公告)号：US20060189148A1
公开(公告)日：2006-08-24
申请号：US11358082
申请日：2006-02-22
申请人： Sang-Yong Kim , Ji-Hoon Cha , Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi
发明人： Sang-Yong Kim , Ji-Hoon Cha , Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi
IPC分类号： H01L21/302 , C09K13/00 , H01L29/94
CPC分类号： H01L21/32134 , C09K13/02 , H01L21/28088 , H01L29/4966 , H01L29/517 , H01L29/6659 , H01L29/7833
摘要： A transistor having a metal nitride layer pattern, etchant and methods of forming the same is provided. A gate insulating layer and/or a metal nitride layer may be formed on a semiconductor substrate. A mask layer may be formed on the metal nitride layer. Using the mask layer as an etching mask, an etching process may be performed on the metal nitride layer, forming the metal nitride layer pattern. An etchant, which may have an oxidizing agent, a chelate agent and/or a pH adjusting mixture, may perform the etching. The methods may reduce etching damage to a gate insulating layer under the metal nitride layer pattern during the formation of a transistor.
摘要翻译：提供具有金属氮化物层图案的晶体管，蚀刻剂及其形成方法。可以在半导体衬底上形成栅极绝缘层和/或金属氮化物层。掩模层可以形成在金属氮化物层上。使用掩模层作为蚀刻掩模，可以对金属氮化物层进行蚀刻处理，形成金属氮化物层图案。可以具有氧化剂，螯合剂和/或pH调节混合物的蚀刻剂可以进行蚀刻。在形成晶体管期间，这些方法可以减少金属氮化物层图案下的栅极绝缘层的蚀刻损伤。

50. 发明申请

US20060183297A1 Etching solution for removal of oxide film, method for preparing the same, and method of fabricating semiconductor device 审中-公开
标题翻译：用于去除氧化膜的蚀刻溶液，其制备方法以及制造半导体器件的方法
公开(公告)号：US20060183297A1
公开(公告)日：2006-08-17
申请号：US11130030
申请日：2005-05-16
申请人： Chang-Sup Mun , Hyung-Ho Ko , Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi
发明人： Chang-Sup Mun , Hyung-Ho Ko , Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi
IPC分类号： H01L21/30 , H01L21/302 , H01L21/46
CPC分类号： H01L21/31111 , H01L21/76224 , H01L28/40
摘要： Provided are an anionic surfactant-containing etching solution for removal of an oxide film, preparation methods thereof, and methods of fabricating a semiconductor device using the etching solution. The etching solution includes a hydrofluoric acid (HF), deionized water, and an anionic surfactant. The anionic surfactant is a compound in which an anime salt is added as a counter ion, as represented by R1—OSO3−HA+, R1—CO2−HA+, R1—PO42−(HA+)2, (R1)2—PO4−HA+, or R1—SO3−HA+ where R1 is a straight or branched hydrocarbon group of C4 to C22 and A is ammonia or amine. The etching solution provides a high etching selectivity ratio of an oxide film to a nitride film or a polysilicon film. Therefore, in a semiconductor device fabrication process such as a STI device isolation process or a capacitor formation process, when an oxide film is exposed together with a nitride film or a polysilicon film, the etching solution can be efficiently used in selectively removing only the oxide film.
摘要翻译：提供了一种用于去除氧化膜的含阴离子表面活性剂的蚀刻溶液，其制备方法以及使用该蚀刻溶液制造半导体器件的方法。蚀刻溶液包括氢氟酸（HF），去离子水和阴离子表面活性剂。阴离子表面活性剂是其中加入作为抗衡离子的动物盐的化合物，如R 1〜N 3 O 3 - R 1，R 2，R 1，R 1，...，R 1，（R 1）2 - - - - - （4）其中R 1，R 2， / SUB>）2 + 或其中R 1是C 4的直链或支链烃基，其中R 1是直链或支链C 1 -C 4烷基， C 22和A是氨或胺。蚀刻溶液提供氧化膜与氮化物膜或多晶硅膜的高蚀刻选择性比。因此，在诸如STI器件隔离处理或电容器形成工艺的半导体器件制造工艺中，当氧化物膜与氮化物膜或多晶硅膜一起暴露时，可以有效地使用蚀刻溶液来仅选择性地除去氧化物电影。

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