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    • 10. 发明授权
    • Method of manufacturing semiconductor device having storage electrode of capacitor
    • 制造具有电容器的存储电极的半导体器件的方法
    • US06844229B2
    • 2005-01-18
    • US09999150
    • 2001-10-31
    • Moon-hee LeeWoo-gwan ShimHyung-ho KoJong-ho Chung
    • Moon-hee LeeWoo-gwan ShimHyung-ho KoJong-ho Chung
    • H01L27/108H01L21/02H01L21/8242
    • H01L28/91H01L27/10855
    • A method of manufacturing a semiconductor device having a storage electrode of a capacitor is provided. The method includes the steps of: forming a contact hole perforating through an interlayer dielectric layer on a semiconductor substrate; forming a conductive plug to fill the contact hole and expose the surface of the interlayer dielectric layer; forming molds on the interlayer dielectric layer to expose the surface of the conductive plug; recessing the upper surface of the conductive plug to expose a portion of the sidewalls of the interlayer dielectric layer; forming an electrode layer to cover the recessed conductive plug, and the sidewalls of the interlayer dielectric layer and the molds; and removing upper surfaces of the electrode layer to make a storage electrode until molds are exposed. The method further includes the steps of: forming a conductive pad electrically connected to the semiconductor substrate and a lower insulating layer surrounding the conductive pad; and forming bit line stacks on the lower insulating layer, wherein the interlayer dielectric layer covers the bit line stacks, and the contact hole between the bit line stacks exposes the conductive pad.
    • 提供一种制造具有电容器的存储电极的半导体器件的方法。 该方法包括以下步骤:形成穿过半导体衬底上的层间电介质层的接触孔; 形成导电插塞以填充接触孔并暴露层间电介质层的表面; 在所述层间电介质层上形成模具以暴露所述导电插塞的表面; 使导电插塞的上表面凹陷以暴露层间电介质层的侧壁的一部分; 形成电极层以覆盖凹入的导电插塞,以及层间绝缘层的侧壁和模具; 并且除去电极层的上表面以形成存储电极,直到模具露出。 该方法还包括以下步骤:形成电连接到半导体衬底的导电焊盘和围绕导电焊盘的下绝缘层; 以及在所述下绝缘层上形成位线堆叠,其中所述层间电介质层覆盖所述位线堆叠,并且所述位线堆叠之间的所述接触孔暴露所述导电焊盘。