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1. 发明申请

US20050026420A1 Method of manufacturing a semiconductor device using a polysilicon etching mask 失效
标题翻译：使用多晶硅蚀刻掩模制造半导体器件的方法
公开(公告)号：US20050026420A1
公开(公告)日：2005-02-03
申请号：US10818266
申请日：2004-04-02
申请人： Jeong-Nam Han , Woo-Gwan Shim , Woo-Sung Han , Chang-Ki Hong , Sang-Jun Choi
发明人： Jeong-Nam Han , Woo-Gwan Shim , Woo-Sung Han , Chang-Ki Hong , Sang-Jun Choi
IPC分类号： H01L21/28 , H01L21/311 , H01L21/3213 , H01L21/60 , H01L21/768 , H01L23/485 , H01L21/44 , H01L21/50 , H01L21/8222
CPC分类号： H01L21/76897 , H01L21/31144 , H01L21/32134 , H01L21/32137 , H01L21/76802 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device using a polysilicon layer as an etching mask includes: (a) forming an interlayer dielectric over a semiconductor substrate; (b) forming a polysilicon layer pattern over the interlayer dielectric; (c) forming a contact hole in the interlayer dielectric by etching the interlayer dielectric using the polysilicon layer pattern as an etching mask; (d) removing the polysilicon layer pattern by an etching process that has a large etching selectivity of the polisilicon layer with respect to the interlayer dielectric and about 3% or less etching uniformity; and (e) forming a contact by filling the contact hole with a conductive material.
摘要翻译：使用多晶硅层作为蚀刻掩模制造半导体器件的方法包括：（a）在半导体衬底上形成层间电介质; （b）在层间电介质上形成多晶硅层图案; （c）通过使用多晶硅层图案作为蚀刻掩模蚀刻层间电介质，在层间电介质中形成接触孔; （d）通过蚀刻工艺去除多晶硅层图案，所述蚀刻工艺对于硅酸盐层相对于层间电介质具有大的蚀刻选择性，蚀刻均匀性为约3％以下; 和（e）通过用导电材料填充接触孔来形成接触。

2. 发明授权

US07122478B2 Method of manufacturing a semiconductor device using a polysilicon etching mask 失效
标题翻译：使用多晶硅蚀刻掩模制造半导体器件的方法
公开(公告)号：US07122478B2
公开(公告)日：2006-10-17
申请号：US10818266
申请日：2004-04-02
申请人： Jeong-Nam Han , Woo-Gwan Shim , Woo-Sung Han , Chang-Ki Hong , Sang Jun Choi
发明人： Jeong-Nam Han , Woo-Gwan Shim , Woo-Sung Han , Chang-Ki Hong , Sang Jun Choi
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/76897 , H01L21/31144 , H01L21/32134 , H01L21/32137 , H01L21/76802 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device using a polysilicon layer as an etching mask includes: (a) forming an interlayer dielectric over a semiconductor substrate; (b) forming a polysilicon layer pattern over the interlayer dielectric; (c) forming a contact hole in the interlayer dielectric by etching the interlayer dielectric using the polysilicon layer pattern as an etching mask; (d) removing the polysilicon layer pattern by an etching process that has a large etching selectivity of the polisilicon layer with respect to the interlayer dielectric and about 3% or less etching uniformity; and (e) forming a contact by filling the contact hole with a conductive material.
摘要翻译：使用多晶硅层作为蚀刻掩模制造半导体器件的方法包括：（a）在半导体衬底上形成层间电介质; （b）在层间电介质上形成多晶硅层图案; （c）通过使用多晶硅层图案作为蚀刻掩模蚀刻层间电介质，在层间电介质中形成接触孔; （d）通过蚀刻工艺去除多晶硅层图案，所述蚀刻工艺对于硅酸盐层相对于层间电介质具有大的蚀刻选择性，蚀刻均匀性为约3％以下; 和（e）通过用导电材料填充接触孔来形成接触。

3. 发明授权

US07544985B2 Semiconductor capacitor structure and method for manufacturing the same 有权
标题翻译：半导体电容器结构及其制造方法
公开(公告)号：US07544985B2
公开(公告)日：2009-06-09
申请号：US11312952
申请日：2005-12-19
申请人： Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi , Jeong-Nam Han
发明人： Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi , Jeong-Nam Han
IPC分类号： H01L27/108
CPC分类号： H01L27/10852 , H01L27/10817 , H01L28/91
摘要： In one embodiment, a semiconductor device comprises a base and a tapered wall formed on the base. The wall has a midline and also has an inner sidewall and an outer sidewall. The inner sidewall and the outer sidewall are substantially symmetrical with each other in relation to the midline. Thus, the reliability of the semiconductor capacitor structure can be improved and the throughput can be increased. Also, further scaling down of semiconductor devices can be facilitated with the principles of the present invention.
摘要翻译：在一个实施例中，半导体器件包括形成在基底上的基部和锥形壁。壁具有中线并且还具有内侧壁和外侧壁。内侧壁和外侧壁相对于中线彼此基本对称。因此，可以提高半导体电容器结构的可靠性，并且可以提高吞吐量。此外，根据本发明的原理，可以促进半导体器件的进一步缩小。

4. 发明申请

US20050037562A1 Semiconductor capacitor structure and method for manufacturing the same 有权
标题翻译：半导体电容器结构及其制造方法
公开(公告)号：US20050037562A1
公开(公告)日：2005-02-17
申请号：US10835142
申请日：2004-04-28
申请人： Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi , Jeong-Nam Han
发明人： Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi , Jeong-Nam Han
IPC分类号： H01L27/108 , H01L21/02 , H01L21/8242 , H01L21/8234 , H01L21/8244
CPC分类号： H01L28/91 , H01L27/10852 , Y10S438/978
摘要： In one embodiment, a semiconductor device comprises a base and a tapered wall formed on the base. The wall has a midline and also has an inner sidewall and an outer sidewall. The inner sidewall and the outer sidewall are substantially symmetrical with each other in relation to the midline. Thus, the reliability of the semiconductor capacitor structure can be improved and the throughput can be increased. Also, further scaling down of semiconductor devices can be facilitated with the principles of the present invention.
摘要翻译：在一个实施例中，半导体器件包括形成在基底上的基部和锥形壁。壁具有中线并且还具有内侧壁和外侧壁。内侧壁和外侧壁相对于中线彼此基本对称。因此，可以提高半导体电容器结构的可靠性，并且可以提高吞吐量。此外，根据本发明的原理，可以促进半导体器件的进一步缩小。

5. 发明申请

US20060097410A1 Semiconductor capacitor structure and method for manufacturing the same 有权
公开(公告)号：US20060097410A1
公开(公告)日：2006-05-11
申请号：US11312952
申请日：2005-12-19
申请人： Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi , Jeong-Nam Han
发明人： Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi , Jeong-Nam Han
IPC分类号： H01L23/58
CPC分类号： H01L27/10852 , H01L27/10817 , H01L28/91
摘要： In one embodiment, a semiconductor device comprises a base and a tapered wall formed on the base. The wall has a midline and also has an inner sidewall and an outer sidewall. The inner sidewall and the outer sidewall are substantially symmetrical with each other in relation to the midline. Thus, the reliability of the semiconductor capacitor structure can be improved and the throughput can be increased. Also, further scaling down of semiconductor devices can be facilitated with the principles of the present invention.

6. 发明授权

US07018892B2 Semiconductor capacitor structure and method for manufacturing the same 有权
公开(公告)号：US07018892B2
公开(公告)日：2006-03-28
申请号：US10835142
申请日：2004-04-28
申请人： Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi , Jeong-Nam Han
发明人： Woo-Gwan Shim , Chang-Ki Hong , Sang-Jun Choi , Jeong-Nam Han
IPC分类号： H01L21/8242
CPC分类号： H01L28/91 , H01L27/10852 , Y10S438/978
摘要： In one embodiment, a semiconductor device comprises a base and a tapered wall formed on the base. The wall has a midline and also has an inner sidewall and an outer sidewall. The inner sidewall and the outer sidewall are substantially symmetrical with each other in relation to the midline. Thus, the reliability of the semiconductor capacitor structure can be improved and the throughput can be increased. Also, further scaling down of semiconductor devices can be facilitated with the principles of the present invention.

7. 发明授权

US08585917B2 Etching, cleaning and drying methods using supercritical fluid and chamber systems using these methods 有权
标题翻译：使用这些方法使用超临界流体和室系统的蚀刻，清洁和干燥方法
公开(公告)号：US08585917B2
公开(公告)日：2013-11-19
申请号：US13326965
申请日：2011-12-15
申请人： Hyo-san Lee , Chang-Ki Hong , Kun-Tack Lee , Woo-Gwan Shim , Jeong-Nam Han , Jung-Min Oh , Kwon-Taek Lim , Ha-Soo Hwang , Haldorai Yuvaraj , Jae-Mok Jung
发明人： Hyo-san Lee , Chang-Ki Hong , Kun-Tack Lee , Woo-Gwan Shim , Jeong-Nam Han , Jung-Min Oh , Kwon-Taek Lim , Ha-Soo Hwang , Haldorai Yuvaraj , Jae-Mok Jung
IPC分类号： C03C15/00
CPC分类号： H01L21/02101 , H01L21/31111 , H01L21/67051 , H01L21/6708 , H01L27/10852 , Y10S134/902
摘要： Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.
摘要翻译：本文提供了使用超临界流体的蚀刻，清洁和干燥方法以及用于进行该临界流体的室系统。蚀刻方法包括使用其中溶解蚀刻剂的超临界二氧化碳蚀刻材料层，以及使用超临界二氧化碳除去由材料层和蚀刻化学品之间的反应产生的蚀刻副产物，其中清洁化学品溶解还提供了制造半导体器件的方法。

8. 发明申请

US20120080059A1 ETCHING, CLEANING AND DRYING METHODS USING SUPERCRITICAL FLUID AND CHAMBER SYSTEMS USING THESE METHODS 有权
标题翻译：使用这些方法的超临界流体和室系统的蚀刻，清洁和干燥方法
公开(公告)号：US20120080059A1
公开(公告)日：2012-04-05
申请号：US13326965
申请日：2011-12-15
申请人： Hyo-san Lee , Chang-Ki Hong , Kun-Tack Lee , Woo-Gwan Shim , Jeong-Nam Han , Jung-Min Oh , Kwon-Taek Lim , Ha-Soo Hwang , Haldural Yuvaraj , Jae-Mok Jung
发明人： Hyo-san Lee , Chang-Ki Hong , Kun-Tack Lee , Woo-Gwan Shim , Jeong-Nam Han , Jung-Min Oh , Kwon-Taek Lim , Ha-Soo Hwang , Haldural Yuvaraj , Jae-Mok Jung
IPC分类号： B08B3/08
CPC分类号： H01L21/02101 , H01L21/31111 , H01L21/67051 , H01L21/6708 , H01L27/10852 , Y10S134/902
摘要： Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.
摘要翻译：本文提供了使用超临界流体的蚀刻，清洁和干燥方法以及用于进行该临界流体的室系统。蚀刻方法包括使用其中溶解蚀刻剂的超临界二氧化碳蚀刻材料层，以及使用超临界二氧化碳除去由材料层和蚀刻化学品之间的反应产生的蚀刻副产物，其中清洁化学品溶解还提供了制造半导体器件的方法。

9. 发明申请

US20070111432A1 Semiconductor device having capacitor and method of fabricating the same 有权
标题翻译：具有电容器的半导体器件及其制造方法
公开(公告)号：US20070111432A1
公开(公告)日：2007-05-17
申请号：US11593067
申请日：2006-11-06
申请人： Jung-Min Oh , Jeong-Nam Han , Chang-Ki Hong , Woo-Gwan Shim , Im-Soo Park
发明人： Jung-Min Oh , Jeong-Nam Han , Chang-Ki Hong , Woo-Gwan Shim , Im-Soo Park
IPC分类号： H01L21/8242
CPC分类号： H01L28/91 , H01L21/31116 , H01L27/10817 , H01L27/10852
摘要： A semiconductor device having a capacitor and a method of fabricating the same may be provided. A method of fabricating a semiconductor device may include forming an etch stop layer and a mold layer sequentially on a substrate, patterning the mold layer to form a mold electrode hole exposing a portion of the etch stop layer, etching selectively the exposed etch stop layer by an isotropic dry etching process to form a contact electrode hole through the etch stop layer to expose a portion of the substrate, forming a conductive layer on the substrate and removing the conductive layer on the mold layer on the mold layer to form a cylindrical bottom electrode in the mold and contact electrode holes. The isotropic dry etching process may utilize a process gas including main etching gas and selectivity adjusting gas. The selectivity adjusting gas may increase an etch rate of the etch stop layer by more than an etch rate of the mold layer by the isotropic wet etching process.
摘要翻译：可以提供具有电容器的半导体器件及其制造方法。制造半导体器件的方法可以包括在衬底上顺序地形成蚀刻停止层和模制层，图案化模具层以形成露出蚀刻停止层的一部分的模具电极孔，通过以下步骤选择性地蚀刻暴露的蚀刻停止层：各向同性干蚀刻工艺，以形成通过蚀刻停止层的接触电极孔，以露出衬底的一部分，在衬底上形成导电层，并去除模层上的模层上的导电层，形成圆柱形底电极在模具和接触电极孔中。各向同性干蚀刻工艺可以利用包括主蚀刻气体和选择性调节气体的工艺气体。选择性调节气体可以通过各向同性湿蚀刻工艺增加蚀刻停止层的蚀刻速率超过模具层的蚀刻速率。

10. 发明授权

US08084367B2 Etching, cleaning and drying methods using supercritical fluid and chamber systems using these methods 有权
标题翻译：使用这些方法使用超临界流体和室系统的蚀刻，清洁和干燥方法
公开(公告)号：US08084367B2
公开(公告)日：2011-12-27
申请号：US11752834
申请日：2007-05-23
申请人： Hyo-san Lee , Chang-Ki Hong , Kun-Tack Lee , Woo-Gwan Shim , Jeong-Nam Han , Jung-Min Oh , Kwon-Taek Lim , Ha-Soo Hwang , Haldorai Yuvaraj , Jae-Mok Jung
发明人： Hyo-san Lee , Chang-Ki Hong , Kun-Tack Lee , Woo-Gwan Shim , Jeong-Nam Han , Jung-Min Oh , Kwon-Taek Lim , Ha-Soo Hwang , Haldorai Yuvaraj , Jae-Mok Jung
IPC分类号： H01L21/302
CPC分类号： H01L21/02101 , H01L21/31111 , H01L21/67051 , H01L21/6708 , H01L27/10852 , Y10S134/902
摘要： Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.
摘要翻译：本文提供了使用超临界流体的蚀刻，清洁和干燥方法以及用于进行该临界流体的室系统。蚀刻方法包括使用其中溶解蚀刻剂的超临界二氧化碳蚀刻材料层，以及使用超临界二氧化碳除去由材料层和蚀刻化学品之间的反应产生的蚀刻副产物，其中清洁化学品溶解还提供了制造半导体器件的方法。

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