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41. 发明申请

US20070232108A1 WATER DISCHARGE DEVICE 有权
标题翻译：水排放装置
公开(公告)号：US20070232108A1
公开(公告)日：2007-10-04
申请号：US11691802
申请日：2007-03-27
申请人： Shoji Miura , Emiko Sumimoto
发明人： Shoji Miura , Emiko Sumimoto
IPC分类号： H01R13/62
CPC分类号： E03C1/042 , E03C1/0403 , Y10T137/698 , Y10T137/9464
摘要： Disclosed is a water discharge device (1) provided with a device body (2) and a connector (4) and adapted to be attached to a feedwater pipe (6). The water discharge device comprises fixing means (8) for fixing the device body to the connector at a given installation position. The connector has a feedwater-pipe-joining portion (4a) adapted to be joined to the feedwater pipe, and a connector-side engaging thread portion (4b), and the device body has a body-side engaging thread portion (14) positioned in such a manner as to be engaged with the connector-side engaging thread portion once during an operation of attaching the device body to the connector, and located beyond the connector-side engaging thread portion after the device body is fixed at the installation position. The water discharge device of the present invention can reliably prevent falling-off of the device body.
摘要翻译：公开了一种具有装置主体（2）和连接器（4）的排水装置（1），其适于附接到给水管（6）。排水装置包括用于在给定的安装位置将装置主体固定到连接器的固定装置（8）。连接器具有适于与给水管接合的给水管接合部分（4a）和连接器侧接合螺纹部分（4b），并且该装置主体具有主体侧接合螺纹部分（14）），在将装置本体连接到连接器的操作期间，以与连接器侧接合线部分接合的方式定位，并且在装置主体被固定在安装件之后位于连接器侧接合线部分之外位置。本发明的排水装置能够可靠地防止装置主体的脱落。

42. 发明授权

US07009292B2 Package type semiconductor device 有权
标题翻译：封装型半导体器件
公开(公告)号：US07009292B2
公开(公告)日：2006-03-07
申请号：US10959963
申请日：2004-10-08
申请人： Shoji Miura , Akihiro Niimi , Yoshimi Nakase , Takanori Teshima
发明人： Shoji Miura , Akihiro Niimi , Yoshimi Nakase , Takanori Teshima
IPC分类号： H01L29/78
CPC分类号： H01L24/33 , H01L23/4334 , H01L23/4824 , H01L23/564 , H01L24/48 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/351 , H01L2924/00 , H01L2924/01014 , H01L2924/3512 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A package type semiconductor device comprising: a semiconductor chip having a semiconductor part; a main electrode for connecting to a first region of the semiconductor part; a control wiring layer for connecting to a second region of the semiconductor part; a blocking member electrically isolated from the control wiring layer; a first metallic layer; a protection film disposed among the main electrode, the control wiring layer and the blocking member; and a metal block for connecting to the main electrode through the first metallic layer. The chip, the main electrode, the control wiring layer, the blocking member, and the metal block are packaged. The blocking member is disposed between the main electrode and the control wiring layer.
摘要翻译：一种封装型半导体器件，包括：具有半导体部件的半导体芯片; 用于连接到半导体部件的第一区域的主电极; 用于连接到所述半导体部件的第二区域的控制布线层; 阻挡构件，与所述控制布线层电隔离; 第一金属层; 设置在主电极，控制布线层和阻挡构件之间的保护膜; 以及用于通过第一金属层连接到主电极的金属块。封装芯片，主电极，控制布线层，阻挡构件和金属块。阻挡构件设置在主电极和控制布线层之间。

43. 发明申请

US20050103895A1 Water discharge 有权
标题翻译：排水
公开(公告)号：US20050103895A1
公开(公告)日：2005-05-19
申请号：US10503767
申请日：2003-02-06
申请人： Makoto Fujii , Shoji Miura , Yoshihiro Kiyofuji
发明人： Makoto Fujii , Shoji Miura , Yoshihiro Kiyofuji
IPC分类号： A47K3/28 , E03C1/04 , E03C1/044 , E03C1/06 , B05B7/12
CPC分类号： E03C1/066 , E03C1/0408 , E03C1/06 , E03C2201/30
摘要： It is an object to provide a novel water discharging apparatus capable of rapidly enhancing an outer appearance and a cleaning property and enjoying a plurality of water discharging configurations. In order to achieve the object, the water discharging apparatus comprises a hot and cold water mixing portion including a housing to which a cold water supply tube and a hot water supply tube are connected respectively, and a hot and cold water generating portion provided in the housing and serving to mix cold water and hot water which are supplied from the cold water supply tube and the hot water supply tube, thereby generating hot and cold water, and a water discharging portion coupled to the hot and cold water mixing portion and serving to discharge the generated hot and cold water from at least one water discharging nozzle, wherein the housing of the hot and cold water mixing portion is formed longitudinally in a vertical direction and the water discharging portion is coupled to an upper part and/or a lower part of the housing.
摘要翻译：本发明的目的是提供一种新颖的排水装置，其能够快速提高外观和清洁性能并享受多种排水结构。为了实现该目的，排水装置包括一个冷热水混合部分，该冷热水混合部分包括分别连接有冷水供给管和一个热水供应管的壳体，以及设置在该冷水产生部分中的冷热水产生部分将从冷水供给管和热水供给管供给的冷水和热水混合从而产生冷热水，以及与冷热水混合部连接的排水部，从至少一个排水喷嘴排出产生的冷热水，其中冷热水混合部分的壳体在垂直方向上纵向形成，并且排水部分联接到上部和/或下部的住房。

44. 发明授权

US06291315B1 Method for etching trench in manufacturing semiconductor devices 失效
标题翻译：在制造半导体器件中蚀刻沟槽的方法
公开(公告)号：US06291315B1
公开(公告)日：2001-09-18
申请号：US08889918
申请日：1997-07-10
申请人： Yoshiaki Nakayama , Shoji Miura
发明人： Yoshiaki Nakayama , Shoji Miura
IPC分类号： H01L21304
CPC分类号： H01L21/76251 , H01L21/3081
摘要： A semiconductor wafer in which black silicon does not form during trench etching even when side rinsing is carried out during a photolithography process. In an embedded oxide film interposed between first and second semiconductor wafers of a bonded SOI wafer, the film thickness of a peripheral part thereof is made greater than a predetermined thickness Dsio so that it functions as an oxide film for etching prevention. When side rinsing is carried out in a resist coating process to form an opening in an oxide film for masking use in trench etching, the oxide film for masking use at the periphery is also etched during formation of the opening. Due to over-etching at that time, the oxide film for etching prevention is etched by a film thickness d1. During trench etching also, the oxide film for etching prevention is etched by a film thickness d2. Accordingly, if the film thickness Dsio of the oxide film for etching prevention is set to be greater than the film thickness d1+d2, because an oxide film remains at the final stage, the formation of black silicon can be prevented.
摘要翻译：即使在光刻工序中进行侧面漂洗的情况下，在沟槽蚀刻中也不形成黑色硅的半导体晶片。在插入接合的SOI晶片的第一和第二半导体晶片之间的嵌入式氧化膜中，其周边部分的膜厚度大于预定厚度Dsio，从而其用作防止蚀刻的氧化物膜。当在抗蚀剂涂布工艺中进行侧面冲洗以在沟槽蚀刻中用于掩模使用的氧化膜中形成开口时，在形成开口期间也蚀刻在周边使用的用于掩蔽的氧化膜。此时由于过蚀刻，用于防止蚀刻的氧化膜被膜厚度d1蚀刻。在沟槽蚀刻期间，用于防蚀蚀的氧化膜也被膜厚d2蚀刻。因此，如果将用于防蚀蚀的氧化膜的膜厚度Dsio设定为大于膜厚度d1 + d2，因为氧化膜保持在最后阶段，所以可以防止形成黑色硅。

45. 发明授权

US06242792B1 Semiconductor device having oblique portion as reflection 有权
标题翻译：具有倾斜部分作为反射的半导体器件
公开(公告)号：US06242792B1
公开(公告)日：2001-06-05
申请号：US09315132
申请日：1999-05-20
申请人： Shoji Miura , Satoshi Shiraki , Tetsuaki Kamiya , Makio Iida
发明人： Shoji Miura , Satoshi Shiraki , Tetsuaki Kamiya , Makio Iida
IPC分类号： H01L2941
CPC分类号： H01L28/20 , H01L22/22 , H01L27/1203 , H01L2924/0002 , H01L2924/00
摘要： A laser trimming is favorably performed by a strengthened laser beam energy. A level difference portion having a taper portion that is oblique with respect to the thicknesswise direction of a semiconductor substrate is formed at a surface of a semiconductor substrate. An insulating film is formed thereon and has its surface made flat, and then the thin film element is formed thereon. Thereafter, laser trimming is performed with respect to the thin film resistor. As a result, a state of interference between incident laser beam and reflected laser beam reflected from the interface between the semiconductor substrate and the insulating film is varied to thereby enable the production of a zone where laser beam energy is strengthened and a zone where laser beam energy is weakened.
摘要翻译：通过强化的激光束能量有利地进行激光修整。在半导体基板的表面形成有具有相对于半导体基板的厚度方向倾斜的锥形部的电平差部。在其上形成绝缘膜并使其表面平坦化，然后在其上形成薄膜元件。此后，相对于薄膜电阻器进行激光微调。结果，入射激光束与从半导体衬底和绝缘膜之间的界面反射的反射激光束之间的干涉状态变化，从而能够生成激光束能量增强的区域和激光束能量减弱。

46. 发明授权

US5480832A Method for fabrication of semiconductor device 失效
标题翻译：半导体器件制造方法
公开(公告)号：US5480832A
公开(公告)日：1996-01-02
申请号：US75514
申请日：1993-10-21
申请人： Shoji Miura , Takayuki Sugisaka , Atsushi Komura , Toshio Sakakibara
发明人： Shoji Miura , Takayuki Sugisaka , Atsushi Komura , Toshio Sakakibara
IPC分类号： H01L21/762 , H01L21/763 , H01L21/768 , H01L21/76
CPC分类号： H01L21/763 , H01L21/76264 , H01L21/76802 , H01L21/76275 , H01L21/76281 , H01L21/76286 , Y10S148/05 , Y10S148/135 , Y10S438/977
摘要： An object of the invention is to prevent the occurrence of breaking or short-circuiting of a wiring caused by a difference in level in an isolation trench area formed in an SOI substrate. An oxide film is formed for a pad on the main surface of an SOI layer formed on an insulating substrate, a silicon nitride film are formed and an SiO.sub.2 film in order, then an isolation trench reaching to the insulating substrate is by means of an R.I.E process using the SiO.sub.2 film as a mask. Thereafter an insulating film is formed on an inside wall of the isolation trench by means of thermal oxidation, the isolation trench is filled with polysilicon, the polysilicon is etched back while controlling the etching so that the top of the polysilicon in the isolation trench remains higher than the top of the silicon nitride film, an extra part of the polysilicon deposited on the surface of the substrate, is removed and then the SiO.sub.2 film used as a mask when forming the isolation trench is etched off using the polysilicon in the isolation trench and the silicon nitride film as an etching stopper. In this manner, since the SiO.sub.2 film used as a mask is etched off after filling the isolation trench with polysilicon, the oxide film for isolating between the substrates is not etched when removing the mask film. Moreover since the polysilicon is the isolation trench and the silicon nitride film act as an etching stopper when etching off the SiO.sub.2 film used as a mask, the oxide film for a pad existing thereunder and the insulating film formed on an inside wall of the trench can also be prevented from being etched and a flatness at an isolation trench area is not deteriorated.
摘要翻译： PCT No.PCT / JP92 / 01326 Sec。 371日期：1993年10月21日 102（e）日期1993年10月21日PCT提交1992年10月12日PCT公布。公开号WO93 / 08596 日期：1993年04月29日。本发明的目的在于防止在SOI衬底中形成的隔离沟槽区域中的电平差引起的布线断裂或短路。在绝缘基板上形成的SOI层的主表面上形成氧化膜，依次形成氮化硅膜和SiO 2膜，然后通过RIE到达绝缘基板的隔离沟槽使用SiO 2膜作为掩模。此后，通过热氧化在隔离沟槽的内壁上形成绝缘膜，隔离沟槽填充有多晶硅，在控制蚀刻的同时蚀刻多晶硅，使得隔离沟槽中的多晶硅的顶部保持较高除去氮化硅膜的顶部，去除沉积在衬底表面上的多晶硅的额外部分，然后使用隔离沟槽中的多晶硅蚀刻掉形成隔离沟槽时用作掩模的SiO 2膜，作为蚀刻停止层的氮化硅膜。以这种方式，由于在用多晶硅填充隔离沟槽之后蚀刻用作掩模的SiO 2膜，因此在去除掩模膜时不会蚀刻用于隔离的氧化膜。此外，由于多晶硅是隔离沟槽，并且氮化硅膜在蚀刻掉用作掩模的SiO 2膜时用作蚀刻阻挡层，所以存在于其上的垫的氧化膜和形成在沟槽的内壁上的绝缘膜也防止蚀刻，并且隔离沟槽区域的平坦度不会劣化。

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