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31. 发明申请

US20090146325A1 ALIGNMENT FOR BACKSIDE ILLUMINATION SENSOR 有权
标题翻译：背面照明传感器对准
公开(公告)号：US20090146325A1
公开(公告)日：2009-06-11
申请号：US11951916
申请日：2007-12-06
申请人： Jen-Cheng Liu , Dun-Nian Yaung , Shou-Gwo Wuu
发明人： Jen-Cheng Liu , Dun-Nian Yaung , Shou-Gwo Wuu
IPC分类号： H01L23/544 , H01L21/46
CPC分类号： H01L23/544 , H01L21/71 , H01L2223/54426 , H01L2223/54453 , H01L2223/5446 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An apparatus and manufacturing method thereof, wherein an integrated circuit is located in a first region of a substrate having first and second opposing major surfaces, and wherein an alignment mark is located in a second region of the substrate and extends through the substrate between the first and second surfaces. The alignment mark may protrude from the first and/or second surfaces, and/or may comprise a plurality of substantially similar alignment marks. The second region may interpose the first region and a perimeter of the substrate. The second region may comprise a scribe region.
摘要翻译：一种装置及其制造方法，其中集成电路位于具有第一和第二相对主表面的基板的第一区域中，并且其中对准标记位于所述基板的第二区域中，并且延伸穿过所述基板在所述第一和第二表面。对准标记可以从第一和/或第二表面突出，和/或可以包括多个基本相似的对准标记。第二区域可以插入衬底的第一区域和周边。第二区域可以包括划线区域。

32. 发明申请

US20080198454A1 Color Filter For Image Sensor 有权
标题翻译：图像传感器滤色片
公开(公告)号：US20080198454A1
公开(公告)日：2008-08-21
申请号：US11676388
申请日：2007-02-19
申请人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
发明人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
IPC分类号： G02B5/30
CPC分类号： G02B5/201 , G02B5/223
摘要： An image sensor device includes a semiconductor substrate having a front surface and a back surface, pixels formed on the front surface of the semiconductor substrate, and grid arrays aligned with one of the pixels. One of the grid arrays is configured to allow a wavelength of light to pass through to the corresponding one of the pixels. The grid arrays are disposed overlying the front or back surface of the semiconductor substrate.
摘要翻译：图像传感器装置包括具有前表面和后表面的半导体衬底，形成在半导体衬底的前表面上的像素和与像素之一对准的栅格阵列。网格阵列中的一个被配置为允许光的波长通过到相应的一个像素。栅格阵列设置在半导体衬底的前表面或后表面上。

33. 发明申请

US20060073629A1 Light guide for image sensor 有权
标题翻译：图像传感器光导
公开(公告)号：US20060073629A1
公开(公告)日：2006-04-06
申请号：US11285671
申请日：2005-11-22
申请人： Dun-Nian Yaung , Shou-Gwo Wuu , Ho-Ching Chien , Chein-Hsien Tseng
发明人： Dun-Nian Yaung , Shou-Gwo Wuu , Ho-Ching Chien , Chein-Hsien Tseng
IPC分类号： H01L21/00
CPC分类号： H01L27/14625 , H01L27/14685
摘要： A new method to form an image sensor device is achieved. The method comprises forming an image sensing array in a substrate comprising a plurality of light detecting diodes with spaces between the diodes. A first dielectric layer is formed overlying the diodes but not the spaces. The first dielectric layer has a first refractive index. A second dielectric layer is formed overlying the spaces but not the diodes. The second dielectric layer has a second refractive index that is larger than the first refractive index. A new image sensor device is disclosed.
摘要翻译：实现了形成图像传感器装置的新方法。该方法包括在包括在二极管之间具有空间的多个光检测二极管的衬底中形成图像感测阵列。第一介电层形成在二极管上，但不形成空间。第一电介质层具有第一折射率。第二电介质层形成在空间上而不是二极管上。第二电介质层具有大于第一折射率的第二折射率。公开了一种新的图像传感器装置。

34. 发明申请

US20060054939A1 CMOS image sensor 有权
标题翻译： CMOS图像传感器
公开(公告)号：US20060054939A1
公开(公告)日：2006-03-16
申请号：US10980959
申请日：2004-11-04
申请人： Tzu-Hsuan Hsu , Dun-Nian Yaung , Wen-De Wang , Ho-Ching Chien , Shou-Gwo Wuu
发明人： Tzu-Hsuan Hsu , Dun-Nian Yaung , Wen-De Wang , Ho-Ching Chien , Shou-Gwo Wuu
IPC分类号： H01L27/148
CPC分类号： H01L27/14643 , H01L27/14621 , H01L27/14627 , H01L27/14636
摘要： A complementary metal oxide semiconductor field effect transistor (CMOS-FET) image sensor. An active photosensing pixel is formed on a substrate. At least one side of the pixel has a width equal to or less than approximately 3 μm. At least one dielectric layer is disposed on the substrate covering the pixel. A color filter is disposed on the least one dielectric layer. A microlens array is disposed on the color filter of the pixel, and the sum of the thickness of all dielectric layers and the color filter divided by the pixel width is equal to or less than approximately 1.87.
摘要翻译：互补金属氧化物半导体场效应晶体管（CMOS-FET）图像传感器。在基板上形成有源感光像素。像素的至少一侧具有等于或小于约3μm的宽度。在覆盖像素的基板上设置至少一个电介质层。滤色器设置在至少一个电介质层上。微透镜阵列设置在像素的滤色器上，所有电介质层和滤色器的厚度之和除以像素宽度等于或小于约1.87。

35. 发明申请

US20050062118A1 Quantum efficiency enhancement for CMOS imaging sensor with borderless contact 有权
标题翻译：具有无边界接触的CMOS成像传感器的量子效率增强
公开(公告)号：US20050062118A1
公开(公告)日：2005-03-24
申请号：US10669516
申请日：2003-09-24
申请人： Dun-Nian Yaung , Shou-Gwo Wuu , Ho-Ching Chien , Chien-Hsien Tseng , Jeng-Shyan Lin
发明人： Dun-Nian Yaung , Shou-Gwo Wuu , Ho-Ching Chien , Chien-Hsien Tseng , Jeng-Shyan Lin
IPC分类号： H01L21/00 , H01L21/82 , H01L27/14 , H01L27/146 , H01L29/82 , H01L31/00 , H04N5/335
CPC分类号： H01L31/103 , H01L27/1463 , H01L27/14632 , H01L27/14643 , H01L31/02161
摘要： The present invention is a CMOS image sensor and its method of fabrication. This invention provides an efficient structure to improve the quantum efficiency of a CMOS image sensor with borderless contact. The image sensor comprises a N-well/P-substrate type photodiode with borderless contact and dielectric structure covering the photodiode region. The dielectric structure is located between the photodiode and the interlevel dielectric (ILD) and is used as a buffer layer for the borderless contact. The method of fabricating a high performance photodiode comprises forming a photodiode in the n-well region of a shallow trench, and embedding a dielectric material between the ILD oxide and the photodiode having a refraction index higher than the ILD oxide.
摘要翻译：本发明是CMOS图像传感器及其制造方法。本发明提供了一种提高无边界接触CMOS图像传感器的量子效率的有效结构。图像传感器包括覆盖光电二极管区域的无接触接触和介电结构的N阱/ P基板型光电二极管。电介质结构位于光电二极管和层间电介质（ILD）之间，用作无边界接触的缓冲层。制造高性能光电二极管的方法包括在浅沟槽的n阱区域中形成光电二极管，并且在ILD氧化物和具有高于ILD氧化物的折射率的光电二极管之间嵌入电介质材料。

36. 发明授权

US06707080B2 Method for making spectrally efficient photodiode structures for CMOS color imagers 有权
标题翻译： CMOS彩色成像器制作光谱效率高的光电二极管结构的方法
公开(公告)号：US06707080B2
公开(公告)日：2004-03-16
申请号：US10320296
申请日：2002-12-16
申请人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
发明人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
IPC分类号： H01L31062
CPC分类号： H01L27/14645
摘要： A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N doped wells is formed for photodiodes for the long wavelength red pixel cells. An array of P doped well regions is formed adjacent to and interlaced with the N doped wells. Shallow diffused N+ regions are formed within the P doped wells for the shorter wavelength green and blue color pixels cells. The shallow diffused photodiodes improve the quantum efficiency (QE), and provide a color imager with improved color fidelity. An insulating layer and appropriate dye materials are deposited and patterned over the photodiodes to provide the array of color pixel cells. The N and P doped wells are also used for the supporting FET CMOS circuits to provide a cost-effective manufacturing process.
摘要翻译：实现了对CMOS彩色成像器上的红色，绿色和蓝色像素单元制造具有更均匀的光谱响应的光电二极管阵列的方法。在衬底上形成场氧化物以电隔离CMOS电路的器件区域后，形成用于长波长红色像素单元的光电二极管的深N掺杂阱的阵列。与N个掺杂的阱相邻并且与其交错形成P掺杂阱区的阵列。在较短波长的绿色和蓝色像素单元的P掺杂阱内形成浅扩散的N +区。浅扩散光电二极管提高了量子效率（QE），并提供了具有改进的色彩保真度的彩色成像仪。在光电二极管上沉积并图案化绝缘层和适当的染料材料以提供彩色像素单元阵列。 N和P掺杂阱也用于支持FET CMOS电路以提供成本有效的制造工艺。

37. 发明授权

US06531752B2 Stripe photodiode element with high quantum efficiency for an image sensor cell 有权
公开(公告)号：US06531752B2
公开(公告)日：2003-03-11
申请号：US09956219
申请日：2001-09-20
申请人： Dun-Nian Yaung , Shou-Gwo Wuu , Chien-Hsien Tseng
发明人： Dun-Nian Yaung , Shou-Gwo Wuu , Chien-Hsien Tseng
IPC分类号： H01L3106
CPC分类号： H01L31/103 , H01L27/14603 , H01L31/03529 , Y02E10/50
摘要： A method of fabricating a stripe photodiode element, for an image sensor cell, has been developed. The stripe photodiode element is comprised of a narrow width, serpentine shaped, lightly doped N type region, in a P well region. The use of the serpentine shaped region results in increased photon collection area, when compared to counterparts fabricated using non-serpentine shaped patterns. In addition the use of the serpentine shaped N type regions allow both vertical, as well as horizontal depletion regions, to result, thus increasing the quantum efficiency of the photodiode element. The combination of narrow width, and a reduced dopant level, for the N type serpentine shaped region, result in a fully depleted photodiode element.

38. 发明授权

US06518085B1 Method for making spectrally efficient photodiode structures for CMOS color imagers 有权
标题翻译： CMOS彩色成像器制作光谱效率高的光电二极管结构的方法
公开(公告)号：US06518085B1
公开(公告)日：2003-02-11
申请号：US09635584
申请日：2000-08-09
申请人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
发明人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
IPC分类号： H01L2100
CPC分类号： H01L27/14645
摘要： A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N doped wells is formed for photodiodes for the long wavelength red pixel cells. An array of P doped well regions is formed adjacent to and interlaced with the N doped wells. Shallow diffused N+ regions are formed within the P doped wells for the shorter wavelength green and blue color pixels cells. The shallow diffused photodiodes improve the quantum efficiency (QE), and provide a color imager with improved color fidelity. An insulating layer and appropriate dye materials are deposited and patterned over the photodiodes to provide the array of color pixel cells. The N and P doped wells are also used for the supporting FET CMOS circuits to provide a cost-effective manufacturing process.
摘要翻译：实现了对CMOS彩色成像器上的红色，绿色和蓝色像素单元制造具有更均匀的光谱响应的光电二极管阵列的方法。在衬底上形成场氧化物以电隔离CMOS电路的器件区域后，形成用于长波长红色像素单元的光电二极管的深N掺杂阱的阵列。与N个掺杂的阱相邻并且与其交错形成P掺杂阱区的阵列。在较短波长的绿色和蓝色像素单元的P掺杂阱内形成浅扩散的N +区。浅扩散光电二极管提高了量子效率（QE），并提供了具有改进的色彩保真度的彩色成像仪。在光电二极管上沉积并图案化绝缘层和适当的染料材料以提供彩色像素单元阵列。 N和P掺杂阱也用于支持FET CMOS电路以提供成本有效的制造工艺。

39. 发明授权

US06372603B1 Photodiode with tightly-controlled junction profile for CMOS image sensor with STI process 有权
标题翻译：光电二极管具有紧密控制的结型剖面，用于具有STI工艺的CMOS图像传感器
公开(公告)号：US06372603B1
公开(公告)日：2002-04-16
申请号：US09612186
申请日：2000-07-07
申请人： Dun-Nian Yaung , Shou-Gwo Wuu , Chien-Hsien Tseng
发明人： Dun-Nian Yaung , Shou-Gwo Wuu , Chien-Hsien Tseng
IPC分类号： H01L2176
CPC分类号： H01L27/14689 , H01L21/76237 , H01L21/823878 , H01L27/14609
摘要： A method for forming a high performance photodiode with tightly-controlled junction profile for CMOS image sensor with STI process. The following steps are performed: providing a substrate; forming a hard mask layer for defining a pattern on the substrate; etching the substrate on the surface of the substrate not covered by the hard mask layer to form a shallow trench; growing an oxide lining in the shallow trench by a thermal oxidation process; performing a first thermal annealing; defining an n-well region in the shallow trench; implanting the n-well region; performing a second thermal annealing; forming a silicon oxide layer on the substrate to fill in the shallow trench; removing a portion of the silicon oxide layer on the substrate such that the portion in the shallow trench remains; removing the hard mask layer; and forming a transistor on the substrate, wherein the transistor comprises a gate structure, a source region, and a drain region.
摘要翻译：一种用于具有STI工艺的CMOS图像传感器的具有紧密控制的结形状的高性能光电二极管的方法。执行以下步骤：提供衬底; 形成用于在所述基板上限定图案的硬掩模层; 蚀刻未被硬掩模层覆盖的衬底的表面上的衬底，以形成浅沟槽; 通过热氧化过程在浅沟槽中生长氧化物衬里; 执行第一热退火; 在浅沟槽中限定n阱区域; 植入n阱区; 进行第二热退火; 在衬底上形成氧化硅层以填充浅沟槽; 去除衬底上的氧化硅层的一部分，使得浅沟槽中的部分保留; 去除硬掩模层; 以及在所述衬底上形成晶体管，其中所述晶体管包括栅极结构，源极区和漏极区。

40. 发明授权

US6165880A Double spacer technology for making self-aligned contacts (SAC) on semiconductor integrated circuits 失效
标题翻译：用于在半导体集成电路上制作自对准触点（SAC）的双间隔技术
公开(公告)号：US6165880A
公开(公告)日：2000-12-26
申请号：US94869
申请日：1998-06-15
申请人： Dun-Nian Yaung , Shou-Gwo Wuu , Li-Chih Chao , Kuo Ching Huang
发明人： Dun-Nian Yaung , Shou-Gwo Wuu , Li-Chih Chao , Kuo Ching Huang
IPC分类号： H01L21/285 , H01L21/3205 , H01L21/60 , H01L21/4763
CPC分类号： H01L21/76897 , H01L21/28525 , H01L21/32053
摘要： A method was achieved for making improved self-aligned contacts (SAC) to a patterned polysilicon layer, such as gate electrodes for FETs. Lightly doped source/drain areas are implanted. A second insulating layer is deposited and etched back to form first sidewall spacers. A silicon nitride etch-stop layer and a first interpolysilicon oxide (IPO1) layer are deposited. First SAC openings are etched in the IPO1 layer to the etch-stop layer, and concurrently openings are etched for the gate electrodes, eliminating a masking step. The etch-stop layer is etched in the SAC openings to form second sidewall spacers that protect the first sidewall spacers during BOE cleaning of the contacts. A patterned polycide layer is used to make SACs and electrical interconnections. A second IPO layer is deposited to provide insulation, and an interlevel dielectric layer is deposited. Second SAC openings are etched to the etch-stop layer for the next level of metal interconnections, while the contact openings to the gate electrodes are etched to completion. The etch-stop layer is etched in the second SAC openings to form second sidewall spacers to protect the first sidewall spacers during cleaning. Metal plugs are formed from a first metal in the second SAC openings and in the openings to the gate electrodes. A second metal is patterned to complete the structure to the first level of metal interconnections.
摘要翻译：实现了对图案化多晶硅层（例如FET的栅电极）进行改进的自对准接触（SAC）的方法。植入轻掺杂的源极/漏极区域。沉积第二绝缘层并回蚀刻以形成第一侧壁间隔物。沉积氮化硅蚀刻停止层和第一多晶硅化硅（IPO1）层。在IPO1层中蚀刻第一SAC开口到蚀刻停止层，同时蚀刻用于栅电极的开口，从而消除掩模步骤。在SAC开口中蚀刻蚀刻停止层以形成第二侧壁间隔物，其在接触的BOE清洁期间保护第一侧壁间隔物。使用图案化的多晶硅化合物层来制造SAC和电互连。沉积第二个IPO层以提供绝缘，并且沉积层间电介质层。将第二SAC开口蚀刻到蚀刻停止层以进行下一级金属互连，同时蚀刻到栅电极的接触开口以完成。在第二SAC开口中蚀刻蚀刻停止层以形成第二侧壁间隔物，以在清洁期间保护第一侧壁间隔物。金属插塞由第二SAC开口中的第一金属和与栅电极的开口形成。图案化第二金属以将结构完成到第一级金属互连。

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