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    • 31. 发明授权
    • Semiconductor device and method of producing the same
    • 半导体装置及其制造方法
    • US06607979B1
    • 2003-08-19
    • US09670400
    • 2000-09-27
    • Satoshi Kamiyama
    • Satoshi Kamiyama
    • H01L2144
    • H01L29/4941H01L21/28044H01L21/28556
    • A semiconductor device of the present invention includes a conductive film made up of a polysilicon film, a barrier metal film and a high melting point, metal nitride film sequentially laminated in this order. The conductive film is annealed to lower the resistance of the metal nitride film. Annealing causes the metal nitride film, which is formed in an amorphous state, to release nitrogen and increases the crystal size of metal having a high melting point. This successfully improves the crystallization of the high melting point metal and lowers the resistance of the metal nitride film without regard to the crystallization of the underlying barrier metal film. It is therefore possible to improve the crystallization of the metal nitride film or to obviate the step of providing the barrier metal film with a double-layer structure, i.e., to simplify the production procedure. A method of producing the semiconductor device is also disclosed.
    • 本发明的半导体器件包括依次层叠多晶硅膜,阻挡金属膜和高熔点金属氮化物膜的导电膜。 对导电膜进行退火以降低金属氮化物膜的电阻。 退火使得形成为非晶态的金属氮化物膜释放氮气并增加具有高熔点的金属的晶体尺寸。 这成功地改善了高熔点金属的结晶,并且降低了金属氮化物膜的电阻,而不考虑下面的阻挡金属膜的结晶。 因此,可以改善金属氮化物膜的结晶,或者避免提供具有双层结构的阻挡金属膜的步骤,即简化制造过程。 还公开了一种制造半导体器件的方法。
    • 33. 发明授权
    • Method for forming capacitor element of DRAM
    • 形成DRAM电容元件的方法
    • US5508221A
    • 1996-04-16
    • US353204
    • 1994-12-01
    • Satoshi Kamiyama
    • Satoshi Kamiyama
    • H01L21/28H01L21/02H01L21/318H01L21/822H01L21/8242H01L27/04H01L27/10H01L27/108H01L21/70H01L27/00
    • H01L28/40
    • A stacked capacitor element for a DRAM cell is formed as follows. After a naturally oxidized film on a surface of a polycrystalline silicon film is removed, the polycrystalline silicon film is subjected to a rapid thermal nitriding treatment using lamp annealing so that a capacitor lower electrode of the capacitor element is formed. A tantalum oxide film is deposited on the polycrystalline silicon film and then densified so that a dielectric film of the stacked capacitor element is formed. A conductive film is formed on the tantalum oxide film and patterned. The conductive film is nittided so that a capacitor upper electrode is formed. The capacitor element thus formed enables the suppression of reduction in the capacitance value of the capacitor element of a DRAM and deterioration of the leakage current characteristics.
    • 用于DRAM单元的叠层电容器元件如下形成。 在去除多晶硅膜表面上的自然氧化膜之后,使用灯退火对多晶硅膜进行快速热氮化处理,从而形成电容器元件的电容器下电极。 在多晶硅膜上沉积氧化钽膜,然后致密化,从而形成叠层电容器元件的电介质膜。 在氧化钽膜上形成导电膜并图案化。 导电膜被硝化以形成电容器上电极。 这样形成的电容器元件能够抑制DRAM的电容器元件的电容值的降低和漏电流特性的劣化。
    • 38. 发明授权
    • Method of fabricating capacitor element in super-LSI
    • 超LSI制造电容元件的方法
    • US5438012A
    • 1995-08-01
    • US102634
    • 1993-08-05
    • Satoshi Kamiyama
    • Satoshi Kamiyama
    • H01L27/04H01L21/02H01L21/822H01L21/8242H01L27/10H01L27/108H01L21/70
    • H01L28/40
    • A capacitor element of a semiconductor device used for a super-LSI is formed by the steps including (a) removing a natural oxide film on a surface of a lower electrode of polysilicon, (b) forming on the surface of the lower electrode an impurity-doped tantalum oxide film, and (c) forming an upper electrode with at least a bottom thereof constituted by titanium nitride. The steps may further include (d) nitriding the surface of the lower electrode after the removal of the natural oxide film, and (e) densifying the tantalum oxide film by way of a high temperature heat treatment after the formation of the tantalum oxide film. In this way, it is possible to reduce thickness of a capacitive insulating film and to form the capacitor element in which the leakage current characteristics are improved.
    • 用于超级LSI的半导体器件的电容器元件通过以下步骤形成,所述步骤包括:(a)在多晶硅的下电极的表面上去除自然氧化物膜,(b)在下电极的表面上形成杂质 掺杂的氧化钽膜,(c)至少形成由氮化钛构成的底部的上部电极。 这些步骤还可以包括(d)在去除天然氧化物膜之后氮化下电极的表面,和(e)在氧化钽膜形成之后通过高温热处理使氧化钽膜致密化。 以这种方式,可以减小电容绝缘膜的厚度并形成其中泄漏电流特性得到改善的电容器元件。
    • 39. 发明授权
    • Method for manufacturing a semiconductor device
    • 半导体器件的制造方法
    • US5352623A
    • 1994-10-04
    • US196486
    • 1994-02-15
    • Satoshi Kamiyama
    • Satoshi Kamiyama
    • H01L27/04H01L21/02H01L21/822H01L21/8242H01L27/10H01L27/108H01L21/70
    • H01L27/10852H01L28/40
    • A method for manufacturing a semiconductor device, wherein a thin film of tantalum oxide is formed as a dielectric film in a capacitor element, increases capacitance per unit area and reduces a leakage current in the capacitor element of DRAM memory cells. The method includes steps of forming a polysilicon film constituting a lower electrode of the capacitor element, removing a natural oxide film from the surface of the polysilicon film, nitriding the surface of the polysilicon by rapid thermal nitriding (RTN) using lamp-annealing, forming a tantalum oxide film, densifying and nitriding consecutively the tantalum oxide film, and forming an upper capacitor electrode thereon. The capacitor element formed by the method has a large capacitance per unit area Cs=13.8 fF/.mu.m.sup.2.
    • 一种用于制造半导体器件的方法,其中在电容器元件中形成氧化钽薄膜作为电介质膜,增加了每单位面积的电容,并降低了DRAM存储单元的电容器元件中的漏电流。 该方法包括以下步骤:形成构成电容器元件的下电极的多晶硅膜,从多晶硅膜的表面去除自然氧化膜,通过使用灯退火的快速热氮化(RTN)对多晶硅的表面进行氮化,形成 氧化钽膜,连续致密化氮化钽膜,在其上形成上层电容电极。 由该方法形成的电容器元件具有单位面积Cs = 13.8fF / m 2的大电容。
    • 40. 发明授权
    • Anti-guided phase-locked array and manufacturing method therefor
    • 反引导锁相阵列及其制造方法
    • US5323405A
    • 1994-06-21
    • US953359
    • 1992-09-30
    • Satoshi KamiyamaKiyoshi Ohnaka
    • Satoshi KamiyamaKiyoshi Ohnaka
    • H01L27/15H01S5/00H01S5/042H01S5/20H01S5/40H01S3/082H01S3/098H01S3/25
    • H01S5/4031H01S5/2059
    • A phase-locked laser array comprising a plurality of element regions for passing electric current into an active layer; and inter-element regions formed between the element regions. Each of the inter-element regions is so formed as to have two regions, i.e. a non-diffusion region at the center thereof and a diffusion regions disposed on both sides thereof, thereby rendering the refractive index in the non-diffusion region higher than that in the diffusion regions. The method of manufacturing the phase-locked laser array which is characterized by including a step growing an optical waveguide layer of superlattice on a portion of a second clad layer while diffusing impurities doped in the second clad layer into said optical waveguide layer, thereby forming a diffusion regions on both sides of the inter-element region.
    • 一种锁相激光器阵列,包括用于将电流传递到有源层中的多个元件区域; 以及形成在元件区域之间的元件间区域。 每个元件间区域被形成为具有两个区域,即其中心处的非扩散区域和设置在其两侧的扩散区域,从而使非扩散区域中的折射率高于不扩散区域的折射率 在扩散区域。 制造锁相激光器阵列的方法,其特征在于包括在第二包覆层的一部分上生长超晶格的光波导层的步骤,同时将掺杂在第二包层中的杂质扩散到所述光波导层中,从而形成 扩散区域在元件间区域的两侧。