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31. 发明申请

US20080194068A1 METHOD OF MANUFACTURING A 3-D CHANNEL FIELD-EFFECT TRANSISTOR AND AN INTEGRATED CIRCUIT 审中-公开
标题翻译：制造三维通道场效应晶体管和集成电路的方法
公开(公告)号：US20080194068A1
公开(公告)日：2008-08-14
申请号：US11674167
申请日：2007-02-13
申请人： Dietmar Temmler , Ralf Gerber , Alexander Sieck
发明人： Dietmar Temmler , Ralf Gerber , Alexander Sieck
IPC分类号： H01L21/336
CPC分类号： H01L29/0847 , H01L27/10823 , H01L27/10838 , H01L27/10841 , H01L27/10876 , H01L27/10879 , H01L29/0653 , H01L29/1045 , H01L29/4236 , H01L29/42368 , H01L29/66621 , H01L29/66818 , H01L29/78 , H01L29/7834 , H01L29/7835 , H01L29/785
摘要： A method of manufacturing an integrated circuit includes providing an auxiliary structure between a first section and a second section of a field-effect transistor. A portion of the auxiliary structure is removed, where a gap is formed between the first section and a remaining portion of the auxiliary structure. In the gap, a first insulator structure is provided that separates a first source/drain region formed in the first section and a gate electrode formed between the first and the second section, where the second section may include a second source/drain region.
摘要翻译：集成电路的制造方法包括在场效应晶体管的第一部分和第二部分之间提供辅助结构。辅助结构的一部分被去除，其中在第一部分和辅助结构的剩余部分之间形成间隙。在间隙中，提供了分离形成在第一部分中的第一源极/漏极区域和形成在第一和第二部分之间的栅电极的第一绝缘体结构，其中第二部分可以包括第二源极/漏极区域。

32. 发明授权

US07410864B2 Trench and a trench capacitor and method for forming the same 失效
标题翻译：沟槽和沟槽电容器及其形成方法
公开(公告)号：US07410864B2
公开(公告)日：2008-08-12
申请号：US11108154
申请日：2005-04-15
申请人： Dietmar Temmler
发明人： Dietmar Temmler
IPC分类号： H01L21/8242
CPC分类号： H01L27/1087 , H01L27/10829 , H01L27/10864 , H01L27/10894 , H01L27/10897 , H01L29/66181
摘要： A method for fabricating a trench includes providing a semiconductor substrate made of a semiconductor material. A trench is etched into a surface of the semiconductor substrate such that a trench wall is produced. At least one layer is provided on the trench wall. This step is performed in such a way that the topmost layer provided on the trench wall is constructed from a sealing material. A selective epitaxy method is carried out in such a way that a monocrystalline semiconductor layer is formed on the surface of the semiconductor substrate and preferably no semiconductor material grows directly on the sealing material. A partial trench is etched in a surface of the epitaxially grown semiconductor layer. This step is performed in such a way that at least part of the layer made of the sealing material is uncovered. An uncovered part of the layer made of the sealing material is then removed.
摘要翻译：制造沟槽的方法包括提供由半导体材料制成的半导体衬底。将沟槽蚀刻到半导体衬底的表面中，使得产生沟槽壁。在沟槽壁上设置至少一层。该步骤以使得设置在沟槽壁上的最上层由密封材料构成的方式进行。以这样的方式进行选择性外延法，即在半导体衬底的表面上形成单晶半导体层，并且优选地，半导体材料不直接在密封材料上生长。在外延生长的半导体层的表面中蚀刻部分沟槽。该步骤以使得由密封材料制成的层的至少一部分未被覆盖的方式进行。然后除去由密封材料制成的层的未覆盖部分。

33. 发明授权

US07368385B2 Method for producing a structure on the surface of a substrate 有权
标题翻译：在基板表面上制造结构的方法
公开(公告)号：US07368385B2
公开(公告)日：2008-05-06
申请号：US11182066
申请日：2005-07-15
申请人： Christoph Nölscher , Dietmar Temmler , Peter Moll
发明人： Christoph Nölscher , Dietmar Temmler , Peter Moll
IPC分类号： H01L21/311
CPC分类号： H01L21/31144 , H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088
摘要： The present invention relates to a method for producing a structure serving as an etching mask on the surface of a substrate. In this case, a first method involves forming a first partial structure on the surface of the substrate, which has structure elements that are arranged regularly and are spaced apart essentially identically. A second method involves forming spacers on the surface of the substrate, which adjoin sidewalls of the structure elements of the first partial structure, cutouts being provided between the spacers. A third method step involves introducing filling material into the cutouts between the spacers, a surface of the spacers being uncovered. A fourth method step involves removing the spacers in order to form a second partial structure having the filling material and having structure elements that are arranged regularly and are spaced apart essentially identically. The structure to be produced is composed of the first partial structure and the second partial structure.
摘要翻译：本发明涉及一种在基板表面上制造用作蚀刻掩模的结构的方法。在这种情况下，第一种方法包括在衬底的表面上形成第一部分结构，其具有规则地排列并且基本相同地间隔开的结构元件。第二种方法包括在衬底的表面上形成间隔物，其邻接第一部分结构的结构元件的侧壁，在间隔物之间提供切口。第三种方法步骤包括将填充材料引入间隔件之间的切口中，间隔件的表面未被覆盖。第四种方法步骤包括去除间隔物，以便形成具有填充材料的第二部分结构，并具有规则排列的结构元件并且基本相同地间隔开。要制造的结构由第一部分结构和第二部分结构组成。

34. 发明申请

US20070134871A1 Memory chip having a memory cell with low-temperature layers in the memory trench and fabrication method 审中-公开
标题翻译：存储芯片具有存储槽中具有低温层的存储单元和制造方法
公开(公告)号：US20070134871A1
公开(公告)日：2007-06-14
申请号：US11702162
申请日：2007-02-05
申请人： Dietmar Temmler , Martin Gutsche , Martin Popp , Harald Seidl
发明人： Dietmar Temmler , Martin Gutsche , Martin Popp , Harald Seidl
IPC分类号： H01L21/8242
CPC分类号： H01L27/10867 , H01L27/10832 , H01L27/10864
摘要： Memory cells having trench capacitors, the trench capacitor being at least partially filled with a material which could not withstand high-temperature processes used during the fabrication of a memory chip without impairment of its electrical parameters. What is essential to the invention is that the material of the trench capacitor is introduced into the trench after the high-temperature processes. The method according to the invention makes it possible to use dielectric layers having large dielectric constants and electrode layers made of metallic material. The electrical properties of the trench capacitor are thus improved in comparison with known trench capacitors.
摘要翻译：具有沟槽电容器的存储单元，沟槽电容器至少部分地填充有不能承受在制造存储器芯片期间使用的高温处理而不损害其电参数的材料。本发明的重要内容是在高温处理之后将沟槽电容器的材料引入沟槽。根据本发明的方法使得可以使用具有大介电常数的电介质层和由金属材料制成的电极层。与已知的沟槽电容器相比，沟槽电容器的电性能得到改善。

35. 发明授权

US07012289B2 Memory cell having a thin insulation collar and memory module 失效
标题翻译：存储单元具有薄的绝缘环和存储器模块
公开(公告)号：US07012289B2
公开(公告)日：2006-03-14
申请号：US10348148
申请日：2003-01-21
申请人： Martin Popp , Dietmar Temmler
发明人： Martin Popp , Dietmar Temmler
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L27/10867 , H01L27/10832
摘要： A memory cell has a trench capacitor, in which the area required over a terminal area of the trench capacitor is advantageously reduced by the formation of a particularly thin insulation collar. The insulation collar is reduced to such an extent that although a lateral current is prevented, the formation of a parasitic field-effect transistor is permitted. In order that, however, overall no current flows via the parasitic field-effect transistor, a second parasitic field-effect transistor is disposed in a manner connected in series, but is not turned on. This is achieved by the formation of a thicker second insulation collar that isolates the filling of the trench capacitor from the surrounding substrate.
摘要翻译：存储单元具有沟槽电容器，其中通过形成特别薄的绝缘套圈有利地减小了沟槽电容器的端子区域所需的面积。绝缘套环被减小至尽可能防止横向电流的程度，允许形成寄生场效应晶体管。然而，为了使整个无电流通过寄生场效应晶体管流过，第二寄生场效应晶体管以串联连接的方式设置，但不导通。这是通过形成较厚的第二绝缘套圈来实现的，其将沟槽电容器的填充与周围衬底隔离。

36. 发明申请

US20060024621A1 Method of producing a structure on the surface of a substrate 有权
标题翻译：在基板的表面上制造结构的方法
公开(公告)号：US20060024621A1
公开(公告)日：2006-02-02
申请号：US11182066
申请日：2005-07-15
申请人： Christoph Nölscher , Dietmar Temmler , Peter Moll
发明人： Christoph Nölscher , Dietmar Temmler , Peter Moll
IPC分类号： G03F7/00
CPC分类号： H01L21/31144 , H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088
摘要： The present invention relates to a method for producing a structure serving as an etching mask on the surface of a substrate. In this case, a first method involves forming a first partial structure on the surface of the substrate, which has structure elements that are arranged regularly and are spaced apart essentially identically. A second method involves forming spacers on the surface of the substrate, which adjoin sidewalls of the structure elements of the first partial structure, cutouts being provided between the spacers. A third method step involves introducing filling material into the cutouts between the spacers, a surface of the spacers being uncovered. A fourth method step involves removing the spacers in order to form a second partial structure having the filling material and having structure elements that are arranged regularly and are spaced apart essentially identically. The structure to be produced is composed of the first partial structure and the second partial structure.
摘要翻译：本发明涉及一种在基板表面上制造用作蚀刻掩模的结构的方法。在这种情况下，第一种方法包括在衬底的表面上形成第一部分结构，其具有规则地排列并且基本相同地间隔开的结构元件。第二种方法包括在衬底的表面上形成间隔物，其邻接第一部分结构的结构元件的侧壁，在间隔物之间提供切口。第三种方法步骤包括将填充材料引入间隔件之间的切口中，间隔件的表面未被覆盖。第四种方法步骤包括去除间隔物，以便形成具有填充材料的第二部分结构，并具有规则排列的结构元件并且基本相同地间隔开。要制造的结构由第一部分结构和第二部分结构组成。

37. 发明授权

US06924225B2 Method for producing an electrically conductive contact 失效
公开(公告)号：US06924225B2
公开(公告)日：2005-08-02
申请号：US10893561
申请日：2004-07-16
申请人： Martin Popp , Dietmar Temmler
发明人： Martin Popp , Dietmar Temmler
IPC分类号： H01L21/60 , H01L21/768 , H01L21/8234 , H01L21/8242
CPC分类号： H01L21/76897 , H01L21/76807 , H01L21/76838 , H01L21/823425 , H01L21/823475 , H01L2221/1026
摘要： An electrically conductive contact can be used to connect an integrated component to an interconnect. A sacrificial layer is deposited on a liner and planarized until a surface of the integrated component is uncovered. The sacrificial layer is patterned to define the later contacts. The layer is covered in a partial region above contact connection regions. An interlevel insulator is deposited and patterned, so that the sacrificial layer can then be stripped out from the partial region. After the removal of the liner, a conductive layer is deposited into the cavity formed as a result of the stripping-out process on the uncovered contact connection regions and optionally into trenches formed at the outset within the interlevel insulator.

38. 发明申请

US20050093049A1 Method for fabricating a hole trench storage capacitor in a semiconductor substrate, and hole trench storage capacitor 失效
标题翻译：在半导体衬底中制造空穴沟槽存储电容器的方法和空穴沟槽存储电容器
公开(公告)号：US20050093049A1
公开(公告)日：2005-05-05
申请号：US10948574
申请日：2004-09-24
申请人： Srivatsa Kundalgurki , Dietmar Temmler , Hans-Peter Moll , Joerg Wiedemann
发明人： Srivatsa Kundalgurki , Dietmar Temmler , Hans-Peter Moll , Joerg Wiedemann
IPC分类号： H01L21/20 , H01L21/8242 , H01L29/76
CPC分类号： H01L27/10861 , H01L27/10867 , H01L27/10873
摘要： To fabricate a hole trench storage capacitor having an inner electrode, which is formed in a hole trench, and an outer electrode, which is formed in an electrode section, surrounding the hole trench in a lower section, of the semiconductor substrate, the inner electrode is continued above the substrate surface of the semiconductor substrate. Then, an additional layer, which widens the semiconductor substrate, is grown onto the substrate surface by an epitaxy process. A transition surface for contact-connection of the inner electrode and at least a part of an insulation collar is formed above the original substrate surface, thereby increasing the size of a surface area of the hole trench storage capacitor, which can be used for charge storage, while using the same aspect ratio for an etch used to form the hole trench.
摘要翻译：为了制造在半导体衬底中形成有形成在孔沟中的内部电极和在电极部中形成的包围下部的孔沟的外部电极的空穴沟槽存储电容器，内部电极继续在半导体衬底的衬底表面上方。然后，通过外延工艺将扩大半导体衬底的附加层生长到衬底表面上。在原始基板表面上形成内电极和绝缘套环的至少一部分的接触连接的过渡表面，从而增加可用于电荷存储的空穴沟槽存储电容器的表面积的尺寸而对于用于形成孔沟槽的蚀刻使用相同的纵横比。

39. 发明授权

US06841443B2 Method for fabricating a deep trench capacitor for dynamic memory cells 有权
标题翻译：用于制造用于动态存储单元的深沟槽电容器的方法
公开(公告)号：US06841443B2
公开(公告)日：2005-01-11
申请号：US10465488
申请日：2003-06-19
申请人： Dietmar Temmler , Anke Krasemann
发明人： Dietmar Temmler , Anke Krasemann
IPC分类号： H01L21/8242
CPC分类号： H01L27/1087
摘要： A method for fabricating a deep trench capacitor for dynamic memory cells in which a trench is etched into the depth of a semiconductor substrate, and wherein the interior of the trench is provided with a doping and a dielectric and is filled with a conductive material as an inner electrode. The inner electrode and the dielectric are etched back within a collar region, and a collar is formed using a collar process comprising a collar oxide deposition and etching back of the collar oxide on the substrate surface and in the trench as far as the inner electrode, after which the inner electrode is completed by further steps of depositing and etching back conductive layers. Prior to the doping a masking layer is applied to the collar region of the trench, and this masking layer is removed again before the collar process. Before the dielectric is applied the surface of the lower regions of the trench outside the collar region a layer of grains of conductive material is applied.
摘要翻译：一种用于制造用于动态存储单元的深沟槽电容器的方法，其中沟槽被蚀刻到半导体衬底的深度中，并且其中沟槽的内部设置有掺杂和电介质，并且填充有导电材料作为内电极将内部电极和电介质在套环区域内回蚀刻，并且使用包括轴环氧化物沉积的套环工艺形成套环，并且在衬底表面上和沟槽中的衬里氧化物的背面至内部电极，之后通过进一步沉积和蚀刻导电层来完成内部电极。在掺杂之前，将掩模层施加到沟槽的凸缘区域，并且在套环过程之前再次去除该掩蔽层。在电介质被施加之前，沟槽的下部区域的表面在套环区域外部施加一层导电材料颗粒。

40. 发明授权

US06821863B2 Method for producing a cavity in a monocrystalline silicon substrate and a semiconductor component having a cavity in a monocrystalline silicon substrate with an epitaxial covering layer 失效
标题翻译：在单晶硅衬底中制造空腔的方法和在具有外延层的单晶硅衬底中具有空腔的半导体组件
公开(公告)号：US06821863B2
公开(公告)日：2004-11-23
申请号：US10348150
申请日：2003-01-21
申请人： Martin Popp , Dietmar Temmler , Kristin Schupke , Uwe Schilling , Kerstin Pomplun
发明人： Martin Popp , Dietmar Temmler , Kristin Schupke , Uwe Schilling , Kerstin Pomplun
IPC分类号： H01L2176
CPC分类号： H01L27/10861 , H01L27/10832 , H01L27/1087
摘要： A semiconductor component has a cavity formed in a monocrystalline silicon substrate. The wall of the cavity is covered by a cover layer, at least in an upper collar region, and a covering layer is then applied to the surface of the silicon substrate using a selective epitaxial growth method. The cavity is thereby covered in the process. The method is physically simple and can be carried out cost-effectively. In particular, the described method can be used in order to cover a trench prior to high-temperature processes during the production of a DRAM memory, and to open the trench once again after the high-temperature processes, in order to provide a trench capacitor.
摘要翻译：半导体元件具有形成在单晶硅衬底中的空腔。至少在上衣领区中，空腔的壁被覆盖层覆盖，然后使用选择性外延生长法将覆盖层施加到硅衬底的表面。因此在该过程中覆盖空腔。该方法物理上简单，可以经济有效地进行。特别地，可以使用所描述的方法来在DRAM存储器的制造期间在高温处理之前覆盖沟槽，并且在高温处理之后再次打开沟槽，以便提供沟槽电容器。

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