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31. 发明授权

US6080656A Method for forming a self-aligned copper structure with improved planarity 有权
标题翻译：用于形成具有改善的平面度的自对准铜结构的方法
公开(公告)号：US6080656A
公开(公告)日：2000-06-27
申请号：US387436
申请日：1999-09-01
申请人： Tsu Shih , Ying-Ho Chen , Jih-Churng Twu , Syun-Ming Jang
发明人： Tsu Shih , Ying-Ho Chen , Jih-Churng Twu , Syun-Ming Jang
IPC分类号： H01L21/768 , H01L21/4763 , H01L21/44
CPC分类号： H01L21/7684 , H01L21/76879
摘要： A method for forming a copper structure with reduced dishing, using a self-aligned copper electroplating process. The process begins by providing a semiconductor structure having a dielectric layer thereover, wherein the dielectric layer has a trench therein. A barrier layer is formed over the dielectric layer, a seed layer is formed on the barrier layer, and an insulating layer is formed on the seed layer. The insulating layer is patterned so as to expose the seed layer on the bottom and sidewalls of the trench, preferably using the trench photo mask. A copper layer is selectively electroplated onto the exposed seed layer on the bottom and sidewalls of the trench, while the insulating layer prevents copper deposition outside of the trench. The copper layer, the insulating layer, and the seed layer are planarized, stopping at the dielectric layer. Because of the self-aligned copper geometry, the copper suffers reduced dishing.
摘要翻译：一种使用自对准铜电镀工艺形成具有减少凹陷的铜结构的方法。该过程开始于提供其上具有介电层的半导体结构，其中介电层在其中具有沟槽。在电介质层上形成阻挡层，在阻挡层上形成种子层，在籽晶层上形成绝缘层。图案化绝缘层，以便优选地使用沟槽光掩模来暴露沟槽的底部和侧壁上的晶种层。选择性地将铜层电镀到沟槽的底部和侧壁上的暴露种子层上，同时绝缘层防止在该沟槽外部的铜沉积。铜层，绝缘层和种子层被平坦化，停留在电介质层。由于自对准的铜几何形状，铜损坏了凹陷。

32. 发明授权

US5817567A Shallow trench isolation method 失效
标题翻译：浅沟隔离法
公开(公告)号：US5817567A
公开(公告)日：1998-10-06
申请号：US826710
申请日：1997-04-07
申请人： Syun-Ming Jang , Ying-Ho Chen , Chen-Hua Yu
发明人： Syun-Ming Jang , Ying-Ho Chen , Chen-Hua Yu
IPC分类号： H01L21/762 , H01L21/76
CPC分类号： H01L21/76224 , Y10S148/05
摘要： An improved method for implementing shallow trench isolation in integrated circuits is described. The method begins with the formation of trenches, through patterning and etching. These trenches are then filled with a conformal layer of silicon oxide. This is followed by overcoating with a layer of a hard material such as silicon nitride or boron nitride. Next, chemical-mechanical polishing is used to remove the hard layer everywhere except where it has filled the depressions that overlie the trenches. Then, a non-selective etch is used to remove the remaining hard layer material as well as some of the silicon oxide, so that a planar surface is maintained. Finally, chemical-mechanical polishing is used a second time to remove excess silicon oxide from above the trenches' surface.
摘要翻译：描述了一种用于在集成电路中实现浅沟槽隔离的改进方法。该方法开始于通过图案化和蚀刻形成沟槽。然后用保形层的氧化硅填充这些沟槽。随后用一层硬质材料如氮化硅或氮化硼涂覆。接下来，使用化学机械抛光来去除硬质层，除了填充了覆盖在沟槽上的凹陷之外。然后，使用非选择性蚀刻来除去剩余的硬质层材料以及一些氧化硅，从而保持平坦的表面。最后，第二次使用化学机械抛光从沟槽表面上方除去过量的氧化硅。

33. 发明授权

US5741740A Shallow trench isolation (STI) method employing gap filling silicon oxide dielectric layer 失效
标题翻译：浅沟槽隔离（STI）方法采用间隙填充氧化硅介电层
公开(公告)号：US5741740A
公开(公告)日：1998-04-21
申请号：US873836
申请日：1997-06-12
申请人： Syun-Ming Jang , Ying-Ho Chen , Chen-Hua Yu
发明人： Syun-Ming Jang , Ying-Ho Chen , Chen-Hua Yu
IPC分类号： H01L21/316 , H01L21/762 , H01L21/76
CPC分类号： H01L21/02164 , H01L21/022 , H01L21/02211 , H01L21/02238 , H01L21/02255 , H01L21/02271 , H01L21/02274 , H01L21/0234 , H01L21/31612 , H01L21/76224 , Y10S148/05
摘要： A method for filling a trench within a silicon substrate. There is first provided a silicon substrate having a trench formed therein. There is then oxidized thermally the silicon substrate to form within the trench a thermal silicon oxide trench liner layer. There is then formed upon the thermal silicon oxide trench liner layer a conformal silicon oxide intermediate layer formed through a plasma enhanced chemical vapor deposition (PECVD) method employing a silane silicon source material. Finally, there is then formed upon the conformal silicon oxide intermediate layer a gap filling silicon oxide trench fill layer through an ozone assisted sub-atmospheric pressure thermal chemical vapor deposition (SACVD) method employing an ozone oxidant and a tetra-ethyl-ortho-silicate (TEOS) silicon source material. To provide improved properties of the gap filling silicon oxide trench fill layer the thermal silicon oxide trench liner layer may be treated with a nitrogen containing plasma prior to forming the conformal silicon oxide intermediate layer thereupon.
摘要翻译：一种用于在硅衬底内填充沟槽的方法。首先提供其中形成有沟槽的硅衬底。然后将硅衬底热氧化以在沟槽内形成热氧化硅沟槽衬垫层。然后在热氧化硅沟槽衬垫层上形成通过使用硅烷硅源材料的等离子体增强化学气相沉积（PECVD）方法形成的共形氧化硅中间层。最后，通过使用臭氧氧化剂和四乙基原硅酸盐的臭氧辅助亚大气压热化学气相沉积（SACVD）方法，在保形氧化硅中间层上形成填充氧化硅沟槽填充层的间隙（TEOS）硅源材料。为了提供间隙填充氧化硅沟槽填充层的改进性能，可以在形成其之间的共形氧化硅中间层之前用含氮等离子体处理热氧化硅沟槽衬里层。

34. 发明授权

US07297632B2 Scratch reduction for chemical mechanical polishing 有权
标题翻译：化学机械抛光刮刮
公开(公告)号：US07297632B2
公开(公告)日：2007-11-20
申请号：US11082517
申请日：2005-03-17
申请人： Chuang-Ping Hou , Syun-Ming Jang , Ying-Ho Chen , Chu-Yun Fu , Tung-Ching Tseng
发明人： Chuang-Ping Hou , Syun-Ming Jang , Ying-Ho Chen , Chu-Yun Fu , Tung-Ching Tseng
IPC分类号： H01L21/311
CPC分类号： H01L21/31053
摘要： A method for forming a semiconductor device utilizing a chemical-mechanical polishing (CMP) process is provided. In one example, the method includes sequentially performing a first CMP process for removing a first portion of an oxide surface of a semiconductor device using a high selectivity slurry (HSS) and a first polish pad, interrupting the first CMP process, cleaning the semiconductor device and the first polish pad, and performing a second CMP process for removing a second portion of the oxide surface.
摘要翻译：提供了一种利用化学机械抛光（CMP）工艺形成半导体器件的方法。在一个示例中，该方法包括依次执行第一CMP处理，以使用高选择性浆料（HSS）和第一抛光垫去除半导体器件的氧化物表面的第一部分，中断第一CMP工艺，清洁半导体器件和第一抛光垫，并且执行用于去除氧化物表面的第二部分的第二CMP工艺。

35. 发明授权

US06924238B2 Edge peeling improvement of low-k dielectric materials stack by adjusting EBR resistance 有权
标题翻译：通过调整EBR电阻来降低低k电介质材料的边缘剥离
公开(公告)号：US06924238B2
公开(公告)日：2005-08-02
申请号：US10455037
申请日：2003-06-05
申请人： Tzu-Jen Chou , Syun-Ming Jang , Ying-Ho Chen , Shen-Nan Lee
发明人： Tzu-Jen Chou , Syun-Ming Jang , Ying-Ho Chen , Shen-Nan Lee
IPC分类号： H01L21/3105 , H01L21/311 , H01L21/312 , H01L21/316 , H01L21/768
CPC分类号： H01L21/31053 , H01L21/31056 , H01L21/31116 , H01L21/76835 , H01L21/7684
摘要： A new method and structure is provided for the polishing of the surface of a layer of low-k dielectric material. Low-k dielectric material of low density and relatively high porosity is combined with low-k dielectric material of high density and low porosity whereby the latter high density layer is, prior to polishing of the combined layers, deposited over the former low density layer. Polishing of the combined layers removes flaking of the polished low-k layers of dielectric. This method can further be extended by forming conductive interconnects through the layers of dielectric, prior to the layer of dielectric.
摘要翻译：提供了一种用于抛光低k电介质材料层的表面的新方法和结构。低密度和相对高孔隙率的低k电介质材料与高密度和低孔隙率的低k电介质材料组合，由此后者的高密度层在组合层的抛光之前沉积在前者的低密度层上。组合层的抛光消除抛光的低k层电介质的剥落。在电介质层之前，可以通过在电介质层之间形成导电互连来进一步延长该方法。

36. 发明申请

US20050090096A1 Method of forming a contact on a silicon-on-insulator wafer 有权
标题翻译：在绝缘体上硅晶片上形成接触的方法
公开(公告)号：US20050090096A1
公开(公告)日：2005-04-28
申请号：US10691019
申请日：2003-10-22
申请人： Chuan-Ping Hou , Syun-Ming Jang , Ying-Ho Chen , Tung-Ching Tseng
发明人： Chuan-Ping Hou , Syun-Ming Jang , Ying-Ho Chen , Tung-Ching Tseng
IPC分类号： H01L21/00 , H01L21/306 , H01L21/44 , H01L21/4763 , H01L21/74 , H01L21/762
CPC分类号： H01L21/743 , H01L21/76283 , H01L21/76286
摘要： In a method of the present invention, an intermediate structure having a top surface is provided. An isolation trench is formed is the intermediate structure. Isolation material is deposited over the intermediate structure. The isolation material fills the isolation trench. Excess isolation material extends above the top surface of the intermediate structure. Part of the excess isolation material is removed until there is a predetermined thickness of isolation material remaining on the top surface of the intermediate structure. A contact opening is formed in the isolation material at the isolation trench. The contact opening extends through at least part of the intermediate structure. Contact material is deposited over the isolation material. The contact material fills the contact opening. Excess contact material, if any, that extends above the isolation material is removed. The excess isolation material is removed at least until the top surface of the intermediate structure is reached.
摘要翻译：在本发明的方法中，提供了具有顶表面的中间结构。形成隔离沟是中间结构。隔离材料沉积在中间结构上。隔离材料填充隔离沟槽。过多的隔离材料在中间结构的顶表面上方延伸。去除部分过量隔离材料，直到在中间结构的顶表面上剩余预定厚度的隔离材料。在隔离沟槽处的隔离材料中形成接触开口。接触开口延伸穿过中间结构的至少一部分。接触材料沉积在隔离材料上。接触材料填充接触开口。除去在隔离材料上方延伸的过量接触材料（如果有的话）。至少直到达到中间结构的顶表面去除多余隔离材料。

37. 发明授权

US06869858B2 Shallow trench isolation planarized by wet etchback and chemical mechanical polishing 失效
标题翻译：通过湿回蚀和化学机械抛光平坦化的浅沟槽隔离
公开(公告)号：US06869858B2
公开(公告)日：2005-03-22
申请号：US10426529
申请日：2003-04-30
申请人： Syun-Ming Jang , Ying-Ho Chen
发明人： Syun-Ming Jang , Ying-Ho Chen
IPC分类号： H01L21/3105 , H01L21/762 , H01L21/76
CPC分类号： H01L21/76245 , H01L21/31053
摘要： A method for forming a series of patterned planarized aperture fill layers within a series of apertures within a topographic substrate layer employed within a microelectronics fabrication. There is first provided a topographic substrate layer employed within a microelectronics fabrication, where the topographic substrate layer comprises a series of mesas of substantially equivalent height but of differing widths and the series of mesas is separated by a series of apertures. There is then formed upon the topographic substrate layer a blanket aperture fill layer. The blanket aperture fill layer is formed employing a simultaneous deposition and sputter method. The blanket aperture fill layer fills the series of apertures to a planarizing thickness at least as high as the height of the mesas while simultaneously forming a series of protrusions of the blanket aperture fill layer corresponding with the tops of the series of mesas, where the thickness of a protrusion of the blanket aperture fill layer over a narrow mesa is less than the thickness of a protrusion of the blanket aperture fill layer over a wide mesa. The simultaneous deposition and sputter method employs a deposition rate:sputter rate ratio which provides sufficient thickness of the blanket aperture fill layer over the narrow mesa to insure coverage of the edges of the mesas. A blanket etching process is employed to remove a portion of the blanket aperture fill layer so that chemical mechanical polish (CMP) planarizing of the residual blanket aperture fill layer forms the series of patterned planarized aperture fill layers within the series of apertures.
摘要翻译：一种用于在微电子学制造中使用的地形衬底层内的一系列孔内形成一系列图案化的平坦化孔填充层的方法。首先提供了在微电子制造中使用的地形衬底层，其中地形衬底层包括基本上等同的高度但具有不同宽度的一系列台面，并且一系列台面由一系列孔分隔开。然后在地形衬底层上形成橡皮布孔填充层。使用同时沉积和溅射方法形成橡皮布孔填充层。橡皮布孔填充层将一系列孔填充至至少与台面高度相同的平坦化厚度，同时形成与一系列台面的顶部相对应的橡皮布孔填充层的一系列突起，其中厚度在窄的台面上的橡皮布孔填充层的突起的厚度小于宽台面上的橡皮布孔填充层的突起的厚度。同时沉积和溅射方法采用沉积速率：溅射速率比，其提供在窄台面上的覆盖孔填充层的足够厚度，以确保台面边缘的覆盖。采用毯式蚀刻工艺来去除橡皮布孔填充层的一部分，使得残余橡皮布孔填充层的化学机械抛光（CMP）平面化在一系列孔内形成一系列图案化的平坦化孔填充层。

38. 发明授权

US06620034B2 Way to remove Cu line damage after Cu CMP 有权
标题翻译： Cu CMP后去除Cu线损伤的方法
公开(公告)号：US06620034B2
公开(公告)日：2003-09-16
申请号：US10043780
申请日：2002-01-14
申请人： Tsu Shih , Jih-Churng Jwu , Ying-Ho Chen , Syun-Ming Jang
发明人： Tsu Shih , Jih-Churng Jwu , Ying-Ho Chen , Syun-Ming Jang
IPC分类号： B24B100
CPC分类号： B24B37/12 , B24B37/015 , B24B55/02
摘要： The invention provides a method and an apparatus that prevent the accumulation of copper ions during CMP of copper lines by performing the CMP process at low temperatures and by maintaining this low temperature during the CMP process by adding a slurry that functions as a corrosion inhibitor.
摘要翻译：本发明提供了一种方法和装置，其通过在低温下进行CMP工艺，并且通过添加用作腐蚀抑制剂的浆料在CMP工艺期间保持该低温来防止铜线的CMP中的铜离子的累积。

39. 发明授权

US06422929B1 Polishing pad for a linear polisher and method for forming 有权
标题翻译：线性抛光机用抛光垫及成型方法
公开(公告)号：US06422929B1
公开(公告)日：2002-07-23
申请号：US09541070
申请日：2000-03-31
申请人： Syun-Ming Jang , Ying-Ho Chen
发明人： Syun-Ming Jang , Ying-Ho Chen
IPC分类号： B24B2100
CPC分类号： B24B37/24 , B24B21/04 , B24B37/26 , B24D18/0063
摘要： A polishing pad for use in a linear polisher, and more specifically, for a linear chemical mechanical polishing apparatus that has improved polishing uniformity is described. The polishing pad is provided with a top surface for engaging a wafer surface to be polished. The top surface has a center portion and two oppositely situated edge portions. The polishing pad is further provided with a multiplicity of voids situated in the top surface of the pad body such that the top surface has a void-to-surface ratio that is greater in the two edge portions than in the center portion of the top surface. The present invention novel polishing pad provides a more uniform polishing across a wafer surface, together with an improved planarity after polishing.
摘要翻译：描述了一种用于线性抛光机的抛光垫，更具体地说，涉及具有改善的抛光均匀性的线性化学机械抛光装置。抛光垫设置有用于接合要抛光的晶片表面的顶表面。顶表面具有中心部分和两个相对设置的边缘部分。抛光垫还设置有位于衬垫主体的顶表面中的多个空隙，使得顶表面在两个边缘部分中的空隙与表面之比大于顶表面的中心部分。本发明的新型抛光垫在晶片表面上提供更均匀的抛光以及抛光后的改进的平面度。

40. 发明授权

US06376377B1 Post chemical mechanical polish (CMP) planarizing substrate cleaning method employing enhanced substrate hydrophilicity 有权
标题翻译：后化学机械抛光（CMP）平面化基板清洗方法采用增强的基板亲水性
公开(公告)号：US06376377B1
公开(公告)日：2002-04-23
申请号：US09541487
申请日：2000-04-03
申请人： Weng Chang , Ying-Ho Chen , Jih-Churng Twu , Syun-Ming Jang
发明人： Weng Chang , Ying-Ho Chen , Jih-Churng Twu , Syun-Ming Jang
IPC分类号： H01L21302
CPC分类号： H01L21/76826 , H01L21/02074 , H01L21/3212 , H01L21/76801 , H01L21/76807 , H01L21/76825 , H01L21/76888
摘要： Within a method for removing from over a substrate a chemical mechanical polish (CMP) residue layer there is first provided a substrate. There is then formed over the substrate: (1) a chemical mechanical polish (CMP) substrate layer having an aperture formed therein; (2) a chemical mechanical polish (CMP) planarized patterned layer formed within the aperture within the chemical mechanical polish (CMP) substrate layer; and (3) a chemical mechanical polish (CMP) residue layer formed upon at least one of the chemical mechanical polish substrate layer and the chemical mechanical polish (CMP) planarized patterned layer, where at least one of the chemical mechanical polish (CMP) substrate layer and the chemical mechanical polish (CMP) planarized patterned layer has a first aqueous contact angle. There is then treated the at least one of the chemical mechanical polish (CMP) substrate layer and the chemical mechanical polish (CMP) planarized patterned layer having the first aqueous contact angle to provide at least one of a hydrophilic chemical mechanical polish (CMP) substrate layer and a hydrophilic chemical mechanical polish (CMP) planarized patterned layer having a second aqueous contact angle less than the first aqueous contact angle. Finally, there is then removed the chemical mechanical polish (CMP) residue layer from the at least one of the hydrophilic chemical mechanical polish (CMP) substrate layer and the hydrophilic chemical mechanical polish (CMP) planarized patterned layer with an aqueous cleaner composition.
摘要翻译：在用于从衬底上除去化学机械抛光（CMP）残留层的方法中，首先提供衬底。然后在衬底上形成：（1）其中形成有孔的化学机械抛光（CMP）衬底层; （2）化学机械抛光（CMP）平面化图案层，其形成在化学机械抛光（CMP）衬底层内的孔内; 化学机械抛光（CMP）残留层形成在至少一个化学机械抛光衬底层和化学机械抛光（CMP）平面化图案层上，其中化学机械抛光（CMP）衬底层和化学机械抛光（CMP）平面化图案层具有第一水接触角。然后，处理具有第一水接触角的化学机械抛光（CMP）衬底层和化学机械抛光（CMP）平坦化图案化层中的至少一个以提供亲水化学机械抛光（CMP）衬底中的至少一个层和亲水化学机械抛光（CMP）平面化图案层，其具有小于第一水接触角的第二水接触角。最后，用水性清洁剂组合物从亲水化学机械抛光（CMP）衬底层和亲水化学机械抛光（CMP）平坦化图案化层中的至少一个去除化学机械抛光（CMP）残留层。

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