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31. 发明授权

US06693345B2 Semiconductor wafer assemblies comprising photoresist over silicon nitride materials 有权
公开(公告)号：US06693345B2
公开(公告)日：2004-02-17
申请号：US09995372
申请日：2001-11-26
申请人： John T. Moore , Scott Jeffrey DeBoer , Mark Fischer , J. Brett Rolfson , Annette L. Martin , Ardavan Niroomand
发明人： John T. Moore , Scott Jeffrey DeBoer , Mark Fischer , J. Brett Rolfson , Annette L. Martin , Ardavan Niroomand
IPC分类号： H01L2358
CPC分类号： H01L21/0217 , G03F7/091 , H01L21/022 , H01L21/02271 , H01L21/02304 , H01L21/02362 , H01L21/0274 , H01L21/0332 , H01L21/31144 , H01L21/312 , H01L21/3185
摘要： In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer. In another aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; c) forming a photoresist over and against the barrier layer; d) exposing the photoresist to a patterned beam of light to render at least one portion of the photoresist more soluble in a solvent than an other portion, the barrier layer being an antireflective surface that absorbs light passing through the photoresist; and e) exposing the photoresist to the solvent to remove the at least one portion while leaving the other portion over the barrier layer. In yet another aspect, the invention includes a semiconductor wafer assembly, comprising: a) a silicon nitride material, the material having a surface; b) a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) a photoresist over and against the barrier layer.

32. 发明授权

US06664171B2 Method of alloying a semiconductor device 有权
公开(公告)号：US06664171B2
公开(公告)日：2003-12-16
申请号：US10304194
申请日：2002-11-25
申请人： Fernando Gonzalez , Thomas A. Figura , J. Brett Rolfson
发明人： Fernando Gonzalez , Thomas A. Figura , J. Brett Rolfson
IPC分类号： H01L21324
CPC分类号： H01L28/40 , H01L21/324 , H01L23/3171 , H01L2924/0002 , H01L2924/19041 , H01L2924/00
摘要： A method for alloying a semiconductor substrate upon which wordlines enclosed in spacers have been formed, with the substrate exposed between the wordlines. A thin sealing layer is deposited over the substrate and the wordlines, the sealing layer helping to maintain the alloy in said substrate. The alloying material employed in the substrate is hydrogen and optionally monatomic hydrogen. Alloying the substrate with monatomic hydrogen may also be done after deposition of a metal layer, or at other process steps as desired.

33. 发明授权

US06486074B1 Methods of masking and etching a semiconductor substrate, and ion implant lithography methods of processing a semiconductor substrate 有权
标题翻译：掩模和蚀刻半导体衬底的方法以及处理半导体衬底的离子注入光刻方法
公开(公告)号：US06486074B1
公开(公告)日：2002-11-26
申请号：US09614359
申请日：2000-07-12
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： H01L21302
CPC分类号： H01L21/31133 , H01L21/0273
摘要： A method of masking and etching a semiconductor substrate includes forming a layer to be etched over a semiconductor substrate. An imaging layer is formed over the layer to be etched. Selected regions of the imaging layer are removed to leave a pattern of openings extending only partially into the imaging layer. After the removing, the layer to be etched is etched using the imaging layer as an etch mask. In one implementation, an ion implant lithography method of processing a semiconductor includes forming a layer to be etched over a semiconductor substrate. An imaging layer of a selected thickness is formed over the layer to be etched. Selected regions of the imaging layer are ion implanted to change solvent solubility of implanted regions versus non-implanted regions of the imaging layer, with the selected regions not extending entirely through the imaging layer thickness. The ion implanted regions of the imaging layer are removed to leave a pattern of openings extending only partially into the imaging layer. After the removing, the layer to be etched is etched using the imaging layer as an etch mask.
摘要翻译：掩模和蚀刻半导体衬底的方法包括在半导体衬底上形成待蚀刻的层。在待蚀刻的层上形成成像层。去除成像层的选定区域以留下仅部分地延伸到成像层中的开口图案。在去除之后，使用成像层作为蚀刻掩模蚀刻待蚀刻的层。在一个实施方案中，处理半导体的离子注入光刻方法包括在半导体衬底上形成待蚀刻的层。在待蚀刻层上形成所选厚度的成像层。成像层的选定区域被离子注入以改变注入区域对成像层的非注入区域的溶剂溶解度，其中所选择的区域不完全延伸穿过成像层厚度。去除成像层的离子注入区域以留下仅部分地延伸到成像层中的开口图案。在去除之后，使用成像层作为蚀刻掩模蚀刻待蚀刻的层。

34. 发明授权

US06469436B1 Radiation shielding for field emitters 失效
标题翻译：场发射器的辐射屏蔽
公开(公告)号：US06469436B1
公开(公告)日：2002-10-22
申请号：US09483713
申请日：2000-01-14
申请人： Terry N. Williams , J. Brett Rolfson
发明人： Terry N. Williams , J. Brett Rolfson
IPC分类号： H01J1304
CPC分类号： H01J3/022 , H01J31/127 , H01J2201/02
摘要： Structures and methods are provided for shielding field emitter devices from radiation. In one exemplary embodiment, a shielding layer inhibits radiation from degrading field emitter devices while exerting a predetermined force upon the field emitter devices so as to restrain from damaging the structure of the devices or affect the devices' electronic or electrical performance. In another exemplary embodiment, the field emitter under the protection of the shielding layer is capable of sustaining structural equilibrium. In yet another embodiment, the field emitter is capable of sustaining structural elasticity. In a further embodiment, the shielding layer may be comprised of tetratantalum boride; this compound inhibits radiation from degrading field emitter devices while exerting a predetermined force upon the field emitter devices so as to restrain from damaging the structure of the devices or affect the devices electronic or electrical performance; in another embodiment, the field emitter under the protection of the tetratantalum boride layer is capable of sustaining structural equilibrium; in another embodiment, the field emitter is capable of sustaining structural elasticity under the protection of the tetratantalum boride layer.
摘要翻译：提供了用于屏蔽场发射器件免受辐射的结构和方法。在一个示例性实施例中，屏蔽层在对场发射器件施加预定的力的同时抑制辐射降解场致发射器件，以便抑制损坏器件的结构或影响器件的电子或电气性能。在另一示例性实施例中，在屏蔽层保护下的场致发射体能够维持结构平衡。在另一个实施例中，场发射器能够维持结构弹性。在另一实施例中，屏蔽层可以由四硼化钡组成; 该化合物在对场致发射器件施加预定的力的同时，抑制放射源降解场致发射器件，以便限制器件的结构损坏或影响器件的电子或电气性能; 在另一个实施方案中，在四硼化硼层保护下的场致发射体能够维持结构平衡; 在另一个实施例中，场发射体能够在四硼化硼层的保护下维持结构弹性。

35. 发明授权

US06417928B2 Reflectance method for evaluating the surface characteristics of opaque materials 失效
公开(公告)号：US06417928B2
公开(公告)日：2002-07-09
申请号：US09793317
申请日：2001-02-26
申请人： Randhir P. S. Thakur , Michael Nuttall , J. Brett Rolfson , Robert James Burke
发明人： Randhir P. S. Thakur , Michael Nuttall , J. Brett Rolfson , Robert James Burke
IPC分类号： G01B1130
CPC分类号： G01B11/303
摘要： Disclosed is a process for analyzing the surface characteristics of opaque materials. The method comprises in one embodiment the use of a UV reflectometer to build a calibration matrix of data from a set of control samples and correlating a desired surface characteristic such as roughness or surface area to the set of reflectances of the control samples. The UV reflectometer is then used to measure the reflectances of a test sample of unknown surface characteristics. Reflectances are taken at a variety of angles of reflection for a variety of wavelengths, preferably between about 250 nanometers to about 400 nanometers. These reflectances are then compared against the reflectances of the calibration matrix in order to correlate the closest data in the calibration matrix. By so doing, a variety of information is thereby concluded, due to the broad spectrum of wavelengths and angles of reflection used. This includes information pertaining to the roughness and surface area, as well as other surface characteristics such as grain size, grain density, grain shape, and boundary size between the grains. Surface characteristic evaluation can be conducted in-process in a manner which is non-destructive to the test sample. The method is particularly useful for determining the capacitance of highly granular polysilicon test samples used in the construction of capacitator plates in integrated circuit technology, and can be used to determine the existence of flat smooth surfaces, and the presence of prismatic and hemispherical irregularities on flat smooth surfaces.

36. 发明授权

US06352647B1 Mask, and method and apparatus for making it 失效
标题翻译：面具及其制作方法和装置
公开(公告)号：US06352647B1
公开(公告)日：2002-03-05
申请号：US09304965
申请日：1999-05-05
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： B44C122
CPC分类号： C23F1/02 , Y10T428/12715 , Y10T428/31504 , Y10T428/31678
摘要： Methods of making hardmask assemblies or other layered structures, and other masks, include providing an annular seal member between a first surface of layered structure, preferably a hardmask assembly, and a first clamp element, the hardmask assembly comprising at least a hardmask layer; and applying a force between the first clamp element and a second clamp element to hold the hardmask assembly between the annular seal member and the second clamp element. In addition, there are provided methods further comprising etching the first surface of the hardmask assembly within the bounds of an interior space defined by the annular seal member. Methods further comprise etching the substrate layer through the hardmask layer and/or removing the hardmask layer after etching the substrate layer.
摘要翻译：制造硬掩模组件或其它分层结构和其它掩模的方法包括在层状结构的第一表面，优选硬掩模组件和第一夹紧元件之间提供环形密封构件，硬掩模组件至少包括硬掩模层; 以及在所述第一夹紧元件和第二夹紧元件之间施加力以将所述硬掩模组件保持在所述环形密封元件和所述第二夹紧元件之间。此外，提供了进一步包括在由环形密封构件限定的内部空间的界限内蚀刻硬掩模组件的第一表面的方法。方法还包括在蚀刻基底层之后通过硬掩模层蚀刻衬底层和/或去除硬掩模层。

37. 发明授权

US06328803B2 Method and apparatus for controlling rate of pressure change in a vacuum process chamber 失效
标题翻译：用于控制真空处理室中的压力变化率的方法和装置
公开(公告)号：US06328803B2
公开(公告)日：2001-12-11
申请号：US08805018
申请日：1997-02-21
申请人： J. Brett Rolfson , Elton Hochhalter
发明人： J. Brett Rolfson , Elton Hochhalter
IPC分类号： C23C1600
CPC分类号： H01J37/32431 , C23C16/4412 , C23C16/52
摘要： A method, apparatus and system for controlling a rate of pressure change in a vacuum process chamber during pump down and vent up cycles of a vacuum process are provided. The method includes sensing the pressure in the process chamber, and then controlling the rate of pressure change to achieve a desired rate for a particular vacuum process. For a pump down cycle, the apparatus can include a control valve in flow communication with the process chamber and with an evacuation pump. For a vent up cycle, the apparatus can include a control valve in flow communication with the process chamber and with an inert gas supply. With either embodiment controllers can be programmed to adjust positions of the control valves based upon feedback from pressure sensors. The system can include multiple chambers each having an associated pump down and vent up control apparatus configured to match the rates of pressure change between chambers.
摘要翻译：提供了一种用于在抽真空过程的抽空和排气循环期间控制真空处理室中的压力变化率的方法，装置和系统。该方法包括感测处理室中的压力，然后控制压力变化率以达到特定真空过程的期望速率。对于抽气循环，设备可以包括与处理室和抽气泵流动连通的控制阀。对于排气循环，该装置可以包括与处理室流动连通并具有惰性气体供应的控制阀。通过任一实施例，控制器可以被编程以基于来自压力传感器的反馈来调节控制阀的位置。该系统可以包括多个腔室，每个腔室具有相关联的泵送和排气控制装置，其配置成匹配腔室之间的压力变化率。

38. 发明授权

US06327040B2 Reflectance method for evaluating the surface characteristics of opaque materials 失效
标题翻译：用于评估不透明材料表面特性的反射方法
公开(公告)号：US06327040B2
公开(公告)日：2001-12-04
申请号：US09793435
申请日：2001-02-26
申请人： Randhir P. S. Thakur , Michael Nuttall , J. Brett Rolfson , Robert James Burke
发明人： Randhir P. S. Thakur , Michael Nuttall , J. Brett Rolfson , Robert James Burke
IPC分类号： G01B1130
CPC分类号： G01B11/303
摘要： Disclosed is a process for analyzing the surface characteristics of opaque materials. The method comprises in one embodiment the use of a UV reflectometer to build a calibration matrix of data from a set of control samples and correlating a desired surface characteristic such as roughness or surface area to the set of reflectances of the control samples. The UV reflectometer is then used to measure the reflectances of a test sample of unknown surface characteristics. Reflectances are taken at a variety of angles of reflection for a variety of wavelengths, preferably between about 250 nanometers to about 400 nanomneters. These reflectances are then compared against the reflectances of the calibration matrix in order to correlate the closest data in the calibration matrix. By so doing, a variety of information is thereby concluded, due to the broad spectrum of wavelengths and angles of reflection used. This includes information pertaining to the roughness and surface area, as well as other surface characteristics such as grain size, grain density, grain shape, and boundary size between the grains. Surface characteristic evaluation can be conducted in-process in a manner which is non-destructive to the test sample. The method is particularly useful for determining the capacitance of highly granular polysilicon test samples used in the construction of capacitator plates in integrated circuit technology, and can be used to determine the existence of flat smooth surfaces, the presence of prismatic and hemispherical irregularities on flat smooth surfaces, and the size of such irregularities.
摘要翻译：公开了一种用于分析不透明材料的表面特性的方法。该方法在一个实施方案中包括使用UV反射计来构建来自一组对照样品的数据的校准矩阵，并将期望的表面特性如粗糙度或表面积与对照样品的一组反射率相关联。然后使用UV反射计来测量未知表面特性的测试样品的反射率。在各种各样的波长的反射角度下进行反射，优选在约250纳米至约400纳米的范围内。然后将这些反射率与校准矩阵的反射率进行比较，以便将校准矩阵中最接近的数据相关联。通过这样做，由于广泛的波长和使用的反射角度，从而得出各种信息。这包括关于粗糙度和表面积的信息，以及晶粒之间的其他表面特性，例如晶粒尺寸，晶粒密度，晶粒形状和边界尺寸。表面特性评估可以以对测试样品非破坏性的方式进行。该方法特别有助于确定集成电路技术中用于构建电容器板的高度粒状多晶硅测试样品的电容，并且可用于确定平滑光滑表面的存在，平坦光滑的棱镜和半球形不规则的存在表面和这种不规则的大小。

39. 发明授权

US06255228B1 Method for removing contaminants from a semiconductor wafer 有权
公开(公告)号：US06255228B1
公开(公告)日：2001-07-03
申请号：US09584240
申请日：2000-05-30
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： H01L2102
CPC分类号： H01L21/67051 , Y10S438/906
摘要： A method for removing contaminants from a semiconductor wafer having a spin on coating of material. Contaminants are removed by applying a cleaning solution to the periphery, and preferably, the exposed backside of the wafer after the edge bead has been dissolved and removed. The cleaning solution is formulated to react chemically with unwanted coating material residue to form a compound that may be ejected from the periphery of the spinning wafer. Any residual solution or precipitate that is not ejected from the wafer may be rinsed away with water, preferably deoinized water. One exemplary use of this method is the removal of metallic contaminants that may be left on the periphery and backside of a wafer after the formation of ferroelectric film coatings. A cleaning solution comprising a mixture of hydrochloric acid HCl and water H2O or ammonium hydroxide NH4OH and water H2O is applied to the periphery of the spinning wafer. The cleaning solution will react with any residual metal ions to form a metal chloride or metal hydroxide that is ejected from the wafer along with the cleaning solution.

40. 发明授权

US06187690B1 Methods of manufacturing semiconductive wafers and semiconductive material stencil masks 失效
标题翻译：制造半导体晶片和半导体材料丝网掩模的方法
公开(公告)号：US06187690B1
公开(公告)日：2001-02-13
申请号：US09483719
申请日：2000-01-13
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： H01L21302
CPC分类号： H01L21/67075 , H01L21/30604
摘要： In one aspect, the invention includes a method for manufacturing a semiconductive wafer comprising: a) providing a semiconductive material wafer having a front surface and a back surface; b) contacting the front surface with a first fluid; c) contacting the back surface with a second fluid different than the first fluid, at least one of the first and second fluids being configured to etch the semiconductive material of the wafer; at least one of the first and second fluids having a measurable component at a first concentration which is different than any concentration of said measurable component in the other of the first and second fluids; d) etching the semiconductive wafer with the at least one of the first and second fluids configured to etch the semiconductive material; and e) monitoring the measurable component concentration in at least one of the first fluid or the second fluid to ascertain if the etching has formed an opening extending completely through the substrate. In another aspect, the invention includes a method for manufacturing a semiconductive material stencil mask comprising: a) providing a semiconductive material stencil mask substrate having a front surface and a back surface; b) contacting the front surface with an inert solution having a first pH; c) contacting the back surface with an etchant having a second pH, the second pH being different than the first pH; and d) monitoring the pH of at least one of the inert solution or the etchant to ascertain if the etchant has formed an opening extending completely through the substrate.
摘要翻译：一方面，本发明包括一种用于制造半导体晶片的方法，包括：a）提供具有前表面和后表面的半导体材料晶片; b）使前表面与第一流体接触; c）使所述后表面与不同于所述第一流体的第二流体接触，所述第一和第二流体中的至少一个被配置为蚀刻所述晶片的半导体材料; 第一和第二流体中的至少一个具有第一浓度的可测量组分，其不同于第一和第二流体中另一个中的所述可测量组分的任何浓度; d）蚀刻所述半导体晶片，所述第一和第二流体中的至少一个配置成蚀刻所述半导体材料; 以及e）监测所述第一流体或第二流体中的至少一个中的可测量的组分浓度，以确定蚀刻是否已经形成完全延伸穿过基底的开口。另一方面，本发明包括一种用于制造半导体材料丝网掩模的方法，包括：a）提供具有前表面和后表面的半导体材料模板掩模基板; b）使前表面与具有第一pH的惰性溶液接触; c）使所述背表面与具有第二pH的蚀刻剂接触，所述第二pH不同于所述第一pH; 和d）监测惰性溶液或蚀刻剂中的至少一种的pH值，以确定蚀刻剂是否形成了完全延伸穿过基底的开口。

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