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31. 发明授权

US06544834B1 Method of forming a semiconductor device including a capacitor with tantalum oxide (Ta2O5) 失效
标题翻译：形成包括具有氧化钽（Ta 2 O 5）的电容器的半导体器件的方法
公开(公告)号：US06544834B1
公开(公告)日：2003-04-08
申请号：US09720002
申请日：2000-12-19
申请人： Yasuhiro Sugawara , Shinpei Iijima , Yuzuru Oji , Naruhiko Nakanishi , Misuzu Kanai , Masahiko Hiratani
发明人： Yasuhiro Sugawara , Shinpei Iijima , Yuzuru Oji , Naruhiko Nakanishi , Misuzu Kanai , Masahiko Hiratani
IPC分类号： H01L218242
CPC分类号： H01L27/1085 , H01L21/02183 , H01L21/02271 , H01L21/02304 , H01L21/02337 , H01L21/02356 , H01L21/31604 , H01L27/10814 , H01L27/10817 , H01L27/10852 , H01L27/10876 , H01L27/10891 , H01L27/10894 , H01L28/40
摘要： An integrated semiconductor device has an improved reliability and is adapted to a higher degree of integration without reducing the accumulated electric charge of each information storage capacity element. The semiconductor device is provided with a DRAM having memory cells, each comprising an information storage capacity element C connected in series to a memory cell selection MISFET Qs formed on a main surface of a semiconductor substrate 1 and having a lower electrode 54, a capacity insulating film 58 and an upper electrode 59. The lower electrode 54 is made of ruthenium film oriented in a particular plane bearing, e.g., a (002) plane, and the capacity insulating film 58 is made of a polycrystalline tantalum film obtained by thermally treating an amorphous tantalum oxide film containing crystal of tantalum oxide in an as-deposited state for crystallization.
摘要翻译：集成半导体器件具有改进的可靠性并且适于更高的集成度，而不减少每个信息存储电容元件的累积电荷。半导体器件具有DRAM，其具有存储单元，每个DRAM包括与形成在半导体衬底1的主表面上的存储单元选择MISFET Qs串联连接的信息存储电容元件C，具有下电极54，电容绝缘膜58和上电极59.下电极54由在特定平面轴承（例如（002））面取向的钌膜制成，并且电容绝缘膜58由通过热处理得到的多晶钽膜制成含有沉淀状态的结晶用氧化钽晶体的无定形氧化钽膜。

32. 发明授权

US5077266A Method of forming weak-link Josephson junction, and superconducting device employing the junction 失效
标题翻译：形成弱连接JOSEPHSON JUNCTION的方法和使用连接的超级设备
公开(公告)号：US5077266A
公开(公告)日：1991-12-31
申请号：US405737
申请日：1989-09-11
申请人： Kazumasa Takagi , Tokuumi Fukazawa , Yoshimi Kawanami , Yuuichi Madokoro , Katsuki Miyauchi , Toshiyuki Aida , Yukio Honda , Masaaki Futamoto , Masahiko Hiratani
发明人： Kazumasa Takagi , Tokuumi Fukazawa , Yoshimi Kawanami , Yuuichi Madokoro , Katsuki Miyauchi , Toshiyuki Aida , Yukio Honda , Masaaki Futamoto , Masahiko Hiratani
IPC分类号： H01L39/22 , H01L39/24
CPC分类号： H01L39/2496 , Y10S505/701 , Y10S505/702 , Y10S505/729 , Y10T29/41
摘要： A weak-link Josephson junction is of the type employing a thin film of an oxide superconductor, in which a crystal grain boundary produced reflecting an artificial crystal defect is utilized as the weak-link junction. The crystal grain boundary is formed concretely by a method in which atoms of different species are deposited on the predetermined part of the surface of a substrate, the predetermined part of the surface of a substrate is disturbed, or parts of different crystal face orientations are formed at the surface of a substrate, whereupon the superconducting thin film is epitaxially grown on the substrate, or by a method in which the predetermined part of the superconducting thin film, epitaxially grown on a substrate, is diffused with atoms of different species hampering a superconductivity, or the predetermined part of the superconducting thin film is disturbed, whereupon the superconducting thin film is annealed.

33. 发明申请

US20090085086A1 CAPACITIVE ELECTRODE HAVING SEMICONDUCTOR LAYERS WITH AN INTERFACE OF SEPARATED GRAIN BOUNDARIES 有权
标题翻译：具有分离晶界的界面的具有半导体层的电容电极
公开(公告)号：US20090085086A1
公开(公告)日：2009-04-02
申请号：US12328046
申请日：2008-12-04
申请人： Yuichi Matsui , Masahiko Hiratani
发明人： Yuichi Matsui , Masahiko Hiratani
IPC分类号： H01L27/108
CPC分类号： H01L21/022 , C23C16/18 , C23C16/405 , C23C16/56 , H01L21/02175 , H01L21/02183 , H01L21/02194 , H01L21/02271 , H01L21/02356 , H01L21/31604 , H01L21/31637 , H01L27/10814 , H01L27/10852 , H01L27/10882 , H01L27/10894 , H01L28/40 , H01L28/56 , H01L28/75 , H01L28/90
摘要： The present invention relates to a structure of a capacitor, in particular using niobium pentoxide, of a semiconductor capacitor memory device. Since niobium pentoxide has a low crystallization temperature of 600° C. or less, niobium pentoxide can suppress the oxidation of a bottom electrode and a barrier metal by heat treatment. However, according to heat treatment at low temperature, carbon incorporated from CVD sources into the film is not easily oxidized or removed. Therefore, a problem that leakage current increases arises. As an insulator film of a capacitor, a layered film composed of niobium pentoxide film and a tantalum pentoxide film, or a layered film composed of niobium pentoxide films is used. By the use of the niobium pentoxide film, the dielectric constant of the capacitor can be made high and the crystallization temperature can be made low. By multiple-stage formation of the dielectric film, leakage current can be decreased.
摘要翻译：本发明涉及半导体电容器存储器件的电容器的结构，特别是五氧化二铌。由于五氧化二铌具有600℃以下的低结晶温度，所以五氧化二铌可以通过热处理抑制底电极和阻挡金属的氧化。然而，根据低温热处理，从CVD源引入到膜中的碳不易氧化或除去。因此，出现漏电流增加的问题。作为电容器的绝缘膜，使用由五氧化二铌膜和五氧化钽膜构成的层叠膜或由五氧化二铌膜构成的层叠膜。通过使用五氧化二铌膜，可以使电容器的介电常数高，可以降低结晶温度。通过电介质膜的多级形成，可以降低泄漏电流。

34. 发明授权

US07511327B2 Capacitive electrode having semiconductor layers with an interface of separated grain boundaries 有权
标题翻译：具有具有分离的晶界的界面的半导体层的电容电极
公开(公告)号：US07511327B2
公开(公告)日：2009-03-31
申请号：US11878475
申请日：2007-07-25
申请人： Yuichi Matsui , Masahiko Hiratani
发明人： Yuichi Matsui , Masahiko Hiratani
IPC分类号： H01L27/06
CPC分类号： H01L21/022 , C23C16/18 , C23C16/405 , C23C16/56 , H01L21/02175 , H01L21/02183 , H01L21/02194 , H01L21/02271 , H01L21/02356 , H01L21/31604 , H01L21/31637 , H01L27/10814 , H01L27/10852 , H01L27/10882 , H01L27/10894 , H01L28/40 , H01L28/56 , H01L28/75 , H01L28/90
摘要： The present invention relates to a structure of a capacitor, in particular using niobium pentoxide, of a semiconductor capacitor memory device. Since niobium pentoxide has a low crystallization temperature of 600° C. or less, niobium pentoxide can suppress the oxidation of a bottom electrode and a barrier metal by heat treatment. However, according to heat treatment at low temperature, carbon incorporated from CVD sources into the film is not easily oxidized or removed. Therefore, a problem that leakage current increases arises. As an insulator film of a capacitor, a layered film composed of niobium pentoxide film and a tantalum pentoxide film, or a layered film composed of niobium pentoxide films is used. By the use of the niobium pentoxide film, the dielectric constant of the capacitor can be made high and the crystallization temperature can be made low. By multiple-stage formation of the dielectric film, leakage current can be decreased.
摘要翻译：本发明涉及半导体电容器存储器件的电容器的结构，特别是五氧化二铌。由于五氧化二铌具有600℃以下的低结晶温度，所以五氧化二铌可以通过热处理抑制底电极和阻挡金属的氧化。然而，根据低温热处理，从CVD源引入到膜中的碳不易氧化或除去。因此，出现漏电流增加的问题。作为电容器的绝缘膜，使用由五氧化二铌膜和五氧化钽膜构成的层叠膜或由五氧化二铌膜构成的层叠膜。通过使用五氧化二铌膜，可以使电容器的介电常数高，可以降低结晶温度。通过电介质膜的多级形成，可以降低泄漏电流。

35. 发明申请

US20080265300A1 Semiconductor device having plural dram memory cells and a logic circuit and method for manufacturing the same 失效
标题翻译：具有多个显影存储单元的半导体器件及其制造方法
公开(公告)号：US20080265300A1
公开(公告)日：2008-10-30
申请号：US12213920
申请日：2008-06-26
申请人： Satoru Akiyama , Takao Watanabe , Yuichi Matsui , Masahiko Hiratani
发明人： Satoru Akiyama , Takao Watanabe , Yuichi Matsui , Masahiko Hiratani
IPC分类号： H01L27/108
CPC分类号： H01L27/10852 , H01L23/5223 , H01L27/105 , H01L27/1052 , H01L27/10814 , H01L27/10885 , H01L27/10894 , H01L27/115 , H01L2924/0002 , H01L2924/00
摘要： A memory cell capacitor (C3) of a DRAM is formed by use of a MIM capacitor which uses as its electrode a metal wiring line of the same layer (M3) as metal wiring lines within a logic circuit (LOGIC), thereby enabling reduction of process costs. Higher integration is achievable by forming the capacitor using a high dielectric constant material and disposing it above a wiring layer in which bit lines (BL) are formed. In addition, using 2T cells makes it possible to provide a sufficient signal amount even when letting them operate with a low voltage. By commonizing the processes for fabricating capacitors in analog (ANALOG) and memory (MEM), it is possible to realize a semiconductor integrated circuit with the logic, analog and memory mounted together on one chip at low costs.
摘要翻译： DRAM的存储单元电容器（C 3）通过使用MIM电容器形成，该MIM电容器使用与逻辑电路（LOGIC）内的金属布线相同的层（M 3）的金属布线，从而使能降低工艺成本。通过使用高介电常数材料形成电容器并将其布置在其中形成位线（BL）的布线层上方，可以实现更高的积分。此外，使用2T电池使得即使当它们以低电压工作时也可以提供足够的信号量。通过对模拟（ANALOG）和存储器（MEM）中制造电容器的工艺进行通用化，可以以低成本在一个芯片上实现将逻辑，模拟和存储器安装在一起的半导体集成电路。

36. 发明授权

US07265407B2 Capacitive electrode having semiconductor layers with an interface of separated grain boundaries 有权
标题翻译：具有具有分离的晶界的界面的半导体层的电容电极
公开(公告)号：US07265407B2
公开(公告)日：2007-09-04
申请号：US11242911
申请日：2005-10-05
申请人： Yuichi Matsui , Masahiko Hiratani
发明人： Yuichi Matsui , Masahiko Hiratani
IPC分类号： H01L27/06
CPC分类号： H01L21/022 , C23C16/18 , C23C16/405 , C23C16/56 , H01L21/02175 , H01L21/02183 , H01L21/02194 , H01L21/02271 , H01L21/02356 , H01L21/31604 , H01L21/31637 , H01L27/10814 , H01L27/10852 , H01L27/10882 , H01L27/10894 , H01L28/40 , H01L28/56 , H01L28/75 , H01L28/90
摘要： The present invention relates to a structure of a capacitor, in particular using niobium pentoxide, of a semiconductor capacitor memory device. Since niobium pentoxide has a low crystallization temperature of 600° C. or less, niobium pentoxide can suppress the oxidation of a bottom electrode and a barrier metal by heat treatment. However, according to heat treatment at low temperature, carbon incorporated from CVD sources into the film is not easily oxidized or removed. Therefore, a problem that leakage current increases arises. As an insulator film of a capacitor, a layered film composed of a niobium pentoxide film and a tantalum pentoxide film, or a layered film composed of niobium pentoxide films is used. By the use of the niobium pentoxide film, the dielectric constant of the capacitor can be made high and the crystallization temperature can be made low. By multiple-stage formation of the dielectric film, leakage current can be decreased.
摘要翻译：本发明涉及半导体电容器存储器件的电容器的结构，特别是五氧化二铌。由于五氧化二铌具有600℃以下的低结晶温度，所以五氧化二铌可以通过热处理抑制底电极和阻挡金属的氧化。然而，根据低温热处理，从CVD源引入到膜中的碳不易氧化或除去。因此，出现漏电流增加的问题。作为电容器的绝缘膜，使用由五氧化二铌膜和五氧化二钽膜构成的层叠膜或由五氧化二铌膜构成的层叠膜。通过使用五氧化二铌膜，可以使电容器的介电常数高，可以降低结晶温度。通过电介质膜的多级形成，可以降低泄漏电流。

37. 发明授权

US06326218B1 Semiconductor integrated circuit and its manufacturing method 失效
标题翻译：半导体集成电路及其制造方法
公开(公告)号：US06326218B1
公开(公告)日：2001-12-04
申请号：US09575442
申请日：2000-05-22
申请人： Takashi Yunogami , Kazuo Nojiri , Yuzuru Ohji , Sukeyoshi Tsunekawa , Masahiko Hiratani , Yuichi Matsui
发明人： Takashi Yunogami , Kazuo Nojiri , Yuzuru Ohji , Sukeyoshi Tsunekawa , Masahiko Hiratani , Yuichi Matsui
IPC分类号： H01G706
CPC分类号： H01L27/105 , H01L21/32139 , H01L27/11502 , H01L27/11507 , H01L27/11509 , H01L28/55 , H01L28/60
摘要： Described is a manufacturing method of an integrated circuit which uses a thin film such as platinum or BST as a hard mask upon patterning ruthenium or the like, thereby making it possible to form a device without removing the hard mask. In addition, the invention method makes it possible to interpose a protecting film such as platinum in order to prevent, upon removing a resist used for the patterning of the hard mask, an underlying ruthenium film or the like from being damaged.
摘要翻译：描述了在图案化钌等上使用诸如铂或BST之类的薄膜作为硬掩模的集成电路的制造方法，从而可以在不去除硬掩模的情况下形成器件。另外，本发明的方法可以插入诸如铂的保护膜，以便在去除用于图案化硬掩模的抗蚀剂时，下面的钌膜等被损坏。

38. 发明授权

US5914068A Bi-layer oxide ferroelectrics 失效
标题翻译：双层氧化物铁电体
公开(公告)号：US5914068A
公开(公告)日：1999-06-22
申请号：US765575
申请日：1996-12-30
申请人： Masahiko Hiratani , Keiko Kushida , Kazushige Imagawa , Kazumasa Takagi
发明人： Masahiko Hiratani , Keiko Kushida , Kazushige Imagawa , Kazumasa Takagi
IPC分类号： C04B35/453 , C30B29/22
CPC分类号： C04B35/453
摘要： Novel Bi-layer Perovskite ferroelectrics constituted of BiO intermediate layers (17) and pseudo-Perovskite layers (18) stacked alternately are disclosed. The Bi-layer Perovskite ferroelectrics have such a crystal structure which has a fundamental skeleton composed of each intermediate layer (17) consisting of one BiO plane and each pseudo-Perovskite structure (18) consisting of Pb(Zr, Ti)O.sub.3. Since the intermediate layer (17) is constituted of the BiO layer, the ferroelectrics are more excellent in ferroelectric characteristics and thermodynamic stability than known Perovskite ferroelectrics comprising a Bi.sub.2 O.sub.2 layer.
摘要翻译： PCT No.PCT / JP95 / 01205 Sec。 371日期1996年12月30日第 102（e）日期1996年12月30日PCT归档1995年6月16日PCT公布。出版物WO96 / 00704 日期1996年1月11日公开了由交替堆叠的BiO中间层（17）和伪钙钛矿层（18）构成的新型双层钙钛矿型铁电体。双层钙钛矿铁电体具有这样的晶体结构，其具有由由一个BiO平面构成的每个中间层（17）和由Pb（Zr，Ti）O 3组成的每个假钙钛矿结构（18）组成的基本骨架。由于中间层（17）由BiO层构成，所以铁电体的铁电特性和热力学稳定性优于包括Bi 2 O 2层的已知钙钛矿型铁电体。

39. 发明授权

US5380704A Superconducting field effect transistor with increased channel length 失效
标题翻译：超导场效应晶体管具有增加的沟道长度
公开(公告)号：US5380704A
公开(公告)日：1995-01-10
申请号：US113006
申请日：1993-08-30
申请人： Yoshinobu Tarutani , Tokuumi Fukazawa , Uki Kabasawa , Kazumasa Takagi , Akira Tsukamoto , Masahiko Hiratani , Toshikazu Nishino
发明人： Yoshinobu Tarutani , Tokuumi Fukazawa , Uki Kabasawa , Kazumasa Takagi , Akira Tsukamoto , Masahiko Hiratani , Toshikazu Nishino
IPC分类号： H01L29/43 , H01L29/49 , H01L29/786 , H01L39/22 , B05D5/12 , H01B12/00
CPC分类号： H01L29/78696 , H01L29/437 , H01L29/4908 , H01L29/78645 , H01L29/7869 , H01L39/146
摘要： Disclosed herein is a superconducting field effect transistor (FET) which has at least an active region formed from a film of oxide normal conductor, a plurality of electrodes formed from a film of oxide superconductor, and a means to control the current which flows between the electrodes through the active region. Having a much greater electrode distance than the conventional superconducting device, it can be produced easily by lithography without resorting to special techniques.
摘要翻译：本发明公开了一种超导场效应晶体管（FET），其至少具有由氧化物正导体膜形成的有源区，由氧化物超导体的膜形成的多个电极，以及控制在氧化物超导体之间流动的电流的装置电极通过有源区。具有比常规超导装置更大的电极距离，其可以通过光刻而容易地制造，而不需要采用特殊技术。

40. 发明授权

US5151409A Superconducting composition comprising Ln-Th-Cu-O, wherein Ln is Pr, Nd, Pm, Sm, Eu, Gd, Er or mixtures thereof 失效
标题翻译：包含LN-TH-CU-O的超导性组合物，其中LN是PR，ND，PM，SM，EU，GD，ER或其混合物
公开(公告)号：US5151409A
公开(公告)日：1992-09-29
申请号：US469225
申请日：1990-01-24
申请人： Masahiko Hiratani , Shin'ichiro Saitoh , Katsuki Miyauchi , Tsuyoshi Seko
发明人： Masahiko Hiratani , Shin'ichiro Saitoh , Katsuki Miyauchi , Tsuyoshi Seko
IPC分类号： H01L39/10 , H01L39/22
CPC分类号： H01L39/126 , H01L39/225 , Y10S505/776 , Y10S505/779
摘要： A superconducting oxide composition comprising Ln-Th-Cu-O wherein Ln indicates at least one element selected from a group consisting of Pr, Nd, Pm, Sm, Eu, Gd and Er. A superconducting structure is formed in such a manner that at least an insulating layer is sandwiched between two superconductor layers but the superconductor layers are electrically coupled with each other, and a superconducting device including the superconducting structure is constructed so as to perform a switching operation for an electric signal, to detect a light signal, and to detect the intensity of a magnetic field. Another superconducting device is formed so that two superconductor layers are put in direct contact with each other, and a tunnel current between the superconductor layers can be controlled. Further, a superconductor structure is formed which includes a plurality of superconductor layers and has a superconducting transition temperature or superconducting critical current higher than that of each superconductor layer, and a superconducting device including this superconducting structure can operate at a relatively high temperature. Furthermore, a superconducting circuit device is formed which can emit a coherent electromagnetic wave having a wavelength of the order of 10 .mu.m on the basis of the difference in energy gap between adjacent superconductor layers. Additionally, novel oxide superconductor materials are disclosed.

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