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21. 发明授权

US06647993B2 Surface-treated shower head for use in a substrate processing chamber 失效
标题翻译：用于基板处理室的表面处理淋浴喷头
公开(公告)号：US06647993B2
公开(公告)日：2003-11-18
申请号：US09740596
申请日：2000-12-19
申请人： Quanyuan Shang , Sheng Sun , Kam S. Law , Emanuel Beer
发明人： Quanyuan Shang , Sheng Sun , Kam S. Law , Emanuel Beer
IPC分类号： B08B704
CPC分类号： C23C16/45565 , C23C16/4404 , C23C16/4405 , G03F7/70925 , H01J37/32357 , H01J37/3244 , H01J37/32522 , H01J2237/3325 , H01J2237/334 , Y10S438/905
摘要： A substrate processing system includes a processing chamber and a plasma source located external to the chamber. A conduit connects the plasma source to an interior region of the chamber to provide a reactive species to the chamber interior for cleaning interior surfaces of the chamber. A shower head, disposed between the plasma source and an interior region of the chamber, can serve as an electrode and also can serve as a gas distribution mechanism. The shower head includes a surface treatment, such as a non-anodized aluminum outer layer, an electro-polished surface of bare aluminum, or a fluorine-based protective outer layer. The surface-treated shower head improves the rate of removal of materials deposited on the interior surfaces of the chamber during cleaning, reduces contamination of substrates during processing, and provides more efficient use of the power source used for heating the substrate during processing.
摘要翻译：衬底处理系统包括位于腔室外部的处理室和等离子体源。导管将等离子体源连接到腔室的内部区域，以向腔室内部提供反应物质以清洁腔室的内表面。设置在等离子体源和室的内部区域之间的喷头可以用作电极，并且还可以用作气体分配机构。淋浴头包括表面处理，例如非阳极氧化的铝外层，裸铝的电抛光表面或氟基保护外层。表面处理的花洒头在清洁过程中提高了沉积在室内表面上的材料的去除速度，减少了处理过程中衬底的污染，并且在加工过程中提供了用于加热衬底的电源的更有效的使用。

22. 发明授权

US06444277B1 Method for depositing amorphous silicon thin films onto large area glass substrates by chemical vapor deposition at high deposition rates 失效
标题翻译：通过化学气相沉积在高沉积速率下将非晶硅薄膜沉积到大面积玻璃基板上的方法
公开(公告)号：US06444277B1
公开(公告)日：2002-09-03
申请号：US08303566
申请日：1994-09-09
申请人： Kam S. Law , Robert Robertson , Pamela Lou , Marc Michael Kollrack , Angela Lee , Dan Maydan
发明人： Kam S. Law , Robert Robertson , Pamela Lou , Marc Michael Kollrack , Angela Lee , Dan Maydan
IPC分类号： B05D306
CPC分类号： C23C16/0245 , C23C16/24 , C23C16/4583 , C23C16/5096 , H01L21/02422 , H01L21/0245 , H01L21/02532 , H01L21/0262
摘要： Amorphous silicon thin films can be deposited onto large area glass substrates at high deposition rates by chemical vapor deposition using pressure of at least 0.8 Torr and temperatures of about 270-350° C. and fairly high gas flow rates of silane in a hydrogen carrier gas. The spacing between the inlet gas manifold and the substrate in the CVD chamber is maintained so as to maximize the deposition rate. Improved transistor characteristics are observed when the substrate is either exposed to a hydrogen plasma for a few seconds prior to high rate deposition of the amorphous silicon, or when a first layer of amorphous silicon is deposited using a slow deposition rate process prior to deposition of the high deposition rate amorphous silicon.
摘要翻译：非晶硅薄膜可以通过使用至少0.8托的压力和约270-350℃的温度的化学气相沉积以高沉积速率沉积到大面积玻璃基板上，并且在氢载气中具有相当高的硅烷气体流速。保持入口气体歧管和CVD室中的衬底之间的间隔，以使沉积速率最大化。当在非晶硅的高速沉积之前衬底被暴露于氢等离子体几秒钟时，或者当沉积第一层非晶硅之前使用缓慢沉积速率工艺沉积第一层非晶硅时，可以观察到改善的晶体管特性高沉积速率非晶硅。

23. 发明授权

US06172322B2 Annealing an amorphous film using microwave energy 失效
标题翻译：使用微波能量退火非晶膜
公开(公告)号：US06172322B2
公开(公告)日：2001-01-09
申请号：US08965939
申请日：1997-11-07
申请人： Quanyuan Shang , Robert McCormick Robertson , Kam S. Law , Takako Takehara , Taekyung Won , Sheng Sun
发明人： Quanyuan Shang , Robert McCormick Robertson , Kam S. Law , Takako Takehara , Taekyung Won , Sheng Sun
IPC分类号： H05B680
CPC分类号： C23C16/56
摘要： A system and method for annealing a film on a substrate in a processing chamber, including a microwave generator disposed to provide microwaves to an area within the interior of the chamber. The microwaves have a frequency such that the film is substantially absorptive at the frequency but the substrate is not substantially absorptive at the frequency. A waveguide distributes the microwaves over the surface of the film to provide a substantially uniform dosage of microwaves over the surface of the film. The method includes depositing a film on a substrate in the processing chamber. During at least a portion of the time of the depositing step, microwaves are generated having a frequency such that the film has an absorption peak at the frequency but the substrate lacks a substantial absorption peak at the frequency. The microwaves are directed towards the film.
摘要翻译：一种用于对处理室中的基板上的膜进行退火的系统和方法，该处理室包括微波发生器，微波发生器被设置成向腔室内部的区域提供微波。微波的频率使得膜在频率上基本上是吸收性的，但是基底在频率上基本上不吸收。波导将微波分布在膜的表面上，以在膜的表面上提供基本上均匀的微波用量的微波。该方法包括在处理室中的衬底上沉积膜。在沉积步骤的至少一部分时间内，产生具有频率使得该膜在频率处具有吸收峰但基底在该频率处缺少实质吸收峰的频率的微波。微波指向电影。

24. 发明授权

US06167834A Thermal CVD/PECVD reactor and use for thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process 失效
公开(公告)号：US06167834A
公开(公告)日：2001-01-02
申请号：US07928642
申请日：1992-08-13
申请人： David Nin-Kou Wang , John M. White , Kam S. Law , Cissy Leung , Salvador P. Umotoy , Kenneth S. Collins , John A. Adamik , Ilya Perlov , Dan Maydan
发明人： David Nin-Kou Wang , John M. White , Kam S. Law , Cissy Leung , Salvador P. Umotoy , Kenneth S. Collins , John A. Adamik , Ilya Perlov , Dan Maydan
IPC分类号： C23C1600
CPC分类号： C23C16/45565 , C23C16/402 , C23C16/455 , C23C16/45521 , C23C16/5096 , C23C16/54 , H01J37/32082 , H01J37/3244 , H01L21/31604
摘要： A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, the TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.

25. 发明授权

US5895937A Tapered dielectric etch in semiconductor devices 失效
标题翻译：半导体器件中的锥形电介质蚀刻
公开(公告)号：US5895937A
公开(公告)日：1999-04-20
申请号：US955446
申请日：1997-10-21
申请人： Yuh-Jia (Jim) Su , Yuen-Kui (Jerry) Wong , Kam S. Law , Haruhiro (Harry) Goto
发明人： Yuh-Jia (Jim) Su , Yuen-Kui (Jerry) Wong , Kam S. Law , Haruhiro (Harry) Goto
IPC分类号： C01B17/45 , C23F1/12 , C23F4/00 , H01L21/302 , H01L21/3065 , H01L21/311 , H01L21/336 , H01L21/768 , H01L29/786 , H01L27/01 , H01L27/12 , H01L31/0392
CPC分类号： H01L29/66765 , H01L21/31116 , H01L21/76804 , Y10S438/978
摘要： A method of etching openings in a dielectric layer of a semiconductor device by utilizing a novel etchant gas system of sulfur hexafluoride/chlorine such that sloped sidewalls can be formed in the openings having a desired taper of between about 20.degree. and about 85.degree. for achieving improved step coverage and profile control of the TFT fabrication process.
摘要翻译：通过利用六氟化硫/氯的新型蚀刻剂气体系统来蚀刻半导体器件的电介质层中的开口的方法，使得可以在具有大约20度至大约85度之间的所需锥度的开口中形成倾斜的侧壁，以实现改进TFT制作工艺的台阶覆盖和轮廓控制。

26. 发明授权

US5895548A High power microwave plasma applicator 失效
标题翻译：大功率微波等离子体涂布机
公开(公告)号：US5895548A
公开(公告)日：1999-04-20
申请号：US626258
申请日：1996-03-29
申请人： Gary C. Ettinger , Quanyuan Shang , Kam S. Law
发明人： Gary C. Ettinger , Quanyuan Shang , Kam S. Law
IPC分类号： H05H1/46 , C23F4/00 , H01J37/32 , H01L21/302 , H01L21/3065 , C23F1/02 , H01J7/24 , H05H1/24
CPC分类号： H01J37/32357
摘要： A plasma applicator including a cylindrically-shaped outer tube; a cylindrically-shaped plasma tube located within and concentric with the outer tube, and having a first end and a second end; a first support located at the first end of the plasma tube; a seal surrounding the plasma tube at its first end, compressed between the plasma tube and the first support, and located at a first distance from the first end of the plasma tube; and a shield extending a second distance into the plasma tube.
摘要翻译：一种等离子体施加器，其包括圆柱形外管; 位于所述外管内且与所述外管同心的圆柱形等离子体管，并且具有第一端和第二端; 位于等离子体管的第一端的第一支撑件; 围绕等离子体管的第一端处的密封件，其被压缩在等离子体管和第一支撑件之间，并且位于距离等离子体管的第一端的第一距离处; 以及将第二距离延伸到等离子体管中的屏蔽。

27. 发明授权

US5354715A Thermal chemical vapor deposition of silicon dioxide and in-situ multi-step planarized process 失效
标题翻译：二氧化硅的热化学气相沉积和原位多步平面化工艺
公开(公告)号：US5354715A
公开(公告)日：1994-10-11
申请号：US861719
申请日：1992-04-01
申请人： David N-K. Wang , John M. White , Kam S. Law , Cissy Leung , Salvador P. Umotoy , Kenneth S. Collins , John A. Adamik , Ilya Perlov , Dan Maydan
发明人： David N-K. Wang , John M. White , Kam S. Law , Cissy Leung , Salvador P. Umotoy , Kenneth S. Collins , John A. Adamik , Ilya Perlov , Dan Maydan
IPC分类号： C23C16/48 , C23C16/04 , C23C16/40 , C23C16/42 , C23C16/44 , C23C16/455 , C23C16/46 , C23C16/50 , C23C16/509 , C23C16/54 , C23F4/00 , C30B25/14 , H01L21/205 , H01L21/302 , H01L21/3065 , H01L21/31 , H01L21/314 , H01L21/316 , H01L21/683 , H01L21/00 , H01L21/02
CPC分类号： C23C16/45565 , C23C16/402 , C23C16/455 , C23C16/45521 , C23C16/5096 , C23C16/54 , H01J37/32082 , H01J37/3244 , H01L21/31604
摘要： A high pressure, high throughout, single wafer semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature process for forming a highly conformal layer of silicon dioxide from a plasma of TEOS, oxygen and ozone is also disclosed. This layer can be planarized using an etchback process. Silicon oxide deposition and etchback can be carried out sequentially in the reactor.
摘要翻译：公开了一种高压，高整体的单晶片半导体处理反应器，其能够通过溅射单独地或作为部分的，通过溅射进行热CVD，等离子体增强CVD，等离子体辅助回蚀，等离子体自清洁和沉积形貌修饰，原位多步处理。该反应器在包括非常高的压力的宽范围的压力下提供均匀的加工。还公开了一种用于从TEOS，氧气和臭氧的等离子体形成高度保形二氧化硅层的低温工艺。该层可以使用回蚀工艺进行平面化。氧化硅沉积和回蚀可以在反应器中顺序进行。

28. 发明授权

US5112776A Method for planarizing an integrated circuit structure using low melting inorganic material and flowing while depositing 失效
标题翻译：使用低熔点无机材料平面化集成电路结构并在沉积时流动的方法
公开(公告)号：US5112776A
公开(公告)日：1992-05-12
申请号：US644853
申请日：1991-01-22
申请人： Jeffrey Marks , Kam S. Law , David N. Wang , Dan Mayden
发明人： Jeffrey Marks , Kam S. Law , David N. Wang , Dan Mayden
IPC分类号： H01L21/3105 , H01L21/316 , H01L21/768
CPC分类号： H01L21/31604 , H01L21/31055 , H01L21/76819 , Y10S148/133
摘要： A planarizing process is disclosed for planarizing an integrated circuit structure using a low melting inorganic planarizing material which comprises flowing while depositing a low melting inorganic planarizing layer such as a boron oxide glass over a layer of insulating material such as an oxide of silicon and then dry etching the low melting inorganic planarizing layer to planarize the structure. The method eliminates the need for separate coating, drying, and curing steps associated with the application of organic-based planarizing layers usually carried out outside of a vacuum apparatus. In a preferred embodiment, the deposition steps and the etching step are carried out without removing the integrated circuit structure from the vacuum apparatus. An additional etching step may be carried out after depositing the insulating layer and prior to deposition of the planarizing layer to remove any voids formed in the insulating layer.
摘要翻译：公开了一种用于使用低熔点无机平面化材料对集成电路结构进行平面化的平面化工艺，该无机平面化材料包括在诸如氧化硅玻璃之类的绝缘材料层上沉积低熔点无机平面化层的同时流动，然后干燥蚀刻低熔点无机平面化层以使结构平坦化。该方法消除了对通常在真空装置外进行的有机基平坦化层的应用的独立涂布，干燥和固化步骤的需要。在优选实施例中，沉积步骤和蚀刻步骤在不从真空装置中去除集成电路结构的情况下进行。在沉积绝缘层之后并且在沉积平坦化层以去除在绝缘层中形成的任何空隙之前，可以进行另外的蚀刻步骤。

29. 发明授权

US07087179B2 Optical integrated circuits (ICs) 有权
标题翻译：光集成电路（IC）
公开(公告)号：US07087179B2
公开(公告)日：2006-08-08
申请号：US09734950
申请日：2000-12-11
申请人： Cecilia Y. Mak , John M. White , Kam S. Law , Dan Maydan
发明人： Cecilia Y. Mak , John M. White , Kam S. Law , Dan Maydan
IPC分类号： B29D11/00
CPC分类号： G02B6/12004 , G02B6/13 , G02B6/132
摘要： In one aspect, the invention provides methods and apparatus for forming optical devices on large area substrates. The large area substrates are preferably made of quartz, silica or fused silica. The large area substrates enable larger optical devices to be formed on a single die. In another aspect, the invention provides methods and apparatus for forming integrated optical devices on large area substrates, such as quartz, silica or fused silica substrates. In another aspect, the invention provides methods and apparatus for forming optical devices using damascene techniques on large area substrates or silicon substrates. In another aspect, methods for forming optical devices by bonding an upper cladding layer on a lower cladding and a core is provided.
摘要翻译：一方面，本发明提供了用于在大面积基板上形成光学装置的方法和装置。大面积基板优选由石英，二氧化硅或熔融二氧化硅制成。大面积基板使得能够在单个管芯上形成更大的光学器件。另一方面，本发明提供了用于在大面积衬底（例如石英，二氧化硅或熔融二氧化硅衬底）上形成集成光学器件的方法和装置。在另一方面，本发明提供了使用大面积衬底或硅衬底上的镶嵌技术形成光学器件的方法和装置。在另一方面，提供了通过将下包层和芯上的上包层结合来形成光器件的方法。

30. 发明授权

US06981508B2 On-site cleaning gas generation for process chamber cleaning 失效
公开(公告)号：US06981508B2
公开(公告)日：2006-01-03
申请号：US10856654
申请日：2004-05-27
申请人： Quanyuan Shang , Sanjay Yadav , William R. Harshbarger , Kam S. Law
发明人： Quanyuan Shang , Sanjay Yadav , William R. Harshbarger , Kam S. Law
IPC分类号： B08B9/093
CPC分类号： H01J37/32862 , C23C16/4405 , Y10S134/902 , Y10S438/905
摘要： Provided herein is a method for cleaning a process chamber for semiconductor and/or flat panel display manufacturing. This method comprises the steps of converting a non-cleaning feed gas to a cleaning gas in a remote location and then delivering the cleaning gas to the process chamber for cleaning. Such method may further comprise the step of activating the cleaning gas outside the chamber before the delivery of the gas to the chamber. Also provided is a method of eliminating non-cleaning feed gas from the cleaning gas by cryo condensation.

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