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21. 发明授权

US5378911A Structure of semiconductor device 失效
标题翻译：半导体器件的结构
公开(公告)号：US5378911A
公开(公告)日：1995-01-03
申请号：US186847
申请日：1994-01-27
申请人： Yoshinori Murakami
发明人： Yoshinori Murakami
IPC分类号： H01L29/78 , H01L29/739 , H01L29/10
CPC分类号： H01L29/739 , H01L29/7392
摘要： A structure of a semiconductor device according to the present invention has a normally-off characteristic, a well controlability, a very low on-resistance, a capability for a high breakdown voltage, and is free from parasitic devices. For example, said semiconductor device has a plurality of bar-shaped trenches dug on the surface of an n type semiconductor substrate, which are arranged in stripe, and each of which cross sectional shape is a "U"-shape. At least one n.sup.+ type source region on the surface and it is sandwiched by the trenches. In the respective trenches, insulated electrodes whose potential is fixed to that of the source region, and whose conductive material is made of such that has a work function to generate a depletion region in the drain region around them are disposed. The depletion region functions as a barrier to interrupt between the source region and the drain region electrically. P type injector region is also disposed on the surface of the drain region, and it touches the every surface of the potential-fixed insulated electrodes at every edge of the bar-shapes, and arbitrary potential can be applied to it from an external. The potential of the injector region controls the potential of the surface of the insulated electrodes, which effects the condition of the depletion region and that effects the main current value.
摘要翻译：根据本发明的半导体器件的结构具有常关特性，阱控制性，非常低的导通电阻，高击穿电压的能力，并且没有寄生器件。例如，所述半导体器件具有在n型半导体衬底的表面上挖出的多个条形沟槽，它们以条状布置，并且每个横截面形状为“U”形。表面上至少有一个n +型源区，并被沟槽夹在中间。在各个沟槽中，设置电位固定于源极区域的绝缘电极，其导电材料制成具有在其周围的漏极区域中产生耗尽区的功函数。耗尽区域用作电源区域和漏极区域之间的中断屏障。 P型注入器区域也设置在漏极区域的表面上，并且其在条形的每个边缘处接触电位固定绝缘电极的每个表面，并且可以从外部施加任意电位。喷射器区域的电位控制绝缘电极表面的电位，其影响耗尽区的状态并影响主电流值。

22. 发明授权

US5132238A Method of manufacturing semiconductor device utilizing an accumulation layer 失效
标题翻译：使用累积层制造半导体器件的方法
公开(公告)号：US5132238A
公开(公告)日：1992-07-21
申请号：US631928
申请日：1990-12-20
申请人： Yoshinori Murakami , Teruyoshi Mihara
发明人： Yoshinori Murakami , Teruyoshi Mihara
IPC分类号： H01L21/335 , H01L21/336 , H01L29/423 , H01L29/772 , H01L29/78
CPC分类号： H01L29/66416 , H01L29/66666 , H01L29/7722 , H01L29/7827 , H01L29/4232 , H01L29/4238 , Y10S148/05
摘要： A method of manufacturing semiconductor devices by forming a U-shaped insulated gate on a substrate, etching the substrate to expose a sidewall of the U-shaped insulated gate, covering the exposed part with a masking material, forming the sidewall of the masking material only adjoining to the exposed U-shaped insulated gate, etching the substrate vertically to form a groove, forming a semiconductor region on the groove and burying a metal into the groove.
摘要翻译：一种通过在衬底上形成U形绝缘栅来制造半导体器件的方法，蚀刻衬底以露出U形绝缘栅极的侧壁，用掩模材料覆盖暴露部分，仅形成掩模材料的侧壁邻接于暴露的U形绝缘栅极，垂直蚀刻衬底以形成沟槽，在沟槽上形成半导体区域并将金属埋入槽中。

23. 发明授权

US5049953A Schottky tunnel transistor device 失效
标题翻译：肖特基隧道晶体管器件
公开(公告)号：US5049953A
公开(公告)日：1991-09-17
申请号：US465750
申请日：1990-01-18
申请人： Teruyoshi Mihara , Kenji Yao , Tsutomu Matsushita , Yoshinori Murakami
发明人： Teruyoshi Mihara , Kenji Yao , Tsutomu Matsushita , Yoshinori Murakami
IPC分类号： H01L29/739 , H01L29/78 , H01L29/48 , H01L27/02 , H01L29/10 , H01L29/34
CPC分类号： H01L29/7839 , Y10S257/902
摘要： A semiconductor device includes a semiconductor substrate of a first conductivity type, in which a drain region is formed in the substrate, and a gate electrode is formed on the surface of the substrate via an insulating film formed thereon. A Schottky metal as a source region is formed in the surface of the substrate away from the drain region, the Schottky metal and the substrate constituting a Schottky junction at an interface therebetween near the gate electrode. A shield layer of a second conductivity type is interposed between the Schottky metal and the substrate except in the Schottky junction. The gate electrode controls tunnel current at the Schottky junction.
摘要翻译：半导体器件包括：第一导电类型的半导体衬底，其中在衬底中形成漏极区，并且通过形成在其上的绝缘膜在衬底的表面上形成栅电极。作为源极区域的肖特金属金属在远离漏极区域的肖特基金属和衬底的与栅极电极附近的界面处构成肖特基结的表面上形成。第二导电类型的屏蔽层介于除了肖特基结之外的肖特基金属和基板之间。栅电极控制肖特基结的隧道电流。

24. 发明授权

US08921998B2 Semiconductor module 有权
标题翻译：半导体模块
公开(公告)号：US08921998B2
公开(公告)日：2014-12-30
申请号：US14236236
申请日：2012-08-24
申请人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
发明人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
IPC分类号： H01L23/10 , H01L23/34 , H01L23/538 , H01L23/373 , H01L23/00 , H01L25/07 , H01L23/498 , H01L25/18
CPC分类号： H01L23/5384 , H01L23/3735 , H01L23/49811 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/18 , H01L2224/48091 , H01L2224/48132 , H01L2224/48227 , H01L2224/48235 , H01L2224/4846 , H01L2224/48472 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/10272 , H01L2924/1033 , H01L2924/1203 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor module has a pair of semiconductor devices, a heat sink, a first electrode, an output electrode and a second electrode. The semiconductor devices are connected in series with each other and have first terminals that are electrically connected to a first power system and a second terminal that is electrically connected to a second power system. The first electrode is electrically connected both to one of the first terminal and to an electrode of one of the semiconductor devices. The output electrode is electrically connected both to the second terminal and to an electrode of the other of the semiconductor device. The second electrode is electrically connected to the other of the first terminals. The second electrode is connected to the heat sink via a first insulating member. The output electrode is connected to the second electrode via a second insulating member.
摘要翻译：半导体模块具有一对半导体器件，散热器，第一电极，输出电极和第二电极。半导体器件彼此串联连接并且具有电连接到第一电力系统的第一端子和电连接到第二电力系统的第二端子。第一电极电连接到第一端子中的一个和半导体器件中的一个的电极。输出电极与第二端子和半导体器件的另一个的电极电连接。第二电极与第一端子中的另一个电连接。第二电极通过第一绝缘构件连接到散热器。输出电极经由第二绝缘构件与第二电极连接。

25. 发明授权

US08916882B2 Switching circuit and semiconductor module 有权
标题翻译：开关电路和半导体模块
公开(公告)号：US08916882B2
公开(公告)日：2014-12-23
申请号：US14116890
申请日：2012-05-11
申请人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
发明人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
IPC分类号： H03K17/16 , H01L27/06 , H02M1/08
CPC分类号： H01L27/0629 , H01L27/0682 , H01L2224/48091 , H01L2224/48137 , H01L2224/49111 , H01L2924/19105 , H02M1/08 , H03K17/04123 , H03K17/166 , H01L2924/00014
摘要： A switching circuit includes: a first switching element (Q1); a resistor (11) inserted between a control electrode (G) of the first switching element (Q1) and a control circuit (13) switching the first switching element (Q1); and a first capacitor (15) and a second switching element (14) connected in series between the control electrode (G) of the first switching element (Q1) and a low potential-side electrode (S) of the first switching element (Q1). A high potential-side electrode of the second switching element (14) is connected to the control electrode (G) of the first switching element (Q1). An electrode of the first capacitor (15) is connected to the low potential-side electrode (S) of the first switching element (Q1). A control electrode of the second switching element (14) is connected to an electrode of the resistor (11) connected to the control circuit (13).
摘要翻译：开关电路包括：第一开关元件（Q1）; 插入在第一开关元件（Q1）的控制电极（G）和切换第一开关元件（Q1）的控制电路（13）之间的电阻器（11）; 以及串联连接在第一开关元件（Q1）的控制电极（G）和第一开关元件（Q1）的低电位侧电极（S）之间的第一电容器（15）和第二开关元件（14））。第二开关元件（14）的高电位侧电极连接到第一开关元件（Q1）的控制电极（G）。第一电容器（15）的电极与第一开关元件（Q1）的低电位侧电极（S）连接。第二开关元件（14）的控制电极连接到与控制电路（13）连接的电阻器（11）的电极。

26. 发明申请

US20140191250A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法和半导体器件
公开(公告)号：US20140191250A1
公开(公告)日：2014-07-10
申请号：US14234476
申请日：2012-07-27
申请人： Satoshi Tanimoto , Yusuke Zushi , Yoshinori Murakami , Takashi Iseki , Masato Takamori , Shinji Sato , Kohei Matsui
发明人： Satoshi Tanimoto , Yusuke Zushi , Yoshinori Murakami , Takashi Iseki , Masato Takamori , Shinji Sato , Kohei Matsui
IPC分类号： H01L23/00 , H01L29/16 , H01L29/20
CPC分类号： H01L29/1602 , B23K1/0016 , B23K1/008 , B23K1/19 , B23K1/206 , B23K35/007 , B23K35/025 , B23K35/282 , B23K35/286 , B23K2101/34 , B23K2101/40 , B23K2101/42 , C22C18/04 , H01L24/29 , H01L24/32 , H01L24/83 , H01L29/1608 , H01L29/2003 , H01L2224/29118 , H01L2224/32225 , H01L2224/83001 , H01L2224/83203 , H01L2224/83447 , H01L2224/83815 , H01L2924/01322 , H01L2924/10254 , H01L2924/10272 , H01L2924/1033 , H01L2924/15747 , H01L2924/15787 , H01L2924/01013 , H01L2924/0103 , H01L2924/00
摘要： A method for manufacturing a semiconductor device is carried out by readying each of a semiconductor element, a substrate having Cu as a principal element at least on a surface, and a ZnAl solder chip having a smaller shape than that of the semiconductor element; disposing the semiconductor element and the substrate so that respective bonding surfaces face each other, and sandwiching the ZnAl eutectic solder chip between the substrate and the semiconductor element; increasing the temperature of the ZnAl solder chip sandwiched between the substrate and the semiconductor element while applying a load to the ZnAl solder chip such that the ZnAl solder chip melts to form a ZnAl solder layer; and reducing the temperature of the ZnAl solder layer while applying a load to the ZnAl solder layer.
摘要翻译：半导体器件的制造方法是通过将半导体元件，至少具有表面的Cu作为主要元素的基板和比半导体元件的形状小的ZnAl焊料芯片进行准位来进行的。将所述半导体元件和所述基板配置为使得各个接合面彼此面对，并将所述ZnAl共晶焊料夹在所述基板和所述半导体元件之间; 在向ZnAl焊料芯片施加负载的同时，增加夹在基板和半导体元件之间的ZnAl焊料芯片的温度，使得ZnAl焊料芯片熔化形成ZnAl焊料层; 并且在向ZnAl焊料层施加负载的同时降低ZnAl焊料层的温度。

27. 发明申请

US20140159225A1 SEMICONDUCTOR MODULE 有权
标题翻译：半导体模块
公开(公告)号：US20140159225A1
公开(公告)日：2014-06-12
申请号：US14236236
申请日：2012-08-24
申请人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
发明人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
IPC分类号： H01L23/538
CPC分类号： H01L23/5384 , H01L23/3735 , H01L23/49811 , H01L24/48 , H01L24/49 , H01L25/072 , H01L25/18 , H01L2224/48091 , H01L2224/48132 , H01L2224/48227 , H01L2224/48235 , H01L2224/4846 , H01L2224/48472 , H01L2224/49111 , H01L2224/49175 , H01L2924/00014 , H01L2924/10272 , H01L2924/1033 , H01L2924/1203 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13062 , H01L2924/13091 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor module has a pair of semiconductor devices, a heat sink, a first electrode, an output electrode and a second electrode. The semiconductor devices are connected in series with each other and have first terminals that are electrically connected to a first power system and a second terminal that is electrically connected to a second power system. The first electrode is electrically connected both to one of the first terminal and to an electrode of one of the semiconductor devices. The output electrode is electrically connected both to the second terminal and to an electrode of the other of the semiconductor device. The second electrode is electrically connected to the other of the first terminals. The second electrode is connected to the heat sink via a first insulating member. The output electrode is connected to the second electrode via a second insulating member.
摘要翻译：半导体模块具有一对半导体器件，散热器，第一电极，输出电极和第二电极。半导体器件彼此串联连接并且具有电连接到第一电力系统的第一端子和电连接到第二电力系统的第二端子。第一电极电连接到第一端子中的一个和半导体器件中的一个的电极。输出电极与第二端子和半导体器件的另一个的电极电连接。第二电极与第一端子中的另一个电连接。第二电极通过第一绝缘构件连接到散热器。输出电极经由第二绝缘构件与第二电极连接。

28. 发明申请

US20140091324A1 SWITCHING CIRCUIT AND SEMICONDUCTOR MODULE 有权
标题翻译：切换电路和半导体模块
公开(公告)号：US20140091324A1
公开(公告)日：2014-04-03
申请号：US14116890
申请日：2012-05-11
申请人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
发明人： Yusuke Zushi , Yoshinori Murakami , Satoshi Tanimoto , Shinji Sato , Kohei Matsui
IPC分类号： H01L27/06
CPC分类号： H01L27/0629 , H01L27/0682 , H01L2224/48091 , H01L2224/48137 , H01L2224/49111 , H01L2924/19105 , H02M1/08 , H03K17/04123 , H03K17/166 , H01L2924/00014
摘要： A switching circuit includes: a first switching element (Q1); a resistor (11) inserted between a control electrode (G) of the first switching element (Q1) and a control circuit (13) switching the first switching element (Q1); and a first capacitor (15) and a second switching element (14) connected in series between the control electrode (G) of the first switching element (Q1) and a low potential-side electrode (S) of the first switching element (Q1). A high potential-side electrode of the second switching element (14) is connected to the control electrode (G) of the first switching element (Q1). An electrode of the first capacitor (15) is connected to the low potential-side electrode (S) of the first switching element (Q1). A control electrode of the second switching element (14) is connected to an electrode of the resistor (11) connected to the control circuit (13).
摘要翻译：开关电路包括：第一开关元件（Q1）; 插入在第一开关元件（Q1）的控制电极（G）和切换第一开关元件（Q1）的控制电路（13）之间的电阻器（11）; 以及串联连接在第一开关元件（Q1）的控制电极（G）和第一开关元件（Q1）的低电位侧电极（S）之间的第一电容器（15）和第二开关元件（14））。第二开关元件（14）的高电位侧电极连接到第一开关元件（Q1）的控制电极（G）。第一电容器（15）的电极与第一开关元件（Q1）的低电位侧电极（S）连接。第二开关元件（14）的控制电极连接到与控制电路（13）连接的电阻器（11）的电极。

29. 发明授权

US08575726B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08575726B2
公开(公告)日：2013-11-05
申请号：US12073489
申请日：2008-03-06
申请人： Yoshinori Murakami
发明人： Yoshinori Murakami
IPC分类号： H01L23/58
CPC分类号： H01L23/142 , H01L23/562 , H01L24/31 , H01L24/83 , H01L29/0657 , H01L29/32 , H01L2224/83801 , H01L2924/01006 , H01L2924/01015 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0132 , H01L2924/014 , H01L2924/10158 , H01L2924/10329 , H01L2924/12042 , H01L2924/01014 , H01L2924/01031 , H01L2924/3512 , H01L2924/00
摘要： A semiconductor device includes: a semiconductor chip including: a first main face having an edge portion, a second main face locating the opposite side to the first main face, a crystalline defect region present within a region including at least the edge portion being adjacent to the first main face, the crystalline defect region being configured to have lower stress than the stress in the other semiconductor region for the same strain; and a metallic substrate to be bonded via a bonding member to the first main face of the semiconductor chip.
摘要翻译：一种半导体器件，包括：半导体芯片，包括：第一主面，其具有边缘部分，与第一主面相对设置的第二主面，存在于至少包括与第一主面相邻的边缘部分的区域内的晶体缺陷区域第一主面，所述晶体缺陷区域被配置为具有比用于相同应变的另一个半导体区域中的应力更低的应力; 以及通过接合部件与半导体芯片的第一主面接合的金属基板。

30. 发明授权

US08491873B2 Dentifrice 有权
标题翻译：牙粉
公开(公告)号：US08491873B2
公开(公告)日：2013-07-23
申请号：US13322752
申请日：2010-05-28
申请人： Yoshinori Murakami
发明人： Yoshinori Murakami
IPC分类号： A61Q11/00 , A61K8/00 , A61K8/25
CPC分类号： A61Q11/00 , A61K8/042 , A61K8/25 , A61K8/36
摘要： Provided is a dentifrice which exhibits sufficient shape retentivity even when a polymer-based binder is not incorporated, which does not leave a taste or white residues even when the amount of powder incorporated is small, and which has satisfactory dispersibility in the oral cavity and a light feeling of use.A dentifrice containing the following components (A), (B) and (C): (A) 0.1 to 10% by mass of a thickening silica having an oil absorption of 150 to 500 mL/100 g, (B) 0.1 to 8 % by mass of heavy calcium carbonate, and (C) 40 to 70 % by mass of water at a mass ratio (B:A) of the component (B) and the component (A) of 2:1 to 0.5:99.5.
摘要翻译：即使即使不掺入聚合物类粘合剂也不会留下味道或白色残留物，即使在粉末掺入量小的情况下也具有良好的形状保持性，并且在口腔中具有令人满意的分散性的洁齿剂使用感轻。含有以下成分（A），（B）和（C）的洁齿剂：（A）0.1〜10质量％的吸油量为150〜500mL / 100g的增稠二氧化硅，（B）0.1〜8 质量％的重质碳酸钙，（C）成分（B）和成分（A）的质量比（B：A）为40〜70质量％的比例为2：1〜0.5：99.5。

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