专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US07157778B2 Semiconductor constructions 有权
标题翻译：半导体结构
公开(公告)号：US07157778B2
公开(公告)日：2007-01-02
申请号：US11018848
申请日：2004-12-20
申请人： John T. Moore
发明人： John T. Moore
IPC分类号： H01L29/76 , H01L31/062
CPC分类号： H01L21/823462 , H01L21/3145 , H01L21/31612
摘要： The invention encompasses a method of forming an oxide region over a semiconductor substrate. A nitrogen-containing layer is formed across at least some of the substrate. After the nitrogen-containing layer is formed, an oxide region is grown from at least some of the substrate. The nitrogen of the nitrogen-containing layer is dispersed within the oxide region. The invention also encompasses a method of forming a pair of transistors associated with a semiconductor substrate. A substrate is provided. A first region of the substrate is defined, and additionally a second region of the substrate is defined. A first oxide region is formed which covers at least some of the first region of the substrate, and which does not cover any of the second region of the substrate. A nitrogen-comprising layer is formed across at least some of the first oxide region and across at least some of the second region of the substrate. After the nitrogen-comprising layer is formed, a second oxide region is grown from the second region of the substrate. A first transistor gate is formed over the first oxide region, and a second transistor gate is formed over the second oxide region.
摘要翻译：本发明包括在半导体衬底上形成氧化物区域的方法。在至少一些基底上形成含氮层。在形成含氮层之后，从衬底中的至少一些生长氧化物区域。含氮层的氮分散在氧化物区域内。本发明还包括形成与半导体衬底相关联的一对晶体管的方法。提供基板。限定衬底的第一区域，并且另外定义衬底的第二区域。形成第一氧化物区域，其覆盖衬底的第一区域中的至少一些，并且不覆盖衬底的任何第二区域。跨越第一氧化物区域中的至少一些并穿过衬底的至少一些第二区域形成含氮层。在形成含氮层之后，从衬底的第二区域生长第二氧化物区域。在第一氧化物区域上形成第一晶体管栅极，在第二氧化物区域上形成第二晶体管栅极。

22. 发明授权

US07151273B2 Silver-selenide/chalcogenide glass stack for resistance variable memory 失效
标题翻译：用于电阻变量记忆的硒化银/硫族化物玻璃堆叠
公开(公告)号：US07151273B2
公开(公告)日：2006-12-19
申请号：US10120521
申请日：2002-04-12
申请人： Kristy A. Campbell , John T. Moore
发明人： Kristy A. Campbell , John T. Moore
IPC分类号： H01L29/04
CPC分类号： G11C13/0011 , G11C2213/51 , G11C2213/56 , H01L45/085 , H01L45/1233 , H01L45/143 , H01L45/1616 , H01L45/1625
摘要： The invention is related to methods and apparatus for providing a resistance variable memory element with improved data retention and switching characteristics. According to an embodiment of the invention a resistance variable memory element is provided having at least one silver-selenide layer in between glass layers, wherein at least one of the glass layers is a chalcogenide glass, preferably having a GexSe100−x composition.
摘要翻译：本发明涉及用于提供具有改进的数据保持和切换特性的电阻可变存储元件的方法和装置。根据本发明的实施例，提供了一种电阻可变存储元件，其在玻璃层之间具有至少一个硒化银层，其中至少一个玻璃层是硫族化物玻璃，优选具有Ge x 100＆lt; 100＆lt; 100＆gt;组合物。

23. 发明授权

US07141850B2 Gated semiconductor assemblies and methods of forming gated semiconductor assemblies 有权
标题翻译：门控半导体组件和形成门控半导体组件的方法
公开(公告)号：US07141850B2
公开(公告)日：2006-11-28
申请号：US10769573
申请日：2004-01-30
申请人： Mark A. Helm , Mark Fischer , John T. Moore , Scott Jeffrey DeBoer
发明人： Mark A. Helm , Mark Fischer , John T. Moore , Scott Jeffrey DeBoer
IPC分类号： H01L29/792
CPC分类号： H01L29/7881 , H01L21/28273 , H01L29/511
摘要： In one aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a silicon nitride layer over and against a floating gate; and b) forming a control gate over the silicon nitride layer. In another aspect, the invention includes a method of forming a gated semiconductor assembly, comprising: a) forming a floating gate layer over a substrate; b) forming a silicon nitride layer over the floating gate layer, the silicon nitride layer comprising a first portion and a second portion elevationally displaced from the first portion, the first portion having a greater stoichiometric amount of silicon than the second portion; and c) forming a control gate over the silicon nitride layer. In yet another aspect, the invention includes a gated semiconductor assembly comprising: a) a substrate; b) a floating gate over the substrate; c) a control gate over the floating gate; and d) an electron barrier layer between the floating gate and the control gate, the electron barrier layer comprising a silicon nitride layer, the silicon nitride layer comprising a first portion and a second portion elevationally displaced from the first portion, the first portion having a greater stoichiometric amount of silicon than the second portion.
摘要翻译：一方面，本发明包括一种形成门控半导体组件的方法，包括：a）在浮动栅极上形成氮化硅层; 以及b）在所述氮化硅层上形成控制栅极。另一方面，本发明包括形成门控半导体组件的方法，包括：a）在衬底上形成浮栅; b）在所述浮栅上形成氮化硅层，所述氮化硅层包括从所述第一部分向前倾斜的第一部分和第二部分，所述第一部分具有比所述第二部分更大的化学计量的硅量; 以及c）在所述氮化硅层上形成控制栅极。在另一方面，本发明包括门控半导体组件，其包括：a）衬底; b）衬底上的浮栅; c）浮动门上的控制门; 以及d）在所述浮动栅极和所述控制栅极之间的电子势垒层，所述电子势垒层包括氮化硅层，所述氮化硅层包括第一部分和从所述第一部分向上偏移的第二部分，所述第一部分具有比第二部分更大的化学计量的硅。

24. 发明授权

US07115504B2 Method of forming electrode structure for use in an integrated circuit 有权
标题翻译：形成用于集成电路的电极结构的方法
公开(公告)号：US07115504B2
公开(公告)日：2006-10-03
申请号：US10873230
申请日：2004-06-23
申请人： John T. Moore , Joseph F. Brooks
发明人： John T. Moore , Joseph F. Brooks
IPC分类号： H01L21/44
CPC分类号： H01L24/05 , G11C13/0011 , G11C2213/79 , H01L21/76823 , H01L21/76838 , H01L21/76867 , H01L24/03 , H01L45/085 , H01L45/124 , H01L45/143 , H01L45/1658 , H01L45/1683 , H01L2224/05006 , H01L2224/05546 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01028 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01057 , H01L2924/01074 , H01L2924/01082 , H01L2924/05042 , H01L2924/13091 , H01L2924/14 , H01L2924/19043 , H01L2924/3011 , Y10S438/957 , H01L2924/00
摘要： An electrode structure includes a first layer of conductive material and a dielectric layer formed on a surface of the first layer. An opening is formed in the dielectric layer to expose a portion of the surface of the first layer. A binding layer is formed on the dielectric layer and on the exposed portion of the surface of the first layer and a second layer of conductive material is formed on the conductive binding layer. The binding layer can be an oxide and the second layer a conductive material that is diffusible into an oxide. The electrode structure can be annealed to cause conductive material from the second layer to be chemisorbed into the binding layer to improve adhesion between the first and second layers. A programmable cell can be formed by forming a doped glass layer in the electrode structure.
摘要翻译：电极结构包括第一层导电材料和形成在第一层表面上的电介质层。在电介质层中形成开口以露出第一层表面的一部分。在电介质层上和第一层的表面的暴露部分上形成粘合层，并且在导电结合层上形成第二导电材料层。结合层可以是氧化物，第二层是可扩散到氧化物中的导电材料。可以将电极结构退火以使来自第二层的导电材料被化学吸附到结合层中，以改善第一和第二层之间的粘附。可以通过在电极结构中形成掺杂的玻璃层来形成可编程单元。

25. 发明授权

US07105864B2 Non-volatile zero field splitting resonance memory 有权
标题翻译：非易失性零场分离共振存储器
公开(公告)号：US07105864B2
公开(公告)日：2006-09-12
申请号：US10765911
申请日：2004-01-29
申请人： Kristy A. Campbell , Terry L. Gilton , John T. Moore
发明人： Kristy A. Campbell , Terry L. Gilton , John T. Moore
IPC分类号： H01L29/24
CPC分类号： H01L45/04 , G11C11/56 , G11C13/00 , H01L27/2463 , H01L45/1213 , H01L45/1233 , H01L45/14 , H01L45/143 , H01L45/145 , H01L45/1625 , H01L45/1658
摘要： A low-volatility or non-volatility memory device utilizing zero field splitting properties to store data. In response to an electrical pulse or a light pulse, in the absence of any externally applied magnetic field, the host material can switch between stable energy-absorbing states based on the zero field splitting properties of the metal ions and the surrounding host material. The invention also includes a device and method for the storage of multiple bits in a single cell using a plurality of metal ion species in a single host material.
摘要翻译：利用零场分割属性存储数据的低挥发性或非易失性存储器件。响应于电脉冲或光脉冲，在没有任何外部施加的磁场的情况下，主体材料可以基于金属离子和周围主体材料的零场分裂特性在稳定的能量吸收状态之间切换。本发明还包括用于在单个主机材料中使用多个金属离子种类在单个电池中存储多个位的装置和方法。

26. 发明授权

US07094700B2 Plasma etching methods and methods of forming memory devices comprising a chalcogenide comprising layer received operably proximate conductive electrodes 有权
标题翻译：等离子体蚀刻方法和形成存储器件的方法，包括可靠地接近导电电极接收的含硫族化物的层
公开(公告)号：US07094700B2
公开(公告)日：2006-08-22
申请号：US10932282
申请日：2004-09-02
申请人： Li Li , Terry L. Gilton , Kei-Yu Ko , John T. Moore , Karen Signorini
发明人： Li Li , Terry L. Gilton , Kei-Yu Ko , John T. Moore , Karen Signorini
IPC分类号： H01L21/302 , H01L21/3065
CPC分类号： H01L45/143 , H01L45/085 , H01L45/1233 , H01L45/1675
摘要： In one implementation, a plasma etching method comprises forming a GexSey chalcogenide comprising layer over a substrate. A mask comprising an organic masking material is formed over the GexSey chalcogenide comprising layer. The mask comprises a sidewall. At least prior to plasma etching the GexSey comprising layer, the sidewall of the mask is exposed to a fluorine comprising material. After said exposing, the GexSey chalcogenide comprising layer is plasma etched using the mask and a hydrogen containing etching gas. The plasma etching forms a substantially vertical sidewall of the GexSey chalcogenide comprising layer which is aligned with a lateral outermost extent of the sidewall of the mask.
摘要翻译：在一个实施方案中，等离子体蚀刻方法包括在衬底上形成包含Ge x Ga 2 O 3的硫属元素化层。包含有机掩模材料的掩模形成在包含硫族元素的层上。掩模包括侧壁。至少在等离子体蚀刻包含Ge层之前，掩模的侧壁暴露于含氟材料。在所述曝光之后，使用掩模和含氢蚀刻气体等离子体蚀刻含有硫族化合物的层。等离子体蚀刻形成了与掩模的侧壁的最外侧横向对齐的包含Ge的硫属化合物层的基本上垂直的侧壁。

27. 发明授权

US07057263B2 Semiconductor wafer assemblies comprising photoresist over silicon nitride materials 失效
公开(公告)号：US07057263B2
公开(公告)日：2006-06-06
申请号：US10734419
申请日：2003-12-11
申请人： John T. Moore , Scott Jeffrey DeBoer , Mark Fischer , J. Brett Rolfson , Annette L. Martin , Ardavan Niroomand
发明人： John T. Moore , Scott Jeffrey DeBoer , Mark Fischer , J. Brett Rolfson , Annette L. Martin , Ardavan Niroomand
IPC分类号： H01L23/58
CPC分类号： H01L21/0217 , G03F7/091 , H01L21/022 , H01L21/02271 , H01L21/02304 , H01L21/02362 , H01L21/0274 , H01L21/0332 , H01L21/31144 , H01L21/312 , H01L21/3185
摘要： In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer. In another aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; c) forming a photoresist over and against the barrier layer; d) exposing the photoresist to a patterned beam of light to render at least one portion of the photoresist more soluble in a solvent than an other portion, the barrier layer being an antireflective surface that absorbs light passing through the photoresist; and e) exposing the photoresist to the solvent to remove the at least one portion while leaving the other portion over the barrier layer. In yet another aspect, the invention includes a semiconductor wafer assembly, comprising: a) a silicon nitride material, the material having a surface; b) a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) a photoresist over and against the barrier layer.

28. 发明授权

US07056762B2 Methods to form a memory cell with metal-rich metal chalcogenide 失效
标题翻译：用金属富金属硫族化物形成记忆电池的方法
公开(公告)号：US07056762B2
公开(公告)日：2006-06-06
申请号：US10769787
申请日：2004-02-03
申请人： John T. Moore , Terry L. Gilton , Kristy A. Campbell
发明人： John T. Moore , Terry L. Gilton , Kristy A. Campbell
IPC分类号： H01L21/06
CPC分类号： H01L45/1675 , H01L27/2463 , H01L45/085 , H01L45/143 , H01L45/1641
摘要： The invention relates to the fabrication of a resistance variable material cell or programmable metallization cell. The processes described herein can form a metal-rich metal chalcogenide, such as, for example, silver-rich silver selenide. Advantageously, the processes can form the metal-rich metal chalcogenide without the use of photodoping techniques and without direct deposition of the metal. For example, the process can remove selenium from silver selenide. One embodiment of the process implants oxygen to silver selenide to form selenium oxide. The selenium oxide is then removed by annealing, which results in silver-rich silver selenide. Advantageously, the processes can dope silver into a variety of materials, including non-transparent materials, with relatively high uniformity and with relatively precise control.
摘要翻译：本发明涉及电阻可变材料单元或可编程金属化单元的制造。本文所述的方法可形成金属富金属硫族化物，例如富银硒化银。有利的是，该方法可以形成富含金属的金属硫属元素化物，而不需要使用光致激发技术，而不会直接沉积金属。例如，该过程可以从硒化银中除去硒。该方法的一个实施方案是将氧沉积到硒化银以形成氧化硒。然后通过退火除去氧化硒，这导致富银银硒化银。有利的是，该方法可以将银掺杂到各种材料中，包括非透明材料，具有相对高的均匀性和相对精确的控制。

29. 发明授权

US07050319B2 Memory architecture and method of manufacture and operation thereof 有权
公开(公告)号：US07050319B2
公开(公告)日：2006-05-23
申请号：US10725557
申请日：2003-12-03
申请人： John T. Moore , Terry L. Gilton
发明人： John T. Moore , Terry L. Gilton
IPC分类号： G11C5/06
CPC分类号： G11C13/003 , G11C5/063 , G11C7/18 , G11C11/4097 , G11C13/0011 , G11C13/004 , G11C2213/75 , G11C2213/76 , G11C2213/79 , H01L27/0203 , H01L27/105 , H01L27/1052
摘要： An architecture, and its method of formation and operation, containing a high density memory array of semi-volatile or non-volatile memory elements, including, but not limited to, programmable conductive access memory elements. The architecture in one exemplary embodiment has a pair of semi-volatile or non-volatile memory elements which selectively share a bit line through respective first electrodes and access transistors controlled by respective word lines. The memory elements each have a respective second electrode coupled thereto which in cooperation with the bit line access transistors and first electrode, serves to apply read, write and erase signals to the memory element.

30. 发明授权

US06998697B2 Non-volatile resistance variable devices 有权
标题翻译：非易失性电阻变量器件
公开(公告)号：US06998697B2
公开(公告)日：2006-02-14
申请号：US10736617
申请日：2003-12-17
申请人： Kristy A. Campbell , John T. Moore
发明人： Kristy A. Campbell , John T. Moore
IPC分类号： H01L29/00
CPC分类号： H01L45/1658 , H01L45/085 , H01L45/1233 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/1616 , H01L45/1683
摘要： A chalcogenide comprising material is formed to a first thickness over the first conductive electrode material. The chalcogenide material comprises AxBy. A metal comprising layer is formed to a second thickness over the chalcogenide material. The metal comprising layer defines some metal comprising layer transition thickness for the first thickness of the chalcogenide comprising material such that when said transition thickness is met or exceeded, said metal comprising layer when diffused within said chalcogenide comprising material transforms said chalcogenide comprising material from an amorphous state to a crystalline state. The second thickness being less than but not within 10% of said transition thickness. The metal is irradiated effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal into the chalcogenide material.
摘要翻译：含硫族化物的材料在第一导电电极材料上形成为第一厚度。硫族化物材料包含A x B B y Y y。包含金属的层在硫族化物材料上形成第二厚度。包含金属的层限定了包含硫族化物包含材料的第一厚度的一些金属包含层过渡厚度，使得当满足或超过所述过渡厚度时，当所述含硫属化物包含材料中扩散时所述金属包含层将包含所述含硫族化物的材料从非晶态状态为结晶状态。第二厚度小于但不在所述转变厚度的10％以内。金属被照射有效地在金属和硫族化物材料的界面处破坏硫族化物材料的硫族化物键，并将至少一些金属扩散到硫族化物材料中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式