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    • 21. 发明授权
    • Method of fabricating thin film transistor array
    • 制造薄膜晶体管阵列的方法
    • US5966589A
    • 1999-10-12
    • US989573
    • 1997-12-12
    • Takahiko WatanabeOsamu Sukegawa
    • Takahiko WatanabeOsamu Sukegawa
    • G02F1/1362H01L21/77H01L21/84H01L27/12H01L21/00
    • G02F1/13458G02F1/136213H01L27/1214
    • There is provided a method of fabricating a thin film transistor array having a transparent insulating substrate, a plurality of thin film transistors formed on the substrate in a matrix, a gate bus line connected to gate electrodes of the thin film transistors, a drain bus line connected to drain electrodes of the thin film transistors, and a pixel electrode driven by the thin film transistors, the method including the steps of forming the gate electrode and the gate bus line on the transparent insulating substrate, forming a gate insulating film over the substrate, forming an operative semiconductor on the gate insulating film, forming the source electrodes, drain electrodes, and drain bus line of the thin film transistors on the gate insulating film and the operative semiconductor, forming a protection film all over the substrate, removing a portion of both the gate insulating film and the protection film, located above a terminal of the gate bus line, and also removing a portion of the protection film located above a terminal of the drain bus line, and forming the pixel electrode on the substrate. The above-mentioned method makes it possible to make a gate bus line and a drain bus line appear by only one photolithography step. Hence, the above-mentioned method needs to carry out only five photolithography steps to fabricate a thin film transistor array, whereas the conventional methods have to carry out six photolithography steps.
    • 提供一种制造薄膜晶体管阵列的方法,该薄膜晶体管阵列具有透明绝缘基板,在矩阵中形成在基板上的多个薄膜晶体管,连接到薄膜晶体管的栅电极的栅极总线,漏极总线 连接到薄膜晶体管的漏电极和由薄膜晶体管驱动的像素电极,所述方法包括以下步骤:在透明绝缘基板上形成栅极电极和栅极总线,在基板上形成栅极绝缘膜 在所述栅极绝缘膜上形成工作半导体,在所述栅极绝缘膜和所述有效半导体上形成所述薄膜晶体管的源电极,漏电极和漏极总线,在所述基板上形成保护膜, 栅极绝缘膜和保护膜两者位于栅极总线的端子之上,并且还去除了一部分 所述保护膜位于所述漏极总线的端子上方,并且在所述衬底上形成所述像素电极。 上述方法使得可以仅通过一个光刻步骤来形成栅极总线和漏极总线。 因此,上述方法只需要执行五个光刻步骤来制造薄膜晶体管阵列,而常规方法必须执行六个光刻步骤。
    • 22. 发明授权
    • LCD device with connection lines having different resistances
    • 具有不同电阻的连接线的LCD装置
    • US5870163A
    • 1999-02-09
    • US791612
    • 1997-01-31
    • Makoto WatanabeOsamu SukegawaTakahiko Watanabe
    • Makoto WatanabeOsamu SukegawaTakahiko Watanabe
    • G02F1/1345
    • G02F1/1345
    • An LCD device that is able to remove the luminance unevenness on the display area while preventing the short-circuit and open-circuit is provided. The LCD device includes a liquid-crystal panel having first and second substrates and liquid crystal filled in a space formed between the first and second substrates. Pixel electrodes are formed on the first substrate and are arranged in a matrix array in a display area of the panel. Driving lines are formed on the first substrate in the display area and are electrically connected to the respective pixel electrodes. Terminal areas are formed on the first substrate outside the display area. Driver ICs are mounted on the first substrate outside the display area and are electrically connected to the corresponding terminal areas. Connection lines are formed on the first substrate outside the display area and are electrically connected to the respective driving lines and the corresponding terminal areas. The resistance difference of any adjacent two ones of the connection lines is lower than a threshold resistance value at which a man is able to recognize the luminance unevenness on the display area.
    • 提供能够在防止短路和开路的同时消除显示区域上的亮度不均匀的LCD装置。 LCD装置包括具有第一和第二基板的液晶面板和填充在第一和第二基板之间形成的空间中的液晶。 像素电极形成在第一基板上,并且以矩阵阵列布置在面板的显示区域中。 驱动线形成在显示区域的第一基板上,与各像素电极电连接。 端子区域形成在显示区域外的第一基板上。 驱动器IC安装在显示区域外部的第一基板上,并且电连接到相应的端子区域。 连接线形成在显示区域外的第一基板上,并且电连接到相应的驱动线和相应的端子区域。 连接线中相邻的两个连接线的电阻差低于人能够识别显示区域上的亮度不均匀性的阈值电阻值。
    • 29. 发明授权
    • Liquid crystal display apparatus having terminal protected from break
down
    • 液晶显示装置具有防止分解的端子
    • US5636329A
    • 1997-06-03
    • US493537
    • 1995-06-22
    • Osamu SukegawaTakahiko WatanabeWakahiko Kaneko
    • Osamu SukegawaTakahiko WatanabeWakahiko Kaneko
    • G02F1/1333G02F1/13G02F1/1345G02F1/1343
    • G02F1/13452
    • A lower layer metal wiring is led out from a display portion to a terminal portion provided to the periphery of the glass substrate and covered at the upper surface with an interlayer insulation film. An upper layer metal wiring formed on the interlayer insulation film is connected to the lower layer metal wiring by way of contact holes formed in the interlayer insulation film. The upper layer metal wiring is completely covered by the transparent conductive film. A protective insulation film is formed on the transparent conductive film, and an opening is made in to the protective insulation film in the terminal portion. In the terminal portion, copper foil wirings of a flexible wiring substrate are connected by way of an anisotropic conductive film. The upper layer metal wiring is removed at a portion not protected by the protective insulation film or the anisotropic conductive film.
    • 下层金属布线从显示部分引出到设置在玻璃基板周边的端子部分,并在上表面用层间绝缘膜覆盖。 通过在层间绝缘膜中形成的接触孔将形成在层间绝缘膜上的上层金属布线连接到下层金属布线。 上层金属布线被透明导电膜完全覆盖。 在透明导电膜上形成保护绝缘膜,并在端子部分形成保护绝缘膜。 在端子部分,柔性布线基板的铜箔布线通过各向异性导电膜连接。 在不被保护绝缘膜或各向异性导电膜保护的部分去除上层金属布线。