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21. 发明申请

US20100072593A1 Semiconductor package and method for manufacturing the same 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US20100072593A1
公开(公告)日：2010-03-25
申请号：US12586565
申请日：2009-09-24
申请人： Young Lyong Kim , Jongho Lee , Cheul-Joong Youn , Eunchul Ahn
发明人： Young Lyong Kim , Jongho Lee , Cheul-Joong Youn , Eunchul Ahn
IPC分类号： H01L23/495
CPC分类号： H01L23/49827 , H01L21/563 , H01L23/3128 , H01L23/49531 , H01L23/49575 , H01L23/49861 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L2224/32014 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/48247 , H01L2224/49175 , H01L2224/73203 , H01L2224/73207 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06527 , H01L2225/1023 , H01L2225/1029 , H01L2225/1041 , H01L2225/1058 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package includes a first package including at least one first semiconductor chip; a second package including an external connection terminal and at least one second semiconductor chip, the second package being stacked on the first package; and an interposer disposed between the first and second packages and connected to the external connection terminal to electrically connect the first and second packages to each other. The interposer comprises an intermediate connector having an exposed end portion to which the second package is electrically connected via the external connection terminal and a protruding end portion lower than the exposed end portion to which the first package is electrically connected.
摘要翻译：半导体封装包括包括至少一个第一半导体芯片的第一封装; 包括外部连接端子和至少一个第二半导体芯片的第二封装，所述第二封装堆叠在所述第一封装上; 以及设置在第一和第二封装之间并且连接到外部连接端子以将第一和第二封装彼此电连接的插入器。插入器包括具有暴露端部的中间连接器，第二封装经由外部连接端子电连接到该外部端部，以及比第一封装电连接到的暴露端部低的突出端部。

22. 发明授权

US07112539B2 Dielectric layer for semiconductor device and method of manufacturing the same 有权
公开(公告)号：US07112539B2
公开(公告)日：2006-09-26
申请号：US10999608
申请日：2004-11-29
申请人： Jongho Lee , Nae-In Lee
发明人： Jongho Lee , Nae-In Lee
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L28/56 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/7881 , H01L29/94
摘要： A multi-layer dielectric layer structure for a semiconductor device. The multi-layer dielectric layer structure comprises a silicate interface layer having a dielectric constant greater than that of silicon nitride and a high-k dielectric layer overlying the silicate interface layer. The high-k dielectric layer comprises one or more ordered pairs of first and second layers. With the present invention, the dielectric constant of the high-k dielectric layer can be optimized while improving interface characteristics. With a higher crystallization temperature realized by forming the multi-layer structure, each of whose layers is not more than the critical thickness, leakage current can be reduced, thereby improving device performance.

23. 发明授权

US09343437B2 Semiconductor package devices 有权
标题翻译：半导体封装器件
公开(公告)号：US09343437B2
公开(公告)日：2016-05-17
申请号：US14680094
申请日：2015-04-07
申请人： Ae-nee Jang , Jin-Woo Park , Seokhyun Lee , Jongho Lee
发明人： Ae-nee Jang , Jin-Woo Park , Seokhyun Lee , Jongho Lee
IPC分类号： H01L23/10 , H01L25/065 , H01L23/373 , H01L23/367 , H01L23/528 , H01L23/31
CPC分类号： H01L25/0657 , H01L23/3107 , H01L23/3128 , H01L23/36 , H01L23/3675 , H01L23/3735 , H01L23/3736 , H01L23/42 , H01L23/49816 , H01L23/528 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06575 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2225/1094 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： Semiconductor package devices and methods of forming the semiconductor package devices are provided. The semiconductor package devices may include a lower package including a lower semiconductor chip on a lower substrate, an upper package including an upper semiconductor chip on an upper substrate. The upper substrate may include a protruding part corresponding to the lower semiconductor chip and a connection part that has a bottom surface lower than a bottom surface of the protruding part and is disposed around the protruding part. The semiconductor package devices may also include a heat dissipation part in a space between the lower semiconductor chip and the protruding part on the upper substrate and a package connection pattern electrically connecting the lower package to the upper package.
摘要翻译：提供半导体封装器件和形成半导体封装器件的方法。半导体封装器件可以包括下封装，其包括在下基板上的下半导体芯片，在上基板上包括上半导体芯片的上封装。上基板可以包括对应于下半导体芯片的突出部分和具有低于突出部分的底表面的底表面并且布置在突出部分周围的连接部分。半导体封装器件还可以包括在下半导体芯片和上基板上的突出部分之间的空间中的散热部分和将下封装电连接到上封装的封装连接图案。

24. 发明授权

US08482077B2 Semiconductor devices and methods for fabricating the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US08482077B2
公开(公告)日：2013-07-09
申请号：US13102860
申请日：2011-05-06
申请人： Jongho Lee , Chang-Bong Oh , Ho Lee , Myungsun Kim
发明人： Jongho Lee , Chang-Bong Oh , Ho Lee , Myungsun Kim
IPC分类号： H01L29/78
CPC分类号： H01L21/823807 , H01L21/28238 , H01L21/823412 , H01L21/823462 , H01L21/823857 , H01L29/513 , H01L29/517
摘要： A semiconductor device includes a substrate including a first region and a second region each having an n-type region and a p-type region, wherein the n-type region in the first region includes a silicon channel, the p-type region in the first region includes a silicon germanium channel, and the n-type region and the p-type region in the second region respectively include a silicon channel. A first gate insulating pattern formed of a thermal oxide layer is disposed on the substrate of the n-type and p-type regions in the second region.
摘要翻译：半导体器件包括：衬底，包括第一区域和第二区域，每个区域具有n型区域和p型区域，其中第一区域中的n型区域包括硅沟道，第一区域包括硅锗沟道，并且第二区域中的n型区域和p型区域分别包括硅沟道。在第二区域中的n型和p型区域的基板上设置由热氧化物层形成的第一栅极绝缘图案。

25. 发明申请

US20110311668A1 APPARATUS AND METHOD FOR MANUFACTURING VEHICLE DOOR TRIM AND VEHICLE DOOR TRIM MANUFACTURED USING THE METHOD 有权
标题翻译：使用该方法制造车辆门和车门的装置和方法
公开(公告)号：US20110311668A1
公开(公告)日：2011-12-22
申请号：US13221639
申请日：2011-08-30
申请人： Jongho Lee
发明人： Jongho Lee
IPC分类号： B29C45/14
CPC分类号： B29C45/1635 , B29C45/27 , B29L2031/3005 , B60R13/0243
摘要： A first mold has a core passage, and first and second cavities in fluid communication with each other at the core passage. A second mold has first and second nozzles therein that inject first and second resins to the first and second cavities, respectively. The core member is slidable within the core passage to provide or block the fluid communication between the cavities, and has a third nozzle therein to inject a third resin to the core passage. The first and second resins are injected into the cavities. The core member is moved to block the fluid communication between the cavities, before injecting the first and second resins is completed. The third resin is injected while moving the core member to provide the fluid communication, after injecting the first and second resins is completed. The molds are separated, thereby yielding a single molded product, such as a vehicle door trim.
摘要翻译：第一模具具有芯通道，并且在芯通道处彼此流体连通的第一和第二空腔。第二模具在其中具有分别将第一和第二树脂注入到第一和第二空腔中的第一和第二喷嘴。芯构件可在芯通道内滑动以提供或阻挡空腔之间的流体连通，并且其中具有第三喷嘴以将第三树脂注入到芯通道。将第一和第二树脂注入到空腔中。在完成注入第一和第二树脂之前，移动芯构件以阻止空腔之间的流体连通。在移动芯部件以提供流体连通时注入第三树脂，在完成注入第一和第二树脂之后。模具被分离，从而产生单个模制产品，例如车门装饰件。

26. 发明申请

US20050074982A1 Dielectric layer for semiconductor device and method of manufacturing the same 有权
公开(公告)号：US20050074982A1
公开(公告)日：2005-04-07
申请号：US10999608
申请日：2004-11-29
申请人： Jongho Lee , Nae-In Lee
发明人： Jongho Lee , Nae-In Lee
IPC分类号： H01L21/8247 , H01L21/02 , H01L21/28 , H01L21/31 , H01L21/316 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L27/04 , H01L27/105 , H01L27/108 , H01L27/115 , H01L29/51 , H01L29/78 , H01L29/788 , H01L29/792 , H01L29/94 , H01L21/00
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L28/56 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/7881 , H01L29/94
摘要： A multi-layer dielectric layer structure for a semiconductor device. The multi-layer dielectric layer structure comprises a silicate interface layer having a dielectric constant greater than that of silicon nitride and a high-k dielectric layer overlying the silicate interface layer. The high-k dielectric layer comprises one or more ordered pairs of first and second layers. With the present invention, the dielectric constant of the high-k dielectric layer can be optimized while improving interface characteristics. With a higher crystallization temperature realized by forming the multi-layer structure, each of whose layers is not more than the critical thickness, leakage current can be reduced, thereby improving device performance.

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