专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08815731B2 Semiconductor package and method of fabricating the same 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US08815731B2
公开(公告)日：2014-08-26
申请号：US13174959
申请日：2011-07-01
申请人： Young Lyong Kim , Hyeongseob Kim , Jongho Lee , Eunchul Ahn
发明人： Young Lyong Kim , Hyeongseob Kim , Jongho Lee , Eunchul Ahn
IPC分类号： H01L21/44 , H01L23/00 , H01L23/31 , H01L23/498
CPC分类号： H01L24/14 , H01L23/3128 , H01L23/49811 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/73 , H01L24/81 , H01L2224/0401 , H01L2224/05567 , H01L2224/116 , H01L2224/11848 , H01L2224/13022 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/1403 , H01L2224/14051 , H01L2224/14517 , H01L2224/16225 , H01L2224/16227 , H01L2224/17051 , H01L2224/17179 , H01L2224/17517 , H01L2224/73204 , H01L2224/81191 , H01L2224/81385 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/014 , H01L2924/14 , H01L2924/1434 , H01L2924/15311 , H01L2924/3511 , H01L2224/05552 , H01L2924/00
摘要： A semiconductor package and a method for fabricating the same. The semiconductor package includes a first substrate including a first pad, a second substrate spaced apart from the first substrate and where a second pad is formed to face the first pad, a first bump electrically connecting the first pad to the second pad, and a second bump mechanically connecting the first substrate to the second substrate is disposed between the first substrate where the first pad is not formed and the second substrate where the second pad is not formed. A coefficient of thermal expansion (CTE) of the second bump is smaller than that of the first bump.
摘要翻译：半导体封装及其制造方法。所述半导体封装包括第一衬底，所述第一衬底包括第一焊盘，与所述第一衬底间隔开的第二衬底，以及形成第二焊盘以面对所述第一焊盘的第一焊盘，将所述第一焊盘电连接到所述第二焊盘的第一焊盘，将第一基板与第二基板机械连接的突起设置在不形成第一焊盘的第一基板与不形成第二焊盘的第二基板之间。第二凸块的热膨胀系数（CTE）小于第一凸块的热膨胀系数（CTE）。

2. 发明申请

US20120001329A1 SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US20120001329A1
公开(公告)日：2012-01-05
申请号：US13174959
申请日：2011-07-01
申请人： Young Lyong KIM , Hyeongseob Kim , Jongho Lee , Eunchul Ahn
发明人： Young Lyong KIM , Hyeongseob Kim , Jongho Lee , Eunchul Ahn
IPC分类号： H01L23/48 , H01L21/28
CPC分类号： H01L24/14 , H01L23/3128 , H01L23/49811 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/73 , H01L24/81 , H01L2224/0401 , H01L2224/05567 , H01L2224/116 , H01L2224/11848 , H01L2224/13022 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/1403 , H01L2224/14051 , H01L2224/14517 , H01L2224/16225 , H01L2224/16227 , H01L2224/17051 , H01L2224/17179 , H01L2224/17517 , H01L2224/73204 , H01L2224/81191 , H01L2224/81385 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/014 , H01L2924/14 , H01L2924/1434 , H01L2924/15311 , H01L2924/3511 , H01L2224/05552 , H01L2924/00
摘要： A semiconductor package and a method for fabricating the same. The semiconductor package includes a first substrate including a first pad, a second substrate spaced apart from the first substrate and where a second pad is formed to face the first pad, a first bump electrically connecting the first pad to the second pad, and a second bump mechanically connecting the first substrate to the second substrate is disposed between the first substrate where the first pad is not formed and the second substrate where the second pad is not formed. A coefficient of thermal expansion (CTE) of the second bump is smaller than that of the first bump.
摘要翻译：半导体封装及其制造方法。所述半导体封装包括第一衬底，所述第一衬底包括第一焊盘，与所述第一衬底间隔开的第二衬底，以及形成第二焊盘以面对所述第一焊盘的第一焊盘，将所述第一焊盘电连接到所述第二焊盘的第一焊盘，将第一基板与第二基板机械连接的突起设置在不形成第一焊盘的第一基板与不形成第二焊盘的第二基板之间。第二凸块的热膨胀系数（CTE）小于第一凸块的热膨胀系数（CTE）。

3. 发明申请

US20110137196A1 QUANTITATIVE MOTOR FUNCTION EVALUATION SYSTEM 有权
标题翻译：量化电机功能评估系统
公开(公告)号：US20110137196A1
公开(公告)日：2011-06-09
申请号：US12674709
申请日：2008-02-26
申请人： Shinji Kakei , Jongho Lee , Yasuhiro Kagamihara
发明人： Shinji Kakei , Jongho Lee , Yasuhiro Kagamihara
IPC分类号： A61B5/0488 , A61B5/11
CPC分类号： A61B5/0488 , A61B5/1124 , A61B5/4076 , A61B5/4082 , A61B5/4088 , A61B5/4528
摘要： The system of the present invention includes (a) means for displaying image information including a target image and a cursor image for tracking the target image; (b) means used when the subject moves the cursor image; (c) means for detecting the state of tracking the target image by the cursor image; (d) means for detecting the muscle active state of the subject using the means (b); (e) means for analyzing the tracking state detected by the means (c) and the muscle active state detected by the means (d); and (f) means for evaluating the motor function of the subject by using results of analysis obtained by the means (e) as indexes.
摘要翻译：本发明的系统包括：（a）用于显示包括目标图像和用于跟踪目标图像的光标图像的图像信息的装置; （b）当被摄体移动光标图像时使用的装置; （c）用于通过光标图像检测跟踪目标图像的状态的装置; （d）使用装置（b）检测受试者的肌肉活动状态的装置; （e）用于分析由装置（c）检测到的跟踪状态和由装置（d）检测到的肌肉活动状态的装置; 和（f）通过使用方法（e）作为指标获得的分析结果来评价受试者的运动功能的装置。

4. 发明申请

US20090152769A1 APPARATUS AND METHOD FOR MANUFACTURING VEHICLE DOOR TRIM AND VEHICLE DOOR TRIM MANUFACTURED USING THE METHOD 有权
标题翻译：使用该方法制造车辆门和车门的装置和方法
公开(公告)号：US20090152769A1
公开(公告)日：2009-06-18
申请号：US12244575
申请日：2008-10-02
申请人： Jongho Lee
发明人： Jongho Lee
IPC分类号： B28B1/24
CPC分类号： B29C45/1635 , B29C45/27 , B29L2031/3005 , B60R13/0243
摘要： A first mold has a core passage, and first and second cavities in fluid communication with each other at the core passage. A second mold has first and second nozzles therein that inject first and second resins to the first and second cavities, respectively. The core member is slidable within the core passage to provide or block the fluid communication between the cavities, and has a third nozzle therein to inject a third resin to the core passage. The first and second resins are injected into the cavities. The core member is moved to block the fluid communication between the cavities, before injecting the first and second resins is completed. The third resin is injected while moving the core member to provide the fluid communication, after injecting the first and second resins is completed. The molds are separated, thereby yielding a single molded product, such as a vehicle door trim.
摘要翻译：第一模具具有芯通道，并且在芯通道处彼此流体连通的第一和第二空腔。第二模具在其中具有分别将第一和第二树脂注入到第一和第二空腔中的第一和第二喷嘴。芯构件可在芯通道内滑动以提供或阻挡空腔之间的流体连通，并且其中具有第三喷嘴以将第三树脂注入到芯通道。将第一和第二树脂注入到空腔中。在完成注入第一和第二树脂之前，移动芯构件以阻止空腔之间的流体连通。在移动芯部件以提供流体连通时注入第三树脂，在完成注入第一和第二树脂之后。模具被分离，从而产生单个模制产品，例如车门装饰件。

5. 发明授权

US06844604B2 Dielectric layer for semiconductor device and method of manufacturing the same 有权
标题翻译：用于半导体器件的介电层及其制造方法
公开(公告)号：US06844604B2
公开(公告)日：2005-01-18
申请号：US09776059
申请日：2001-02-02
申请人： Jongho Lee , Nae-In Lee
发明人： Jongho Lee , Nae-In Lee
IPC分类号： H01L21/8247 , H01L21/02 , H01L21/28 , H01L21/31 , H01L21/316 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L27/04 , H01L27/105 , H01L27/108 , H01L27/115 , H01L29/51 , H01L29/78 , H01L29/788 , H01L29/792 , H01L29/94 , H01L29/76
CPC分类号： H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L28/56 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/7881 , H01L29/94
摘要： A multi-layer dielectric layer structure for a semiconductor device. The multi-layer dielectric layer structure comprises a silicate interface layer having a dielectric constant greater than that of silicon nitride and a high-k dielectric layer overlying the silicate interface layer. The high-k dielectric layer comprises one or more ordered pairs of first and second layers. With the present invention, the dielectric constant of the high-k dielectric layer can be optimized while improving interface characteristics. With a higher crystallization temperature realized by forming the multi-layer structure, each of whose layers is not more than the critical thickness, leakage current can be reduced, thereby improving device performance.
摘要翻译：一种用于半导体器件的多层电介质层结构。多层介电层结构包括具有大于氮化硅的介电常数的硅酸盐界面层和覆盖硅酸盐界面层的高k电介质层。高k电介质层包括一个或多个有序的第一和第二层对。利用本发明，可以优化高k电介质层的介电常数，同时改善界面特性。通过形成多层结构实现的更高的结晶温度，其层数不大于临界厚度，可以降低漏电流，从而提高器件性能。

6. 发明申请

US20150155199A1 SEMICONDUCTOR PACKAGES AND METHODS OF FORMING THE SAME 审中-公开
标题翻译：半导体封装及其形成方法
公开(公告)号：US20150155199A1
公开(公告)日：2015-06-04
申请号：US14613154
申请日：2015-02-03
申请人： Young Lyong KIM , Taehoon KIM , Jongho LEE , Chul-Yong JANG
发明人： Young Lyong KIM , Taehoon KIM , Jongho LEE , Chul-Yong JANG
IPC分类号： H01L21/768 , H01L25/00
CPC分类号： H01L21/76802 , H01L23/3121 , H01L23/3135 , H01L23/3185 , H01L24/24 , H01L24/82 , H01L25/0657 , H01L25/50 , H01L2224/24146 , H01L2224/24225 , H01L2224/24226 , H01L2224/24227 , H01L2224/32145 , H01L2224/32225 , H01L2224/73267 , H01L2224/76155 , H01L2224/82102 , H01L2224/92144 , H01L2225/06524 , H01L2225/06562 , H01L2225/06568 , H01L2924/01012 , H01L2924/01029 , H01L2924/12042 , H01L2924/181 , H01L2924/00
摘要： A semiconductor package may include a substrate including a substrate connection terminal, at least one semiconductor chip stacked on the substrate and having a chip connection terminal, a first insulating layer covering at least portions of the substrate and the at least one semiconductor chip, and/or an interconnection penetrating the first insulating layer to connect the substrate connection terminal to the chip connection terminal. A semiconductor package may include stacked semiconductor chips, edge portions of the semiconductor chips constituting a stepped structure, and each of the semiconductor chips including a chip connection terminal; at least one insulating layer covering at least the edge portions of the semiconductor chips; and/or an interconnection penetrating the at least one insulating layer to connect to the chip connection terminal of each of the semiconductor chips.
摘要翻译：半导体封装可以包括：衬底，其包括衬底连接端子，堆叠在衬底上并具有芯片连接端子的至少一个半导体芯片，覆盖衬底和至少一个半导体芯片的至少一部分的第一绝缘层和/ 或穿透第一绝缘层的互连以将衬底连接端子连接到芯片连接端子。半导体封装可以包括堆叠的半导体芯片，半导体芯片的边缘部分构成阶梯结构，并且每个半导体芯片包括芯片连接端子; 至少一个绝缘层，至少覆盖半导体芯片的边缘部分; 和/或穿透至少一个绝缘层的互连以连接到每个半导体芯片的芯片连接端子。

7. 发明授权

US08246334B2 Apparatus for manufacturing a vehicle door trim 有权
标题翻译：用于制造车门装饰件的装置
公开(公告)号：US08246334B2
公开(公告)日：2012-08-21
申请号：US13221639
申请日：2011-08-30
申请人： Jongho Lee
发明人： Jongho Lee
IPC分类号： B29C45/22
CPC分类号： B29C45/1635 , B29C45/27 , B29L2031/3005 , B60R13/0243
摘要： A first mold has a core passage, and first and second cavities in fluid communication with each other at the core passage. A second mold has first and second nozzles therein that inject first and second resins to the first and second cavities, respectively. The core member is slidable within the core passage to provide or block the fluid communication between the cavities, and has a third nozzle therein to inject a third resin to the core passage. The first and second resins are injected into the cavities. The core member is moved to block the fluid communication between the cavities, before injecting the first and second resins is completed. The third resin is injected while moving the core member to provide the fluid communication, after injecting the first and second resins is completed. The molds are separated, thereby yielding a single molded product, such as a vehicle door trim.
摘要翻译：第一模具具有芯通道，并且在芯通道处彼此流体连通的第一和第二空腔。第二模具在其中具有分别将第一和第二树脂注入到第一和第二空腔中的第一和第二喷嘴。芯构件可在芯通道内滑动以提供或阻挡空腔之间的流体连通，并且其中具有第三喷嘴以将第三树脂注入到芯通道。将第一和第二树脂注入到空腔中。在完成注入第一和第二树脂之前，移动芯构件以阻止空腔之间的流体连通。在移动芯部件以提供流体连通时注入第三树脂，在完成注入第一和第二树脂之后。模具被分离，从而产生单个模制产品，例如车门装饰件。

8. 发明申请

US20110095418A1 SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体封装及其制造方法
公开(公告)号：US20110095418A1
公开(公告)日：2011-04-28
申请号：US12788901
申请日：2010-05-27
申请人： HWAN-SIK LIM , SUNWON KANG , JONGHO LEE
发明人： HWAN-SIK LIM , SUNWON KANG , JONGHO LEE
IPC分类号： H01L23/485 , H01L21/50
CPC分类号： H01L24/14 , H01L23/3128 , H01L23/3192 , H01L23/49838 , H01L23/50 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L2224/0401 , H01L2224/05578 , H01L2224/0603 , H01L2224/06515 , H01L2224/13025 , H01L2224/13028 , H01L2224/1308 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/1403 , H01L2224/1411 , H01L2224/14515 , H01L2224/16145 , H01L2224/16225 , H01L2224/17517 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/49175 , H01L2224/73204 , H01L2224/73207 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/1005 , H01L2225/1023 , H01L2225/1058 , H01L2225/107 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/07802 , H01L2924/10253 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/351 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package includes a semiconductor chip having a first bump group and a second bump group, and a package substrate having a first pattern for data communication with the semiconductor chip and a second pattern for supplying power to the semiconductor chip or grounding the semiconductor chip, wherein the first bump group is disposed on the first pattern and the second bump group is disposed on the second pattern.
摘要翻译：半导体封装包括具有第一凸块组和第二凸块组的半导体芯片，以及具有用于与半导体芯片进行数据通信的第一图案的封装基板和用于向半导体芯片供电或将半导体芯片接地的第二图案，其中所述第一凸块组设置在所述第一图案上，并且所述第二凸块组设置在所述第二图案上。

9. 发明授权

US09021942B2 Cooker 有权
标题翻译：炊具
公开(公告)号：US09021942B2
公开(公告)日：2015-05-05
申请号：US13446961
申请日：2012-04-13
申请人： Jongho Lee , Jeahyuk Wie
发明人： Jongho Lee , Jeahyuk Wie
IPC分类号： A21B1/00 , F24C3/08 , F24C15/00 , F24C15/20
CPC分类号： F24C3/085 , F24C15/001 , F24C15/006 , F24C15/2007
摘要： A cooker is provided. The cooker includes a casing, a cavity part in the casing and including a cooking chamber to cook food, and an exhaust duct through which exhaust gas is discharged. The exhaust duct includes a first duct part having a lower end communicating with the cooking chamber, a second duct part extending from the other end of the first duct part, the second duct part making a predetermined angle with respect to the first duct part or having a predetermined curvature, and a flow passage extension protruded from a portion of the first duct part or the second duct part in an outward direction. At least a portion of the flow passage extension extends at an angle different from the predetermined angle between the first and second duct parts or the flow passage extension has a curvature different from the predetermined curvature of the second duct part.
摘要翻译：提供炊具。炊具包括壳体，壳体中的空腔部分，并且包括用于烹饪食物的烹饪室以及排出废气的排气管。排气管道包括具有与烹饪室连通的下端的第一管道部分，从第一管道部分的另一端延伸的第二管道部分，第二管道部分相对于第一管道部分形成预定角度或具有预定的曲率以及从第一导管部或第二导管部的一部分向外方突出的流路延伸部。流动通道延伸部的至少一部分以与第一和第二管道部分之间的预定角度不同的角度延伸，或者流动通道延伸部具有不同于第二管道部分的预定曲率的曲率。

10. 发明授权

US08970046B2 Semiconductor packages and methods of forming the same 有权
标题翻译：半导体封装及其形成方法
公开(公告)号：US08970046B2
公开(公告)日：2015-03-03
申请号：US13546163
申请日：2012-07-11
申请人： Young Lyong Kim , Taehoon Kim , Jongho Lee , Chul-Yong Jang
发明人： Young Lyong Kim , Taehoon Kim , Jongho Lee , Chul-Yong Jang
IPC分类号： H01L25/07 , H01L23/31 , H01L23/00 , H01L25/065 , H01L25/00
CPC分类号： H01L21/76802 , H01L23/3121 , H01L23/3135 , H01L23/3185 , H01L24/24 , H01L24/82 , H01L25/0657 , H01L25/50 , H01L2224/24146 , H01L2224/24225 , H01L2224/24226 , H01L2224/24227 , H01L2224/32145 , H01L2224/32225 , H01L2224/73267 , H01L2224/76155 , H01L2224/82102 , H01L2224/92144 , H01L2225/06524 , H01L2225/06562 , H01L2225/06568 , H01L2924/01012 , H01L2924/01029 , H01L2924/12042 , H01L2924/181 , H01L2924/00
摘要： A semiconductor package may include a substrate including a substrate connection terminal, at least one semiconductor chip stacked on the substrate and having a chip connection terminal, a first insulating layer covering at least portions of the substrate and the at least one semiconductor chip, and/or an interconnection penetrating the first insulating layer to connect the substrate connection terminal to the chip connection terminal. A semiconductor package may include stacked semiconductor chips, edge portions of the semiconductor chips constituting a stepped structure, and each of the semiconductor chips including a chip connection terminal; at least one insulating layer covering at least the edge portions of the semiconductor chips; and/or an interconnection penetrating the at least one insulating layer to connect to the chip connection terminal of each of the semiconductor chips.
摘要翻译：半导体封装可以包括：衬底，其包括衬底连接端子，堆叠在衬底上并具有芯片连接端子的至少一个半导体芯片，覆盖衬底和至少一个半导体芯片的至少一部分的第一绝缘层和/ 或穿透第一绝缘层的互连以将衬底连接端子连接到芯片连接端子。半导体封装可以包括堆叠的半导体芯片，半导体芯片的边缘部分构成阶梯结构，并且每个半导体芯片包括芯片连接端子; 至少一个绝缘层，至少覆盖半导体芯片的边缘部分; 和/或穿透至少一个绝缘层的互连以连接到每个半导体芯片的芯片连接端子。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式