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21. 发明申请

US20070287275A1 METHOD FOR FABRICATING DOPED POLYSILICON LINES 审中-公开
标题翻译：用于制造掺杂多晶硅线的方法
公开(公告)号：US20070287275A1
公开(公告)日：2007-12-13
申请号：US11835745
申请日：2007-08-08
申请人： James Adkisson , John Ellis-Monaghan , Glenn MacDougall , Dale Martin , Kirk Peterson , Bruce Porth
发明人： James Adkisson , John Ellis-Monaghan , Glenn MacDougall , Dale Martin , Kirk Peterson , Bruce Porth
IPC分类号： H01L21/425
CPC分类号： H01L21/265 , H01L21/28035 , H01L21/823842 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： A method of fabricating polysilicon lines and polysilicon gates, the method of including: forming a dielectric layer on a top surface of a substrate; forming a polysilicon layer on a top surface of the dielectric layer; implanting the polysilicon layer with N-dopant species, the N-dopant species essentially contained within the polysilicon layer; implanting the polysilicon layer with a nitrogen containing species, the nitrogen containing species essentially contained within the polysilicon layer.
摘要翻译：一种制造多晶硅线路和多晶硅栅极的方法，所述方法包括：在衬底的顶表面上形成电介质层; 在所述电介质层的顶表面上形成多晶硅层; 用N掺杂物种注入多晶硅层，N掺杂物质基本上包含在多晶硅层内; 用含氮物质注入多晶硅层，含氮物质基本上包含在多晶硅层内。

22. 发明授权

US07288788B2 Predoped transfer gate for an image sensor 有权
标题翻译：用于图像传感器的预置传输门
公开(公告)号：US07288788B2
公开(公告)日：2007-10-30
申请号：US10904896
申请日：2004-12-03
申请人： John Ellis-Monaghan , Jeffrey B. Johnson , Alain Loiseau
发明人： John Ellis-Monaghan , Jeffrey B. Johnson , Alain Loiseau
IPC分类号： H01L31/0224
CPC分类号： H01L27/14601 , H01L27/14612 , H01L27/14689
摘要： A novel Active Pixel Sensor (APS) cell structure and method of manufacture. Particularly, an image sensor APS cell having a predoped transfer gate is formed that avoids the variations of Vt as a result of subsequent manufacturing steps. According to the preferred embodiment of the invention, the image sensor APS cell structure includes a doped p-type pinning layer and an n-type doped gate. There is additionally provided a method of forming the image sensor APS cell having a predoped transfer gate and a doped pinning layer. The predoped transfer gate prevents part of the gate from becoming p-type doped.
摘要翻译：一种新型的有源像素传感器（APS）单元结构及其制造方法。特别地，形成具有预定传输门的图像传感器APS单元，其避免了作为后续制造步骤的结果的V变化。根据本发明的优选实施例，图像传感器APS单元结构包括掺杂的p型钉扎层和n型掺杂栅极。还提供了一种形成具有预制传输栅极和掺杂钉扎层的图像传感器APS单元的方法。预制传输门防止栅极的一部分变成p型掺杂。

23. 发明申请

US20070153104A1 PIXEL ARRAY, IMAGING SENSOR INCLUDING THE PIXEL ARRAY AND DIGITAL CAMERA INCLUDING THE IMAGING SENSOR 有权
标题翻译：像素阵列，成像传感器，包括像素阵列和数码相机，包括成像传感器
公开(公告)号：US20070153104A1
公开(公告)日：2007-07-05
申请号：US11275417
申请日：2005-12-30
申请人： John Ellis-Monaghan , Mark Jaffe , Alain Loiseau , Richard Rassel
发明人： John Ellis-Monaghan , Mark Jaffe , Alain Loiseau , Richard Rassel
IPC分类号： H04N9/04
CPC分类号： H04N9/045
摘要： A pixel array in an image sensor, the image sensor and a digital camera including the image sensor. The image sensor includes a pixel array with colored pixels and unfiltered (color filter-free) pixels. Each unfiltered pixel occupies one or more array locations. The colored pixels may be arranged in uninterrupted rows and columns with unfiltered pixels disposed between the uninterrupted rows and columns. The image sensor may in CMOS with the unfiltered pixels reducing low-light noise and improving low-light sensitivity.
摘要翻译：图像传感器中的像素阵列，图像传感器和包括图像传感器的数字照相机。图像传感器包括具有彩色像素和未滤波（无滤色器）像素的像素阵列。每个未过滤的像素占据一个或多个阵列位置。彩色像素可以布置在不间断的行和列中，其中未过滤的像素布置在不间断的行和列之间。图像传感器可以在CMOS中，未滤色像素降低低光噪声并改善低光灵敏度。

24. 发明申请

US20070108485A1 IMAGE SENSOR CELLS 失效
标题翻译：图像传感器细胞
公开(公告)号：US20070108485A1
公开(公告)日：2007-05-17
申请号：US11619024
申请日：2007-01-02
申请人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
发明人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
IPC分类号： H01L31/113 , H01L21/00
CPC分类号： H01L27/14609 , H01L27/1463 , H01L27/14641 , H01L27/14643 , H01L31/035281
摘要： A structure (and method for forming the same) for an image sensor cell. The method includes providing a semiconductor substrate. Then, a charge collection well is formed in the semiconductor substrate, the charge collection well comprising dopants of a first doping polarity. Next, a surface pinning layer is formed in the charge collection well, the surface pinning layer comprising dopants of a second doping polarity opposite to the first doping polarity. Then, an electrically conductive push electrode is formed in direct physical contact with the surface pinning layer but not in direct physical contact with the charge collection well. Then, a transfer transistor is formed on the semiconductor substrate. The transfer transistor includes first and second source/drain regions and a channel region. The first and second source/drain regions comprise dopants of the first doping polarity. The first source/drain region is in direct physical contact with the charge collection well.
摘要翻译：用于图像传感器单元的结构（及其形成方法）。该方法包括提供半导体衬底。然后，在半导体衬底中形成电荷收集阱，电荷收集阱包含第一掺杂极性的掺杂剂。接下来，在电荷收集阱中形成表面钉扎层，表面钉扎层包括与第一掺杂极性相反的第二掺杂极性的掺杂剂。然后，导电的推动电极形成为与表面钉扎层直接物理接触，但不与电荷收集阱直接物理接触。然后，在半导体衬底上形成传输晶体管。传输晶体管包括第一和第二源极/漏极区域和沟道区域。第一和第二源/漏区包括第一掺杂极性的掺杂剂。第一源极/漏极区域与电荷收集阱直接物理接触。

25. 发明申请

US20070029581A1 PIXEL SENSOR CELL FOR COLLECTING ELECTRONS AND HOLES 失效
标题翻译：用于收集电子和孔的像素传感器单元
公开(公告)号：US20070029581A1
公开(公告)日：2007-02-08
申请号：US11161535
申请日：2005-08-08
申请人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Mark Jaffe , Jeffrey Johnson , Alain Loiseau
发明人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Mark Jaffe , Jeffrey Johnson , Alain Loiseau
IPC分类号： H01L27/148
CPC分类号： H01L27/14603 , H01L27/14609 , H01L27/14689 , H01L31/035281
摘要： The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.
摘要翻译：本发明是像素传感器单元及其制造方法。像素传感器单元对于给定的光量大约使可用信号加倍。本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域，用于收集由电子辐射照射在像素传感器单元上产生的电子以及形成在基板表面下方的p型收集阱区域用于收集由撞击光子产生的孔。具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小的第一输入和第二输入的信号。

26. 发明申请

US20090035886A1 PREDOPED TRANSFER GATE FOR A CMOS IMAGE SENSOR 有权
标题翻译： CMOS图像传感器的预置转移门
公开(公告)号：US20090035886A1
公开(公告)日：2009-02-05
申请号：US11864713
申请日：2007-09-28
申请人： John Ellis-Monaghan , Jeffrey B. Johnson , Alain Loiseau
发明人： John Ellis-Monaghan , Jeffrey B. Johnson , Alain Loiseau
IPC分类号： H01L21/336
CPC分类号： H01L27/14601 , H01L27/14612 , H01L27/14689
摘要： A novel CMOS image sensor Active Pixel Sensor (APS) cell structure and method of manufacture. Particularly, a CMOS image sensor APS cell having a predoped transfer gate is formed that avoids the variations of Vt as a result of subsequent manufacturing steps. According to the preferred embodiment of the invention, the CMOS image sensor APS cell structure includes a doped p-type pinning layer and an n-type doped gate. There is additionally provided a method of forming the CMOS image sensor APS cell having a predoped transfer gate and a doped pinning layer. The predoped transfer gate prevents part of the gate from becoming p-type doped.
摘要翻译：一种新颖的CMOS图像传感器有源像素传感器（APS）单元结构及其制造方法。特别地，形成具有预制传输门的CMOS图像传感器APS单元，其避免了作为后续制造步骤的结果的Vt的变化。根据本发明的优选实施例，CMOS图像传感器APS单元结构包括掺杂的p型钉扎层和n型掺杂栅极。还提供了一种形成具有预制传输栅极和掺杂钉扎层的CMOS图像传感器APS单元的方法。预制传输门防止栅极的一部分变成p型掺杂。

27. 发明申请

US20070249126A1 A STRUCTURE AND METHOD FOR FABRICATION OF DEEP JUNCTION SILICON-ON-INSULATOR TRANSISTORS 失效
标题翻译：一种用于制造深层结晶硅绝缘体晶体管的结构和方法
公开(公告)号：US20070249126A1
公开(公告)日：2007-10-25
申请号：US11308685
申请日：2006-04-21
申请人： Dureseti Chidambarrao , Brian Greene , John Ellis-Monaghan
发明人： Dureseti Chidambarrao , Brian Greene , John Ellis-Monaghan
IPC分类号： H01L21/336 , H01L21/8238
CPC分类号： H01L27/1203 , H01L21/823814
摘要： A structure and method for fabricating a transistor structure is provided. The method comprises the steps of: (a) providing a substrate including a semiconductor-on-insulator (“SOI”) layer separated from a bulk region of the substrate by a buried dielectric layer. (b) first implanting the SOI layer to achieve a predetermined dopant concentration at an interface of the SOI layer to the buried dielectric layer. and (c) second implanting said SOI layer to achieve predetermined dopant concentrations in a polycrystalline semiconductor gate conductor (“poly gate”) and in source and drain regions disposed adjacent to the poly gate, wherein a maximum depth of the first implanting is greater than a maximum depth of the second implanting.
摘要翻译：提供一种用于制造晶体管结构的结构和方法。该方法包括以下步骤：（a）提供包括绝缘体上半导体（“SOI”）层的衬底，该衬底通过掩埋电介质层与衬底的主体区域分离。（b）首先注入SOI层以在SOI层与掩埋介电层的界面处实现预定的掺杂剂浓度。以及（c）第二次注入所述SOI层以在多晶半导体栅极导体（“多晶硅”）中以及在与所述多晶硅栅极相邻设置的源极和漏极区域中实现预定的掺杂剂浓度，其中所述第一注入的最大深度大于第二次植入的最大深度。

28. 发明申请

US20070202635A1 MULTI-ORIENTATION SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE, AND METHOD OF FABRICATING SAME 有权
标题翻译：多导体半导体绝缘体（SOI）衬底及其制造方法
公开(公告)号：US20070202635A1
公开(公告)日：2007-08-30
申请号：US11276366
申请日：2006-02-27
申请人： John Ellis-Monaghan , Mark Jaffe
发明人： John Ellis-Monaghan , Mark Jaffe
IPC分类号： H01L21/84
CPC分类号： H01L21/84 , H01L21/02532 , H01L21/02636 , H01L21/76264 , H01L21/823807 , H01L21/823878 , H01L27/1203 , H01L29/045
摘要： The present invention relates to semiconductor-on-insulator (SOI) substrate structures that contain surface semiconductor regions of different crystal orientations located directly on an insulator layer. The present invention also relates to methods for fabricating such SOI substrate structures, by growing an insulator layer directly on a multi-orientation bulk semiconductor substrate that comprises surface semiconductor regions of different crystal orientations located directly on a semiconductor base layer, and removing the semiconductor base layer, thereby forming a multi-orientation SOI substrate structure that comprises surface semiconductor regions of different crystal orientations located directly on the insulator layer.
摘要翻译：本发明涉及绝缘体上半导体（SOI）衬底结构，其包含直接位于绝缘体层上的不同晶体取向的表面半导体区域。本发明还涉及制造这种SOI衬底结构的方法，通过直接在多取向体半导体衬底上生长绝缘体层，该绝缘体层包括直接位于半导体基底层上的不同晶体取向的表面半导体区域，以及去除半导体基底从而形成包括直接位于绝缘体层上的不同晶体取向的表面半导体区域的多取向SOI衬底结构。

29. 发明申请

US20070187787A1 PIXEL SENSOR STRUCTURE INCLUDING LIGHT PIPE AND METHOD FOR FABRICATION THEREOF 审中-公开
标题翻译：像素传感器结构包括光管及其制造方法
公开(公告)号：US20070187787A1
公开(公告)日：2007-08-16
申请号：US11276160
申请日：2006-02-16
申请人： Kristin Ackerson , James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Timothy Hoague , Mark Jaffe , Robert Leidy , Matthew Moon , Richard Passel
发明人： Kristin Ackerson , James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Timothy Hoague , Mark Jaffe , Robert Leidy , Matthew Moon , Richard Passel
IPC分类号： H01L27/14
CPC分类号： H01L27/14643 , H01L27/14625 , H01L27/14632 , H01L27/14636 , H01L27/14685 , H01L27/14687 , H01L27/14689
摘要： A pixel for an image sensor includes a photosensor located within a substrate. A patterned dielectric layer having an aperture registered with the photosensor is located over the substrate. A lens structure is located over the dielectric layer and also registered with the photosensor. A liner layer is located contiguously upon a top surface of the dielectric layer, and the sidewalls and bottom of the aperture. The liner layer provides for enhanced reflection for off-axis incoming light and enhanced capture thereof by the photosensor. When the aperture does not provide a dielectric layer border for a metallization layer embedded within the dielectric layer, an exposed edge of the metallization layer may be chamfered.
摘要翻译：用于图像传感器的像素包括位于衬底内的光电传感器。具有与光电传感器对准的孔径的图案化电介质层位于衬底上。透镜结构位于电介质层上方并且还与光电传感器配准。衬垫层连续地定位在电介质层的顶表面上，孔的侧壁和底部。衬垫层为离轴入射光提供增强的反射，并且通过光电传感器增强其捕获。当孔径不为嵌入在电介质层内的金属化层提供介电层边界时，金属化层的暴露边缘可以被倒角。

30. 发明申请

US20060186505A1 IMAGE SENSOR CELLS 有权
标题翻译：图像传感器细胞
公开(公告)号：US20060186505A1
公开(公告)日：2006-08-24
申请号：US10906510
申请日：2005-02-23
申请人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
发明人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
IPC分类号： H01L31/06
CPC分类号： H01L27/14609 , H01L27/1463 , H01L27/14641 , H01L27/14643 , H01L31/035281
摘要： A structure (and method for forming the same) for an image sensor cell. The structure includes (a) a semiconductor substrate; (b) a charge collection well on the substrate, the charge collection well comprising a semiconductor material doped with a first doping polarity; (c) a surface pinning layer on and in direct physical contact with the charge collection well, the surface pinning layer comprising a semiconductor material doped with a second doping polarity opposite to the first doping polarity; and (d) an electrically conducting push electrode being in direct physical contact with the surface pinning layer but not being in direct physical contact with the charge collection well.
摘要翻译：用于图像传感器单元的结构（及其形成方法）。该结构包括（a）半导体衬底; （b）在所述衬底上的电荷收集阱，所述电荷收集阱包括掺杂有第一掺杂极性的半导体材料; （c）与电荷收集阱直接物理接触的表面钉扎层，所述表面钉扎层包括掺杂有与第一掺杂极性相反的第二掺杂极性的半导体材料; 和（d）与表面钉扎层直接物理接触但不与电荷收集阱直接物理接触的导电推动电极。

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