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21. 发明专利

JP2003273360A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2003273360A
公开(公告)日：2003-09-26
申请号：JP2002073473
申请日：2002-03-18
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： SAITO KATSUAKI
IPC分类号： H01L27/04 , H01L29/739 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To prevent a forward recovery voltage of a free wheel diode arranged in a semiconductor module from exceeding an inverse withstand voltage of a semiconductor switching element.
SOLUTION: The number of free wheel diodes connected in series is made larger than the number of IGBTs (integrated gate bipolar transistors) connected in series in the module, so that the withstand voltage of one diode is made lower than that of one IGBT, and the withstand voltage of the diodes which are connected in series is made to be equal to or larger than that of one IGBT, thereby reducing a time until forward recovery and reducing the forward recovery voltage.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：为了防止布置在半导体模块中的续流二极管的正向恢复电压超过半导体开关元件的反向耐受电压。
解决方案：串联连接的续流二极管的数量大于串联在模块中的IGBT（集成栅双极晶体管）的数量，使得一个二极管的耐受电压低于一个二极管的耐受电压 IGBT，串联连接的二极管的耐压等于或大于一个IGBT的耐压，从而减少直到正向恢复的时间并减少正向恢复电压。版权所有（C）2003，JPO

23. 发明专利

DE102007063793A1 Halbleiterleistungsmodul 未知
公开(公告)号：DE102007063793A1
公开(公告)日：2012-06-21
申请号：DE102007063793
申请日：2007-04-25
申请人： HITACHI LTD
发明人： SHIMOKAWA HANAE , SOGA TASAO , KAWASE DAISUKE , SAITO KATSUAKI , SUZUKI KAZUHIRO , MORISAKI EIICHI
IPC分类号： H01L21/58 , H01L23/373
摘要： Aufgrund der Umweltprobleme ist die Verwendung von bleifreiem Lötmetall grundlegend geworden. Ein Leistungsmodul wird durch Löten von Substraten mit großen Flächen ausgebildet. Es ist bekannt, dass bei Sn-3Ag-0,5Cu, das kaum kriecht und sich in Bezug auf eine große Verformung, gefolgt von einer Wölbung des Substrats, verformt, die Lebensdauer bezüglich des Temperaturzyklustests beträchtlich verkürzt ist und der konventionelle Modulaufbau sich in der Situation befindet, in der es schwierig ist, eine hohe Zuverlässigkeit zu sichern. Somit ist es Aufgabe der vorliegenden Erfindung, Zusammensetzungen auszuwählen, aus der eine Erhöhung der Lebensdauer bei geringer Umformgeschwindigkeit erwartet werden kann. Bei Sn-Lötmetall wird durch Dotieren mit 3 bis 7% In und mit 2 bis 4,5% Ag die Wirkung einer verzögerten Rissbildung bei niedriger Umformgeschwindigkeit festgestellt und als repräsentative Zusammensetzung, die bei hohen Temperaturen stabil ist, wird Sn-3Ag-0,5Cu-5In ausgewählt. Weiterhin ist zur Verbesserung der Stabilität ein Verfahren zum teilweisen Beschichten eines Lötmetallendabschnitts mit einem Harz gezeigt.

24. 发明专利

CA2186796C POWER SEMICONDUCTOR DEVICE 未知
公开(公告)号：CA2186796C
公开(公告)日：2001-01-02
申请号：CA2186796
申请日：1996-09-30
申请人： HITACHI LTD
发明人： ISHIKAWA KATSUMI , SAITO KATSUAKI , SATO YUTAKA , WATANABE ATSUO , KATOH SHUJI , MOMMA NAOHIRO
IPC分类号： H01L29/32 , H01L29/74 , H01L29/06 , H01L29/861 , H01L29/87
摘要： The present invention relates to a power semiconductor device such as a diode and thyristor. In a semiconductor device such as a diode and thyristor having at least one pn junction between a pair of main surfaces, a first main electrode is formed on the surface of one of the main surfaces and a second main electrode is formed on the surface of the other one of the main surfaces. A semiconductor lattice defect is formed such that its lattice defect density increases gradually in the direction from the first main electrode to the second main electrode. Since the distribution of carrier density in the conduction state can be flattened according to the invention, the reverse recovery charge can be reduced substantially without causing the ON-state voltage to increase.

25. 发明专利

DE102007019523B4 Halbleiterleistungsmodul 未知
公开(公告)号：DE102007019523B4
公开(公告)日：2012-03-22
申请号：DE102007019523
申请日：2007-04-25
申请人： HITACHI LTD
发明人： SOGA TASAO , KAWASE DAISUKE , SUZUKI KAZUHIRO , MORISAKI EIICHI , SAITO KATSUAKI , SHIMOKAWA HANAE
IPC分类号： H01L23/373 , H01L23/28 , H01L23/42 , H01L23/48
摘要： Halbleiterleistungsmodul mit einem Basissubstrat, einem keramischen Isoliersubstrat und einem Halbleiterchip, die mit Lötmetall und einem darin eingefüllten Harz verbunden sind, wobei eine hoch wärmeleitende Metallplatte an eine obere Oberfläche des Halbleiterchips gelötet ist und eine Elektrode des Halbleiterchips von einer Oberfläche der hoch wärmeleitenden Metallplatte erhalten wird, ein Epoxidharz auf den Umfang eines Lötmetallendabschnitts des keramischen Isoliersubstrats und des Basissubstrats, den Umfang eines Endabschnitts des keramischen Isoliersubstrats am Umfang des Lötmetallendabschnitts und einen Teil einer Oberfläche des Basissubstrats am Umfang des Lötmetallendabschnitts so aufgetragen ist, dass es sie einhüllt, und eine Unterfläche der hoch wärmeleitenden Metallplatte, ein Umfang des Halbleiterchips, ein Umfang eines Lötmetallendabschnitts zwischen dem Halbleiterchip und dem keramischen Isoliersubstrat, eine Oberseite des keramischen Isoliersubstrats am Umfang des Lötmetallendabschnitts zwischen dem Halbleiterchip und dem keramischen Isoliersubstrat und eine Oberseite einer Elektrode auf dem keramischen Isoliersubstrat am Umfang des Lötmetallendabschnitts zwischen dem Halbleiterchip und dem keramischen Isoliersubstrat...

26. 发明专利

DE102007019523A1 未知
公开(公告)号：DE102007019523A1
公开(公告)日：2007-12-27
申请号：DE102007019523
申请日：2007-04-25
申请人： HITACHI LTD
发明人： SOGA TASAO , KAWASE DAISUKE , SUZUKI KAZUHIRO , MORISAKI EIICHI , SAITO KATSUAKI , SHIMOKAWA HANAE
IPC分类号： H01L23/373 , H01L23/42 , H01L23/48
摘要： Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with respect to the temperature cycle test, and the conventional module structure is in the situation having difficulty in securing high reliability. Thus, the present invention has an object to select compositions from which increase in life can be expected at a low strain rate. In Sn solder, by doping In by 3 to 7% and Ag by 2 to 4.5%, the effect of delaying crack development at a low strain rate is found out, and as a representative composition stable at a high temperature, Sn-3Ag-0.5Cu-5In is selected. Further, for enhancement of reliability, a method for partially coating a solder end portion with a resin is shown.

27. 发明专利

CA2186796A1 Power Semiconductor Device 未知
公开(公告)号：CA2186796A1
公开(公告)日：1997-04-04
申请号：CA2186796
申请日：1996-09-30
申请人： HITACHI LTD
发明人： ISHIKAWA KATSUMI , SAITO KATSUAKI , SATO YUTAKA , WATANABE ATSUO , KATOH SHUJI , MOMMA NAOHIRO
IPC分类号： H01L29/32 , H01L29/74 , H01L29/06 , H01L29/87 , H01L29/861
摘要： The present invention relates to a power semiconductor device such as a diode and thyristor. In a semiconductor device such as a diode and thyristor having at least one pn junction between a pair of main surfaces, a first main electrode is formed on the surface of one of the main surfaces and a second main electrode is formed on the surface of the other one of the main surfaces. A semiconductor lattice defect is formed such that its lattice defect density increases gradually in the direction from the first main electrode to the second main electrode. Since the distribution of carrier density in the conduction state can be flattened according to the invention, the reverse recovery charge can be reduced substantially without causing the ON-state voltage to increase.

28. 发明专利

JPH11345960A SEMICONDUCTOR DEVICE, ITS MANUFACTURE, AND POWER CONVERTER 失效
公开(公告)号：JPH11345960A
公开(公告)日：1999-12-14
申请号：JP15277298
申请日：1998-06-02
申请人： HITACHI LTD
发明人： KATO SHUJI , SAI SAIGO , YOKOTA TAKESHI , WATANABE TOKUO , SAITO KATSUAKI
IPC分类号： H01L29/74
摘要： PROBLEM TO BE SOLVED: To make the concentration of a p-type base layer controllable with high accuracy by preventing the rediffusion of baron ions to a cathode side which occurs when a high-concentration boron ion-implanted layer is heat- treated, by doping the cathode side with aluminum before the thermal diffusion of the boron ion-implanted to an anode side. SOLUTION: A mixed ion-implanted layer 11 of aluminum and boron is formed by respectively implanting aluminum and boron ions into both cathode- and anode-side surfaces of an n-type silicon substrate 12. Then a p-type diffusion layer is formed by drive-in diffusing the ion-implanted boron and aluminum. Since the diffusing speed of aluminum is faster than that of boron, a p-type base and a p-type emitter respectively form two-stage profiles. After this process, it is possible to add a process for forming a high-concentration area having a thickness of several μm in the p-type emitter, grinding the p-type emitter, and so on, for forming the ohmic contact of an anode electrode.

29. 发明专利

JPH10107051A PRESSURE-WELDING TYPE SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH10107051A
公开(公告)日：1998-04-24
申请号：JP25581096
申请日：1996-09-27
申请人： HITACHI LTD
发明人： SAITO KATSUAKI , MATSUURA NOBUYOSHI
IPC分类号： H01L29/74 , H01L21/52
摘要： PROBLEM TO BE SOLVED: To prevent the generation of the unevenness of pressing stresses from pressing electrodes by a method wherein the pressing electrodes are respectively provided with two regions or more, the first regions of the regions are formed as the vicinities of the outlines of the shapes of the electrodes coming into contact with electrode films, the second regions and succeeding regions are formed as the regions other than the first regions and the yield stresses of the first regions are set larger than those of the second regions and succeeding regions. SOLUTION: A semiconductor substrate comes into contact thermally and electrically with buffer electrode plates 116 and 117. The plates 116 and 117 are pressed by pressing units and the like, which are provided on the outside of a semiconductor element, through pressing electrodes 118 and 119 and 21 reduction in the contact resistance between the electrode plates 116 and 117 is contrived. The electrodes 118 and 119 in this case consist of two materials, the first materials 125 respectively form the vicinities of the shapes of the outlines of the electrodes 118 and 119 and the second materials 126 respectively form sites other than the vicinities of the shapes of the outlines of the electrodes 118 and 119. The yield stress of the materials 125 is about 1.2 times larger than the yield stress of the materials 126. By applying an even pressing force to the thyristor, an even heat dissipation within the surfaces of the substrate and the even electrical contact within the surfaces of the substrate can be contrived and a reduction in pressing stresses from the electrodes 118 and 119 that a semiconductor device results in being broken due to an insufficient pressing to the substrate can be prevented.

30. 发明专利

JPH09102599A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH09102599A
公开(公告)日：1997-04-15
申请号：JP26119095
申请日：1995-10-09
申请人： HITACHI LTD
发明人： SATO YUTAKA , SAITO KATSUAKI
IPC分类号： H01L29/74 , H01L21/332
摘要： PROBLEM TO BE SOLVED: To provide a silicon semiconductor device and a method for manufacturing the device having high withstand voltage and low loss. SOLUTION: A p-type semiconductor layer for forming a p-n junction is formed in the structure that has a lightly doped area 211 adjacent to the junction and a heavily doped area 212 of the surface, and the impurities for forming them are all aluminum. The aluminum has its atomic radius similar to that of silicon, the crystal defect generated at the time of diffusing is small and its life time is high. Thus, high withstand voltage can be realized by the area 211, and the injection efficiency of the area 212 is enhanced to reduce the loss.

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