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21. 发明授权

US08187914B2 Methods of forming a phase change memory device 有权
标题翻译：形成相变存储器件的方法
公开(公告)号：US08187914B2
公开(公告)日：2012-05-29
申请号：US12731637
申请日：2010-03-25
申请人： Jin-Il Lee , Urazaev Vladimir , Jin-Ha Jeong , Seung-Back Shin , Sung-Lae Cho , Hyeong-Geun An , Dong-Hyun Im , Young-Lim Park , Jung-Hyeon Kim
发明人： Jin-Il Lee , Urazaev Vladimir , Jin-Ha Jeong , Seung-Back Shin , Sung-Lae Cho , Hyeong-Geun An , Dong-Hyun Im , Young-Lim Park , Jung-Hyeon Kim
IPC分类号： H01L21/20
CPC分类号： H01L45/1616 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1683
摘要： Provided are methods of forming a phase change memory device. A semiconductor device having a lower electrode and an interlayer insulating layer may be prepared. The lower electrode may be surrounded by the interlayer insulating layer. Source gases, a reaction gas and a purge gas may be injected into a process chamber of a semiconductor fabrication device to form a phase change material layer on a semiconductor substrate. The source gases may be simultaneously injected into the process chamber. The phase change material layer may be in contact with the lower electrode through the interlayer insulating layer. The phase change material layer may be etched to form a phase change memory cell in the interlayer insulating layer. An upper electrode may be formed on the phase change memory cell.
摘要翻译：提供形成相变存储器件的方法。可以制备具有下电极和层间绝缘层的半导体器件。下电极可以被层间绝缘层包围。可以将源气体，反应气体和吹扫气体注入到半导体制造装置的处理室中，以在半导体衬底上形成相变材料层。源气体可以同时注入到处理室中。相变材料层可以通过层间绝缘层与下电极接触。可以蚀刻相变材料层以在层间绝缘层中形成相变存储单元。可以在相变存储单元上形成上电极。

22. 发明申请

US20070148933A1 Nonvolatile memory device and method of fabricating the same 审中-公开
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20070148933A1
公开(公告)日：2007-06-28
申请号：US11512658
申请日：2006-08-30
申请人： Jin-Il Lee , Choong-Man Lee , Sung-Lae Cho , Ran-Ju Jung , Sang-Yeol Kang , Young-Lim Park
发明人： Jin-Il Lee , Choong-Man Lee , Sung-Lae Cho , Ran-Ju Jung , Sang-Yeol Kang , Young-Lim Park
IPC分类号： H01L21/20
CPC分类号： H01L21/32051 , H01L21/28562 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/16
摘要： A method of fabricating a phase-change random-access memory (RAM) device includes forming a chalcogenide material on a substrate. A bottom contact is formed under the chalcogenide material, the bottom contact comprising TiAlN. Forming the bottom contact includes performing an atomic layer deposition (ALD) process, the ALD process including introducing an NH3 source gas into a chamber in which the ALD process is being carried out, a flow amount of the NH3 gas being such that the resulting bottom contact has a chlorine content of less than 1 at %. The bottom contact can include TiAlN having a crystallinity in terms of full-width half-maximum (FWHM) of less than about 0.65 degree.
摘要翻译：制造相变随机存取存储器（RAM）器件的方法包括在衬底上形成硫族化物材料。在硫族化物材料下形成底部接触，底部接触包含TiAlN。形成底部接触包括执行原子层沉积（ALD）工艺，ALD工艺包括将NH 3源气体引入到其中进行ALD工艺的室中，流动量为 NH 3气体使得所得底部接触物的氯含量小于1原子％。底部接触可以包括具有小于约0.65度的全宽度半最大值（FWHM）的结晶度的TiAlN。

23. 发明申请

US20070054475A1 Method of forming a phase changeable material layer, a method of manufacturing a phase changeable memory unit, and a method of manufacturing a phase changeable semiconductor memory device 有权
标题翻译：形成相变材料层的方法，相变存储单元的制造方法以及相变半导体存储器件的制造方法
公开(公告)号：US20070054475A1
公开(公告)日：2007-03-08
申请号：US11353129
申请日：2006-02-14
申请人： Jin-Il Lee , Choong-Man Lee , Sung-Lae Cho , Young-Lim Park
发明人： Jin-Il Lee , Choong-Man Lee , Sung-Lae Cho , Young-Lim Park
IPC分类号： H01L21/20 , H01L21/36 , H01L31/20
CPC分类号： H01L45/1233 , C23C16/305 , H01L27/2436 , H01L45/06 , H01L45/144 , H01L45/1616 , H01L45/1675 , H01L45/1683
摘要： A phase changeable material layer usable in a semiconductor memory device and a method of forming the same are disclosed. The method includes forming a plasma in a chamber having a substrate disposed therein, providing a first source gas including a germanium based material to form a first layer including the germanium based material on the substrate while maintaining the plasma in the chamber, providing a second source gas including a tellurium based material to react with the first layer to form a first composite material layer including a germanium-tellurium composite material on the substrate while maintaining the plasma in the chamber, providing a third source gas including an antimony based material to form a second layer including the antimony based material on the first composite material layer while maintaining the plasma in the chamber, and providing a fourth source gas including tellurium based material to react with the second layer including antimony based material to form a second composite material layer including an antimony-tellurium composite material on the first composite material layer. Accordingly, the phase changeable material layer may be formed at a low temperature and power to have desirable electrical characteristics.
摘要翻译：公开了可用于半导体存储器件的相变材料层及其形成方法。该方法包括在具有设置在其中的基板的腔室中形成等离子体，提供包括锗基材料的第一源气体，以在将等离子体保持在腔室中的同时在基板上形成包括基于锗的材料的第一层，从而提供第二源气体，其包括与第一层反应的碲基材料，以在衬底上形成包含锗 - 碲复合材料的第一复合材料层，同时将等离子体保持在室中，提供包括锑基材料的第三源气体，以形成第二层，包括在第一复合材料层上的锑基材料，同时将等离子体保持在室中，并且提供包括碲基材料的第四源气体，以与包含锑基材料的第二层反应以形成第二复合材料层，锑 - 碲复合材料在第一层复合材料上的铺设 r。因此，可以在低温和功率下形成相变材料层以具有期望的电特性。

24. 发明申请

US20100248442A1 METHODS OF FORMING A PHASE CHANGE MEMORY DEVICE 有权
标题翻译：形成相变存储器件的方法
公开(公告)号：US20100248442A1
公开(公告)日：2010-09-30
申请号：US12731637
申请日：2010-03-25
申请人： Jin-Il Lee , Urazaev Vladimir , Jin-Ha Jeong , Seung-Back Shin , Sung-Lae Cho , Hyeong-Geun An , Dong-Hyun Im , Young-Lim Park , Jung-Hyeon Kim
发明人： Jin-Il Lee , Urazaev Vladimir , Jin-Ha Jeong , Seung-Back Shin , Sung-Lae Cho , Hyeong-Geun An , Dong-Hyun Im , Young-Lim Park , Jung-Hyeon Kim
IPC分类号： H01L21/02
CPC分类号： H01L45/1616 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1683
摘要： Provided are methods of forming a phase change memory device. A semiconductor device having a lower electrode and an interlayer insulating layer may be prepared. The lower electrode may be surrounded by the interlayer insulating layer. Source gases, a reaction gas and a purge gas may be injected into a process chamber of a semiconductor fabrication device to form a phase change material layer on a semiconductor substrate. The source gases may be simultaneously injected into the process chamber. The phase change material layer may be in contact with the lower electrode through the interlayer insulating layer. The phase change material layer may be etched to form a phase change memory cell in the interlayer insulating layer. An upper electrode may be formed on the phase change memory cell.
摘要翻译：提供形成相变存储器件的方法。可以制备具有下电极和层间绝缘层的半导体器件。下电极可以被层间绝缘层包围。可以将源气体，反应气体和吹扫气体注入到半导体制造装置的处理室中，以在半导体衬底上形成相变材料层。源气体可以同时注入到处理室中。相变材料层可以通过层间绝缘层与下电极接触。可以蚀刻相变材料层以在层间绝缘层中形成相变存储单元。可以在相变存储单元上形成上电极。

25. 发明授权

US08507353B2 Method of forming semiconductor device having self-aligned plug 有权
标题翻译：形成具有自对准插头的半导体器件的方法
公开(公告)号：US08507353B2
公开(公告)日：2013-08-13
申请号：US13188981
申请日：2011-07-22
申请人： Gyu-Hwan Oh , Sung-Lae Cho , Byoung-Jae Bae , Ik-Soo Kim , Dong-Hyun Im , Doo-Hwan Park , Kyoung-Ha Eom , Sung-Un Kwon , Chul-Ho Shin , Sang-Sup Jeong
发明人： Gyu-Hwan Oh , Sung-Lae Cho , Byoung-Jae Bae , Ik-Soo Kim , Dong-Hyun Im , Doo-Hwan Park , Kyoung-Ha Eom , Sung-Un Kwon , Chul-Ho Shin , Sang-Sup Jeong
IPC分类号： H01L21/20 , H01L21/8244
CPC分类号： H01L45/1683 , H01L27/2463 , H01L45/06
摘要： A conductive pattern on a substrate is formed. An insulating layer having an opening exposing the conductive pattern is formed. A bottom electrode is formed on the conductive pattern and a first sidewall of the opening. A spacer is formed on the bottom electrode and a second sidewall of the opening. The spacer and the bottom electrode are formed to be lower than a top surface of the insulating layer. A data storage plug is formed on the bottom electrode and the spacer. The data storage plug has a first sidewall aligned with a sidewall of the bottom electrode and a second sidewall aligned with a sidewall of the spacer. A bit line is formed on the data storage plug.
摘要翻译：形成基板上的导电图案。形成具有露出导电图案的开口的绝缘层。底部电极形成在导电图案和开口的第一侧壁上。在底部电极和开口的第二侧壁上形成间隔物。间隔件和底部电极形成为低于绝缘层的顶表面。数据存储插头形成在底部电极和间隔件上。数据存储插头具有与底部电极的侧壁对准的第一侧壁和与间隔件的侧壁对准的第二侧壁。在数据存储插头上形成位线。

26. 发明申请

US20120040508A1 Method of Forming Semiconductor Device Having Self-Aligned Plug 有权
标题翻译：形成具有自对准插头的半导体器件的方法
公开(公告)号：US20120040508A1
公开(公告)日：2012-02-16
申请号：US13188981
申请日：2011-07-22
申请人： Gyu-Hwan Oh , Sung-Lae Cho , Byoung-Jae Bae , Ik-Soo Kim , Dong-Hyun Im , Doo-Hwan Park , Kyoung-Ha Eom , Sung-Un Kwon , Chul-Ho Shin , Sang-Sup Jeong
发明人： Gyu-Hwan Oh , Sung-Lae Cho , Byoung-Jae Bae , Ik-Soo Kim , Dong-Hyun Im , Doo-Hwan Park , Kyoung-Ha Eom , Sung-Un Kwon , Chul-Ho Shin , Sang-Sup Jeong
IPC分类号： H01L47/00
CPC分类号： H01L45/1683 , H01L27/2463 , H01L45/06
摘要： A conductive pattern on a substrate is formed. An insulating layer having an opening exposing the conductive pattern is formed. A bottom electrode is formed on the conductive pattern and a first sidewall of the opening. A spacer is formed on the bottom electrode and a second sidewall of the opening. The spacer and the bottom electrode are formed to be lower than a top surface of the insulating layer. A data storage plug is formed on the bottom electrode and the spacer. The data storage plug has a first sidewall aligned with a sidewall of the bottom electrode and a second sidewall aligned with a sidewall of the spacer. A bit line is formed on the data storage plug.
摘要翻译：形成基板上的导电图案。形成具有露出导电图案的开口的绝缘层。底部电极形成在导电图案和开口的第一侧壁上。在底部电极和开口的第二侧壁上形成间隔物。间隔件和底部电极形成为低于绝缘层的顶表面。数据存储插头形成在底部电极和间隔件上。数据存储插头具有与底部电极的侧壁对准的第一侧壁和与间隔件的侧壁对准的第二侧壁。在数据存储插头上形成位线。

27. 发明申请

US20090278107A1 Phase change memory device 审中-公开
标题翻译：相变存储器件
公开(公告)号：US20090278107A1
公开(公告)日：2009-11-12
申请号：US12453334
申请日：2009-05-07
申请人： Do-Hyung Kim , Jun-Soo Bae , Dong-Hyun Im , Sung-Lae Cho , Jin-II Lee , Hye-Young Park , Hee-Ju Shin
发明人： Do-Hyung Kim , Jun-Soo Bae , Dong-Hyun Im , Sung-Lae Cho , Jin-II Lee , Hye-Young Park , Hee-Ju Shin
IPC分类号： H01L47/00
CPC分类号： H01L45/143 , G11C13/0004 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1683
摘要： The phase change memory device includes a first electrode and a second electrode and a first phase change material pattern and a second phase change material pattern interposed between the first electrode and the second electrode, wherein the first and second phase change material patterns have respectively different electrical characteristics.
摘要翻译：相变存储器件包括插入在第一电极和第二电极之间的第一电极和第二电极以及第一相变材料图案和第二相变材料图案，其中第一和第二相变材料图案分别具有不同的电特点

28. 发明申请

US20100248460A1 Method of forming information storage pattern 审中-公开
标题翻译：形成信息存储模式的方法
公开(公告)号：US20100248460A1
公开(公告)日：2010-09-30
申请号：US12659959
申请日：2010-03-26
申请人： Jin-Il Lee , Urazaev Vladimir , Jin-Ha Jeong , Seung-Back Shin , Sung-Lae Cho , Hyeong-Geun An , Dong-Hyun Im , Jung-Hyeon Kim
发明人： Jin-Il Lee , Urazaev Vladimir , Jin-Ha Jeong , Seung-Back Shin , Sung-Lae Cho , Hyeong-Geun An , Dong-Hyun Im , Jung-Hyeon Kim
IPC分类号： H01L21/365 , H01L21/469 , H01L21/443 , H01L21/465
CPC分类号： H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1616 , H01L45/1683
摘要： A method of forming an information storage pattern, includes placing a semiconductor substrate in a process chamber, injecting first, second and third process gases into the process chamber during a first process to form a lower layer on the substrate based on a first injection time and/or a first pause time, injecting the second process gas into the process chamber during a second process, wherein the second process gas is injected into the process chamber during a first elimination time, injecting a fourth process gas together with the second and third process gases into the process chamber during a third process in accordance with a second injection time and/or a second pause time to form an upper layer on the lower layer, and injecting the second process gas into the process chamber during a fourth process, wherein the second process gas is injected into the process chamber during a second elimination.
摘要翻译：一种形成信息存储图案的方法，包括将半导体衬底放置在处理室中，在第一过程中将第一，第二和第三处理气体注入到处理室中，以在第一注入时间基底上形成下层;以及 /或第一暂停时间，在第二过程期间将第二处理气体注入处理室，其中第二处理气体在第一消除时间期间被注入到处理室中，与第二和第三处理一起喷射第四处理气体根据第二喷射时间和/或第二暂停时间，在第三过程期间将气体进入处理室，以在下层形成上层，并且在第四过程期间将第二处理气体注入到处理室中，其中，在第二次消除期间将第二工艺气体注入到处理室中。

29. 发明申请

US20120142141A1 METHOD OF FORMING RESISTANCE VARIABLE MEMORY DEVICE 有权
标题翻译：形成电阻可变存储器件的方法
公开(公告)号：US20120142141A1
公开(公告)日：2012-06-07
申请号：US13241315
申请日：2011-09-23
申请人： Jeong-Hee PARK , Jung-Hwan Park , Hideki Horii , Sung-Lae Cho
发明人： Jeong-Hee PARK , Jung-Hwan Park , Hideki Horii , Sung-Lae Cho
IPC分类号： H01L21/06 , H01L21/8246
CPC分类号： H01L45/1625 , H01L27/2409 , H01L27/2472 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1683
摘要： A method of forming a resistance variable memory device, the method including forming a diode on a semiconductor substrate; forming a lower electrode on the diode; forming a first insulating film on the lower electrode, the first insulating film having an opening; forming a resistance variable film filling the opening such that the resistance variable film includes an amorphous region adjacent to a sidewall of the opening and a crystalline region adjacent to the lower electrode; and forming an upper electrode on the resistance variable film.
摘要翻译：一种形成电阻可变存储器件的方法，所述方法包括在半导体衬底上形成二极管; 在二极管上形成下电极; 在所述下电极上形成第一绝缘膜，所述第一绝缘膜具有开口; 形成填充所述开口的电阻变化膜，使得所述电阻变化膜包括与所述开口的侧壁相邻的非晶区域和与所述下部电极相邻的结晶区域; 并在电阻变化膜上形成上电极。

30. 发明授权

US07482616B2 Semiconductor devices having phase change memory cells, electronic systems employing the same and methods of fabricating the same 有权
标题翻译：具有相变存储单元的半导体器件，使用该半导体器件的电子系统及其制造方法
公开(公告)号：US07482616B2
公开(公告)日：2009-01-27
申请号：US11139283
申请日：2005-05-27
申请人： Yoon-Jong Song , Young-Nam Hwang , Sang-Don Nam , Sung-Lae Cho , Gwan-Hyeob Koh , Choong-Man Lee , Bong-Jin Kuh , Yong-Ho Ha , Su-Youn Lee , Chang-Wook Jeong , Ji-Hye Yi , Kyung-Chang Ryoo , Se-Ho Lee , Su-Jin Ahn , Soon-Oh Park , Jang-Eun Lee
发明人： Yoon-Jong Song , Young-Nam Hwang , Sang-Don Nam , Sung-Lae Cho , Gwan-Hyeob Koh , Choong-Man Lee , Bong-Jin Kuh , Yong-Ho Ha , Su-Youn Lee , Chang-Wook Jeong , Ji-Hye Yi , Kyung-Chang Ryoo , Se-Ho Lee , Su-Jin Ahn , Soon-Oh Park , Jang-Eun Lee
IPC分类号： H01L29/02
CPC分类号： H01L29/7843 , H01L27/2436 , H01L29/665 , H01L29/7833 , H01L45/06 , H01L45/1233 , H01L45/126 , H01L45/144 , H01L45/1666 , H01L45/1675
摘要： In one embodiment, a phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation and a method of manufacturing the same. In one embodiment, a semiconductor memory device comprises a molding layer overlying a semiconductor substrate. The molding layer has a protrusion portion vertically extending from a top surface thereof. The device further includes a phase-changeable material pattern adjacent the protrusion portion and a lower electrode electrically connected to the phase-changeable material pattern.
摘要翻译：在一个实施例中，相变存储器件具有防止存储器单元污染或氧化的氧化阻挡层及其制造方法。在一个实施例中，半导体存储器件包括覆盖半导体衬底的成型层。模制层具有从其顶表面垂直延伸的突出部分。该装置还包括与突出部分相邻的相变材料图案和与相变材料图案电连接的下部电极。

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