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21. 发明授权

US06902868B2 Method of manufacturing integrated circuit 有权
标题翻译：集成电路制造方法
公开(公告)号：US06902868B2
公开(公告)日：2005-06-07
申请号：US10311456
申请日：2001-06-28
申请人： Norio Hasegawa , Joji Okada , Toshihiko Tanaka , Kazutaka Mori , Ko Miyazaki
发明人： Norio Hasegawa , Joji Okada , Toshihiko Tanaka , Kazutaka Mori , Ko Miyazaki
IPC分类号： G03F1/54 , G03F1/56 , G03F1/62 , G03F1/68 , G03F1/70 , G03F7/00 , G03F7/20 , H01L21/027
CPC分类号： G03F1/56 , G03F1/70 , G03F7/0035 , G03F7/70433 , G03F7/707 , H01L21/0274 , Y10S438/942 , Y10S438/945 , Y10S438/948 , Y10S438/95
摘要： In order to shorten the period for the development and manufacture of a semiconductor integrated circuit device, at the time of transferring integrated circuit patterns onto a wafer by an exposure process, a photomask PM1 is used which is provided partially with a light shielding patterns 3a formed of a resist film, in addition to light shielding patterns formed of a metal.
摘要翻译：为了缩短开发和制造半导体集成电路器件的周期，在通过曝光处理将集成电路图案转印到晶片上时，使用光掩模PM 1，其部分地设置有遮光图案3 除了由金属形成的遮光图案之外还形成有抗蚀剂膜。

22. 发明申请

US20050112504A1 Method of producing semiconductor integrated circuit device and method of producing multi-chip module 有权
标题翻译：半导体集成电路器件的制造方法及其制造方法
公开(公告)号：US20050112504A1
公开(公告)日：2005-05-26
申请号：US11022758
申请日：2004-12-28
申请人： Tsuneo Terasawa , Toshihiko Tanaka , Ko Miyazaki , Norio Hasegawa , Kazutaka Mori
发明人： Tsuneo Terasawa , Toshihiko Tanaka , Ko Miyazaki , Norio Hasegawa , Kazutaka Mori
IPC分类号： G03F1/54 , G03F1/56 , G03F7/20 , H01L21/768 , G03F7/00
CPC分类号： G03F7/70425 , G03F1/00 , G03F1/56 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05569 , H01L2224/05572 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/92125 , H01L2924/15311 , Y10S438/944 , Y10S438/946 , H01L2924/00
摘要： Productivity of a semiconductor integrated circuit device is improved. According to how many times the photomask is used, a photomask having an opaque pattern made of metal and a photomask having an opaque pattern made of a resist film are properly used, and thereby an exposure treatment is performed.
摘要翻译：提高了半导体集成电路器件的生产率。根据使用光掩模的次数，适当地使用具有由金属制成的不透明图案的光掩模和由抗蚀剂膜制成的不透明图案的光掩模，从而进行曝光处理。

23. 发明申请

US20050048410A1 Method of manufacturing a semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20050048410A1
公开(公告)日：2005-03-03
申请号：US10861442
申请日：2004-06-07
申请人： Toshihiko Tanaka
发明人： Toshihiko Tanaka
IPC分类号： H01L21/027 , G03F7/00 , G03F7/20 , G03F7/38 , H01L21/3213 , H01L21/8244 , H01L27/10 , H01L27/11
CPC分类号： G03F7/70466 , G03F7/2024 , G03F7/203 , H01L21/0275 , H01L21/32139
摘要： Along with increase in the operation speed and development in the integration degree of semiconductor devices, formation of fine gate patterns and fine and high-density patterns are required simultaneously. The prior art for coping with the requirement includes a full area slimming method and a shifter edge phase shift exposure method. The former method involves a problem that the width of the gate electrode wiring is reduced together with the gate pattern, tending to cause disconnection for the wiring area and lowering the yield. The latter method involves a problem that while restriction is imposed strongly on the layout due to inter-shifter interference or restriction on the arrangement of the shifters. A method of manufacturing a semiconductor device is provided for solving the problems together, in which a resist pattern is formed and then DUV or electron beam is applied to a desired portion for selectively slimming the resist.
摘要翻译：随着操作速度的提高和半导体器件的集成度的发展，需要同时形成精细的栅格图案和精细和高密度图案。用于应对该要求的现有技术包括全面减肥方法和移位器边缘相移曝光方法。前一种方法涉及栅极布线的宽度与栅极图案一起减少的问题，倾向于导致布线区域的断开并降低产量。后一种方法涉及一个问题，即由于移位器干扰或对移位器的布置的限制，强制地对布局施加限制。提供了一种制造半导体器件的方法，用于解决在其中形成抗蚀剂图案的问题，然后将DUV或电子束施加到期望的部分以选择性地减薄抗蚀剂。

24. 发明申请

US20050037272A1 Method and apparatus for manufacturing semiconductor 审中-公开
标题翻译：半导体制造方法和装置
公开(公告)号：US20050037272A1
公开(公告)日：2005-02-17
申请号：US10935467
申请日：2004-09-07
申请人： Toshihiko Tanaka
发明人： Toshihiko Tanaka
IPC分类号： G03F7/20 , H01L21/00 , G03C5/00 , G03B27/32 , G03B27/52
CPC分类号： H01L21/67253 , G03F7/70991 , H01L21/6715
摘要： In a method of manufacturing a semiconductor, in which a semiconductor substrate is worked/treated in each manufacturing step of a semiconductor manufacturing line, image data is acquired before and after working/treating the semiconductor substrate transported into a manufacturing apparatus disposed in each manufacturing step, respectively, defects attributed to treatment conditions of the manufacturing apparatus are detected from the image data before the working/treating, or non-defective master image data, and the image data after the working/treating, and the treatment conditions of the manufacturing apparatus are changed/controlled based on the detection result to work/treat the semiconductor substrate.
摘要翻译：在制造半导体的方法中，半导体衬底在半导体制造线的每个制造步骤中进行加工/处理，在运送到设置在每个制造步骤中的制造装置中的半导体衬底的工作/处理之前和之后，获取图像数据分别从工作/处理或无缺陷的主图像数据之前的图像数据和工作/处理之后的图像数据以及制造装置的处理条件检测归因于制造装置的处理条件的缺陷基于检测结果进行改变/控制以对半导体衬底进行工作/处理。

25. 发明授权

US06734187B1 Purine derivatives and medicaments comprising the same as active ingredient 失效
标题翻译：嘌呤衍生物和包含与活性成分相同的药物
公开(公告)号：US06734187B1
公开(公告)日：2004-05-11
申请号：US10200576
申请日：2002-07-23
申请人： Toshihiko Tanaka , Eiichirou Iwashita , Akiko Tarao , Akira Amenomori , Yuya Ono
发明人： Toshihiko Tanaka , Eiichirou Iwashita , Akiko Tarao , Akira Amenomori , Yuya Ono
IPC分类号： C07D47332
CPC分类号： C07D473/30
摘要： Purine derivatives represented by the following formula and salts thereof: wherein R1 represents a C1-C4 alkyl group or difluoromethyl group; R2 represents tetrahydrofuranyl group, a C1-C7 alkyl group and the like; X represents hydrogen atom, a halogen atom or nitro group; and A represents a group represented by the following formula: wherein R3 represents hydrogen atom, a halogen atom and the like; R4 and R5 represent hydrogen atom, a halogen atom, a C1-C4 alkyl group, a C1-C4 alkoxyl group and the like, which are useful as active ingredients of medicaments such as antiasthmatic agents.
摘要翻译：由下式表示的嘌呤衍生物及其盐：其中R 1表示C1-C4烷基或二氟甲基; R 2表示四氢呋喃基，C 1 -C 7烷基等; X表示氢原子，卤素原子或硝基; A表示由下式表示的基团：其中R 3表示氢原子，卤素原子等; R 4和R 5表示氢原子，卤素原子，C 1 -C 4烷基，C 1 -C 4烷氧基等，其可用作药物如抗哮喘药的活性成分。

26. 发明授权

US06255036B1 Resist pattern forming method using anti-reflective layer, resist pattern formed, and method of etching using resist pattern and product formed 有权
标题翻译：使用抗反射层的抗蚀剂图案形成方法，形成的抗蚀剂图案，以及形成的抗蚀剂图案和产品的蚀刻方法
公开(公告)号：US06255036B1
公开(公告)日：2001-07-03
申请号：US09664554
申请日：2000-09-18
申请人： Toshihiko Tanaka , Shoichi Uchino , Naoko Asai
发明人： Toshihiko Tanaka , Shoichi Uchino , Naoko Asai
IPC分类号： G03C500
CPC分类号： G03F7/091 , Y10S430/151
摘要： Disclosed are methods for forming a resist pattern which solve a problem (dimensional precision degradation) caused by halation and interference phenomena due to reflected light from the substrate, and which are fine and have high precision even with substrates having high reflectivity or substrates having a transparent film or substrates with an uneven surface. A first method forms between the substrate and resist film an anti-reflective film whose photoabsorbance of the exposure light is greater on the substrate surface side than on the resist surface side. A second method forms between the substrate and resist film a two-layer anti-reflective film made up of an upper-layer film which is an interference film for the exposure light and a lower-layer film which has higher exposure light absorbance than the upper-layer film and functions as a light shielding film. A third method forms between the substrate and resist film a two-layer anti-reflective film consisting of a lower-layer film that reflects the exposure light and an upper-layer film that is an interference film for the exposure light. A very high anti-reflection effect can be obtained without aspect ratio problems during the process of forming the anti-reflective film and without being influenced by the kind of substrate including those having a transparent film. With these methods, it is possible to form a fine and highly precise resist pattern. These methods can be used to form patterned resist films to etch object films, e.g., in forming microcircuits and/or gates (and word lines) of semiconductor devices.
摘要翻译：公开了形成抗蚀剂图案的方法，其解决了由于来自基板的反射光引起的由于偏光和干涉现象引起的问题（尺寸精度降低），即使具有高反射率的基板或具有透明度的基板也是精细且具有高精度膜或具有不平坦表面的基底。在基板和抗蚀剂膜之间形成第一种方法，其中在基板表面侧的曝光光的光吸收性大于在抗蚀剂表面侧上的抗反射膜。在基板和抗蚀剂膜之间形成由作为曝光用的干涉膜的上层膜构成的双层抗反射膜的第二种方法和具有比上层的曝光吸光度高的下层膜并且用作遮光膜。在基板和抗蚀剂膜之间形成由反射曝光光的下层膜构成的两层抗反射膜和作为曝光用光的干涉膜的上层膜的第三种方法。在形成抗反射膜的过程中可以获得非常高的抗反射效果，而不受包括具有透明膜的基板的种类的影响。利用这些方法，可以形成精细且高精度的抗蚀剂图案。这些方法可以用于形成图案化的抗蚀剂膜以蚀刻对象膜，例如在形成半导体器件的微电路和/或栅极（和字线）中。

27. 发明授权

US6154312A Objective lens switching device 有权
标题翻译：物镜切换装置
公开(公告)号：US6154312A
公开(公告)日：2000-11-28
申请号：US158471
申请日：1998-09-22
申请人： Yasuteru Takahama , Mitsuhiko Saito , Toshihiko Tanaka
发明人： Yasuteru Takahama , Mitsuhiko Saito , Toshihiko Tanaka
IPC分类号： G02B21/24 , G02B21/00
CPC分类号： G02B21/248
摘要： An objective lens switching device of the present invention is a device in which assembly and adjustment in order to correctly position each objective lens on an optical axis are easy and a switching action can quickly be performed with certainty without receiving an influence of a mounting condition of objective lenses or a change in the revolver over time in use. A CPU reads an angular displacement from an angle sensor from a revolution position of a turret outside a detection range of an engagement sensor and issues a command of start braking to a driver when the angular displacement reaches a predetermined given angle. A revolution position of the turret at which the CPU starts the braking is correctly set all the time since the detection range of the engagement sensor and an engagement position of the turret are correctly adjusted.
摘要翻译：本发明的物镜切换装置是将各物镜在光轴上正确地进行组装和调整的装置，容易地进行切换动作，而不会受到安装条件的影响物镜或随着时间推移使用的左轮手枪的变化。 CPU从角度传感器从接合传感器的检测范围之外的转台的旋转位置读取角位移，并且当角位移达到预定的给定角度时向驾驶员发出开始制动的命令。由于接合传感器的检测范围和转台的接合位置被正确调整，所以始终正确地设置CPU开始制动的转塔的转动位置。

28. 再颁专利

USRE36731E Method of forming pattern and projection aligner for carrying out the same 失效
标题翻译：形成图案和投影对准器的方法，用于执行它们
公开(公告)号：USRE36731E
公开(公告)日：2000-06-13
申请号：US190580
申请日：1994-02-02
申请人： Hiroshi Fukuda , Norio Hasegawa , Toshihiko Tanaka , Toshiei Kurosaki
发明人： Hiroshi Fukuda , Norio Hasegawa , Toshihiko Tanaka , Toshiei Kurosaki
IPC分类号： G03F7/20 , G03B27/42
CPC分类号： G03F7/70575 , G03F7/2022 , G03F7/70241 , G03F7/70333 , G03F7/70858
摘要： An area on a photoresist film which is formed on a substrate surface having a topography, is exposed a plurality of times in such a manner that the image plane of a mask pattern is formed at a plurality of positions which are spaced apart from a reference plane in the substrate in the direction of an optical axis, and then the photoresist film is developed to form a resist pattern. According to the above method, the effective focal depth of the projection aligner used is enhanced, and moreover the reduction of the image contrast at the photoresist film is very small by the plural exposure operations. Accordingly, a fine pattern can be formed accurately on the substrate surface having the topography.
摘要翻译：在具有形貌的基板表面上形成的光致抗蚀剂膜上的区域被曝光多次，使得掩模图案的像面形成在与参考平面间隔开的多个位置在光轴方向上的基板中，然后使光致抗蚀剂膜显影以形成抗蚀剂图案。根据上述方法，增强了所使用的投影对准器的有效焦深，并且通过多次曝光操作，光致抗蚀剂膜的图像对比度的降低非常小。因此，可以在具有形貌的基板表面上精确地形成精细图案。

29. 发明授权

US6060338A Method of making a field effect transistor 失效
标题翻译：制作场效应晶体管的方法
公开(公告)号：US6060338A
公开(公告)日：2000-05-09
申请号：US228936
申请日：1999-01-12
申请人： Toshihiko Tanaka , Syuji Doi , Hiroshi Koezuka , Akira Tsumura , Hiroyuki Fuchigami
发明人： Toshihiko Tanaka , Syuji Doi , Hiroshi Koezuka , Akira Tsumura , Hiroyuki Fuchigami
IPC分类号： G02F1/1333 , G02F1/1368 , H01L27/28 , H01L51/30 , H01L21/335
CPC分类号： H01L51/0036 , G02F1/1368 , H01L27/283 , H01L51/002 , H01L51/0035 , H01L51/0038 , H01L51/0508 , H01L51/0545 , H01L51/0558 , G02F2001/133302 , H01L51/0015 , H01L51/0541
摘要： A method of fabricating a field effect transistor including forming a gate electrode on an electrically insulating substrate; forming an electrically insulating film on the substrate covering the gate electrode; forming source and drain electrodes on the electrically insulating film on opposite sides of the gate electrode; forming a semiconducting film of a .pi.-conjugated polymer on the source and drain electrodes and on the electrically insulating film between the source and drain electrodes.
摘要翻译：一种制造场效应晶体管的方法，包括在电绝缘基板上形成栅电极; 在覆盖栅电极的基板上形成电绝缘膜; 在栅电极的相对侧的电绝缘膜上形成源电极和漏电极; 在源极和漏极上以及在源电极和漏极之间的电绝缘膜上形成π共轭聚合物的半导体膜。

30. 发明授权

US5892244A Field effect transistor including .pi.conjugate polymer and liquid crystal display including the field effect transistor 失效
标题翻译：包括π共轭聚合物和包括场效应晶体管的液晶显示器的场效应晶体管
公开(公告)号：US5892244A
公开(公告)日：1999-04-06
申请号：US835634
申请日：1997-04-10
申请人： Toshihiko Tanaka , Syuji Doi , Hiroshi Koezuka , Akira Tsumura , Hiroyuki Fuchigami
发明人： Toshihiko Tanaka , Syuji Doi , Hiroshi Koezuka , Akira Tsumura , Hiroyuki Fuchigami
IPC分类号： G02F1/1333 , G02F1/1368 , H01L27/28 , H01L51/30 , H01L35/24
CPC分类号： H01L51/0036 , G02F1/1368 , H01L27/283 , H01L51/002 , H01L51/0035 , H01L51/0038 , H01L51/0508 , H01L51/0545 , H01L51/0558 , G02F2001/133302 , H01L51/0015 , H01L51/0541
摘要： The present invention relates to a field effect transistor (FET element) in which a .pi.-conjugated polymer film serving as a semiconductor layer is manufactured by first forming a .pi.-conjugated polymer precursor film using a .pi.-conjugated precursor which is soluble in a solvent and then changing the precursor polymer film to the .pi.-conjugated polymer film. A liquid crystal display apparatus uses the FET element as an active drive element. A large number of the FET elements can be manufactured on a large area substrate at the same time at lost cost and operate stably. A large current flow between the source and drain can be significantly modulated by a voltage applied to the gate of the FET element.
摘要翻译：本发明涉及一种场效应晶体管（FET元件），其中用作半导体层的π共轭聚合物膜通过首先使用可溶于溶剂的π共轭前体形成π共轭聚合物前体膜然后将前体聚合物膜改变为π共轭聚合物膜。液晶显示装置使用FET元件作为有源驱动元件。大量的FET元件可以在大面积基板上同时以损耗成本并且稳定地工作。可以通过施加到FET元件的栅极的电压来显着地调制源极和漏极之间的大电流。

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