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    • 22. 发明申请
    • METHOD OF FABRICATING FLASH MEMORY DEVICE
    • 制造闪存存储器件的方法
    • US20100291750A1
    • 2010-11-18
    • US12781777
    • 2010-05-17
    • Sung Kee Park
    • Sung Kee Park
    • H01L21/762
    • H01L27/105G11C16/0408H01L27/11526H01L27/11531
    • A semiconductor device includes a semiconductor substrate having a cell region and a peripheral region. A cell array is defined within the cell region, the cell array having first, second, third, and fourth sides. A first decoder is defined within the peripheral region and provided adjacent to the first side of the cell array. A first isolation structure is formed at a first boundary region provided between the first side of the cell array and the peripheral region. A first active region is formed at a second boundary region that is provided between the second side of the cell array and the peripheral region. The first isolation structure has a first portion that has a first depth and a second portion that has a second depth.
    • 半导体器件包括具有单元区域和周边区域的半导体衬底。 单元阵列定义在单元区域内,单元阵列具有第一,第二,第三和第四面。 第一解码器被限定在外围区域内并且被提供为与单元阵列的第一侧相邻。 在设置在电池阵列的第一侧和周边区域之间的第一边界区域处形成第一隔离结构。 第一有源区形成在设置在电池阵列的第二侧和周边区域之间的第二边界区域。 第一隔离结构具有具有第一深度的第一部分和具有第二深度的第二部分。
    • 23. 发明授权
    • Flash memory cell and method of manufacturing the same and programming/erasing reading method of flash memory cell
    • 闪存单元及其制造方法和闪存单元的编程/擦除读取方法
    • US07705395B2
    • 2010-04-27
    • US12247305
    • 2008-10-08
    • Sung Kee ParkYoung Seon YouYong Wook KimYoo Nam Jeon
    • Sung Kee ParkYoung Seon YouYong Wook KimYoo Nam Jeon
    • H01L29/788
    • H01L27/11521G11C11/5628G11C11/5635G11C11/5642G11C16/0458G11C2211/5612H01L27/115H01L29/7887
    • Disclosed is a flash memory cell and method of manufacturing the same, and programming/erasing/reading method thereof. The flash memory cell comprises a first tunnel oxide film formed at a given region of a semiconductor substrate, a first floating gate formed on the first tunnel oxide film, a second tunnel oxide film formed over the semiconductor substrate and along one sidewall of the first floating gate, a second floating gate isolated from the first floating gate while contacting the second tunnel oxide film, a dielectric film formed on the first floating gate and the second floating gate, a control gate formed on the dielectric film, a first junction region formed in the semiconductor substrate below one side of the second tunnel oxide film, and a second junction region formed in the semiconductor substrate below one side of the first tunnel oxide film. Therefore, the present invention can implement 2-bit cell or 3-bit cell of a high density using the existing process technology. Further, it can reduce the manufacture cost and implement a high-integrated flash memory cell that is advantageous than a conventional flash memory cell in view of charge storage/retention as well as programming time.
    • 公开了一种闪存单元及其制造方法及其编程/擦除/读取方法。 闪速存储单元包括形成在半导体衬底的给定区域的第一隧道氧化物膜,形成在第一隧道氧化物膜上的第一浮栅,形成在半导体衬底上并沿着第一浮置区的一个侧壁的第二隧道氧化膜 栅极,与第一沟槽氧化膜接触时与第一浮栅隔离的第二浮栅;形成在第一浮栅和第二浮栅上的电介质膜,形成在电介质膜上的控制栅, 位于第二隧道氧化膜的一侧以下的半导体衬底,以及形成在第一隧道氧化膜的一侧以下的半导体衬底中的第二结区。 因此,本发明可以使用现有的工艺技术来实现高密度的2比特单元或3比特单元。 此外,鉴于电荷存储/保持以及编程时间,它可以降低制造成本并实现比传统闪存单元有利的高集成闪存单元。
    • 27. 发明申请
    • Flexible screw type height control device
    • 柔性螺杆式高度控制装置
    • US20050224770A1
    • 2005-10-13
    • US10780966
    • 2004-02-17
    • Munsang KimYoha HwangSeung-Jong KimJong Min LeeSung-Kee ParkJong-Suk Choi
    • Munsang KimYoha HwangSeung-Jong KimJong Min LeeSung-Kee ParkJong-Suk Choi
    • F16H25/18F16H25/24
    • F16H25/2427
    • A flexible screw type height control device comprises a housing, a servomotor mounted in the housing, a driving gear which is rotated by the servomotor, a driven gear which is provided with a spiral groove at a central portion thereof and is tooth-engaged with the driving gear, a flexible screw member which passes axially through the spiral groove of the driven gear and moves linearly upward and downward by the servomotor, and a telescopic unit including a plurality of sliding members which are slidably coupled to each other and cooperate with the flexible screw member. The flexible screw member is a coil spring. A first sliding member is slidably disposed in the housing. One end of the flexible screw member is extended outside the housing, and the other end is fixed to a last sliding member. Each sliding member is formed as an open-ended pipe and a cross-sectional area of the sliding members decreases from the first sliding member to the last sliding member.
    • 柔性螺杆式高度控制装置包括壳体,安装在壳体中的伺服电动机,由伺服电动机旋转的驱动齿轮;从动齿轮,其在其中心部分设有螺旋槽,并与其啮合 驱动齿轮,通过轴向通过从动齿轮的螺旋槽并由伺服电机线性地向上和向下移动的柔性螺钉构件,以及包括多个滑动构件的伸缩单元,滑动构件彼此可滑动地联接并与柔性 螺丝部件。 柔性螺杆构件是螺旋弹簧。 第一滑动构件可滑动地设置在壳体中。 柔性螺钉构件的一端延伸到壳体外部,另一端固定在最后的滑动构件上。 每个滑动构件形成为开口管,并且滑动构件的横截面积从第一滑动构件减小到最后滑动构件。
    • 28. 发明授权
    • Patterns of semiconductor device and method of forming the same
    • 半导体器件的形态及其形成方法
    • US08298961B2
    • 2012-10-30
    • US12650498
    • 2009-12-30
    • Sung Kee Park
    • Sung Kee Park
    • H01L21/475
    • H01L21/0338H01L21/0337
    • A method of forming patterns of a semiconductor device comprises providing a semiconductor substrate comprising a first region wherein first patterns are to be formed and a second region wherein second patterns are to be formed, each of the second patterns having a wider width than the first patterns, forming an etch target layer over the semiconductor substrate, forming first etch patterns over the etch target layer of the first and second regions, forming second etch patterns on both sidewalls of each of the first etch patterns, wherein the second etch pattern formed in the second region has a wider width than the second etch pattern formed in the first region, removing the first etch patterns, forming third etch patterns over the etch target layer of the second region, the third etch pattern overlapping part of the second pattern, and etching the etch target layer using the third etch patterns and the second etch patterns as an etch mask, to form the first and second patterns.
    • 一种形成半导体器件的图形的方法包括提供一种半导体衬底,该半导体衬底包括将要形成第一图案的第一区域和要形成第二图案的第二区域,每个第二图案的宽度比第一图案宽 在所述半导体衬底上形成蚀刻目标层,在所述第一和第二区域的所述蚀刻目标层上形成第一蚀刻图案,在所述第一蚀刻图案的每个的两个侧壁上形成第二蚀刻图案,其中形成在所述第一蚀刻图案中的所述第二蚀刻图案 第二区域具有比在第一区域中形成的第二蚀刻图案宽的宽度,去除第一蚀刻图案,在第二区域的蚀刻目标层上形成第三蚀刻图案,第二蚀刻图案与第二图案重叠部分,以及蚀刻 使用第三蚀刻图案和第二蚀刻图案作为蚀刻掩模的蚀刻目标层,以形成第一和第二图案。