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21. 发明申请

US20130101752A1 METHOD FOR DEPOSITING CYCLIC THIN FILM 审中-公开
标题翻译：沉积环状薄膜的方法
公开(公告)号：US20130101752A1
公开(公告)日：2013-04-25
申请号：US13808111
申请日：2011-08-01
申请人： Hai Won Kim , Sang Ho Woo
发明人： Hai Won Kim , Sang Ho Woo
IPC分类号： B05D3/14
CPC分类号： B05D3/145 , C23C16/345 , C23C16/401 , C23C16/4554 , H01L21/02164 , H01L21/0217 , H01L21/02274 , H01L21/0228 , H01L21/02532 , H01L21/0262
摘要： Provided is a method of depositing a cyclic thin film that can provide excellent film properties and step coverage. The method includes the steps of depositing an insulating film by repeatedly performing a deposition step for depositing silicon on a substrate by injecting a silicon precursor into a chamber into which the substrate is loaded, a first purge step for removing a non-reacted silicon precursor and a reacted byproduct from the chamber, a reaction step for forming the deposited silicon as an insulating film including silicon by supplying a first reaction gas into the chamber and a second purge step for removing a non-reacted first reaction gas and a reacted byproduct from the chamber; and densifying the insulating film including silicon by supplying a plasma atmosphere into the chamber.
摘要翻译：提供一种沉积能够提供优异的膜性质和阶梯覆盖的环状薄膜的方法。该方法包括以下步骤：通过反复进行沉积步骤沉积绝缘膜，该沉积步骤通过将硅前体注入到其中载置衬底的室中沉积硅，用于除去未反应的硅前体的第一清除步骤和来自所述室的反应副产物，用于通过向所述室中供应第一反应气体而形成沉积的硅作为包括硅的绝缘膜的反应步骤和用于除去未反应的第一反应气体的第二吹扫步骤和从所述反应的副产物房间以及通过将等离子体气氛供应到所述室中来致密化包括硅的绝缘膜。

22. 发明申请

US20110136328A1 METHOD FOR DEPOSITING ULTRA FINE GRAIN POLYSILICON THIN FILM 审中-公开
标题翻译：沉积超细晶粒多晶硅薄膜的方法
公开(公告)号：US20110136328A1
公开(公告)日：2011-06-09
申请号：US12990632
申请日：2009-04-29
申请人： Hai Won Kim , Sang Ho Woo , Sung Gil Cho , Song Hwan Park , Kyung Soo Jung
发明人： Hai Won Kim , Sang Ho Woo , Sung Gil Cho , Song Hwan Park , Kyung Soo Jung
IPC分类号： H01L21/20 , C23C16/24 , C23C16/56 , C23C16/455
CPC分类号： C23C16/24 , H01L21/02532 , H01L21/0262 , H01L21/28556 , H01L21/32055
摘要： According to the present invention, a method for depositing an ultra-fine crystal particle polysilicon thin film supplies a source gas in a chamber loaded with a substrate to deposit a polysilicon thin film on the substrate, wherein the source gas contains a silicon-based gas, an oxygen-based gas and a phosphorous-based gas. The mixture ratio of the oxygen-based gas to the silicon-based gas may be 0.15 or lower (but, excluding zero). Oxygen in the thin film may be 0.8 atomic percent or lower (but, excluding zero).
摘要翻译：根据本发明，用于沉积超细晶粒多晶硅薄膜的方法在负载有衬底的室中提供源气体，以在衬底上沉积多晶硅薄膜，其中源气体包含硅基气体，氧基气体和磷基气体。氧基气体与硅系气体的混合比可以为0.15以下（但不包括零）。薄膜中的氧可以为0.8原子％以下（但不包括零）。

23. 发明授权

US09761473B2 Substrate supporting unit and substrate processing apparatus manufacturing method of the substrate supporting unit 有权
公开(公告)号：US09761473B2
公开(公告)日：2017-09-12
申请号：US14234723
申请日：2012-08-24
申请人： Hai Won Kim , Sung-Kil Cho
发明人： Hai Won Kim , Sung-Kil Cho
IPC分类号： C23C16/00 , C23C16/50 , C23F1/00 , H01L21/306 , H01L21/683 , C23C16/458 , H01L21/67 , H01L21/687
CPC分类号： H01L21/683 , C23C16/4585 , H01L21/67109 , H01L21/68735 , Y10T29/49764
摘要： Provided are a substrate supporting unit and a substrate processing apparatus, and a method of manufacturing the substrate supporting unit. The substrate supporting unit includes a susceptor on which a substrate is placed on a top surface thereof, one or more heat absorbing members which are capable of being converted between a mounted position at which the heat absorbing member is disposed on an upper portion of the susceptor to thermally contact the susceptor and a released position at which the heat absorbing member is separated from the upper portion of the susceptor, the one or more heat absorbing members absorbing heat of the susceptor at the mounted position, and an edge ring having a plurality of fixing slots in which the heat absorbing members are selectively inserted and fixed.

24. 发明授权

US09425057B2 Method and apparatus for manufacturing three-dimensional-structure memory device 有权
标题翻译：用于制造三维结构存储器件的方法和装置
公开(公告)号：US09425057B2
公开(公告)日：2016-08-23
申请号：US13822416
申请日：2011-10-06
申请人： Sung Kil Cho , Hai Won Kim , Sang Ho Woo , Seung Woo Shin , Gil Sun Jang , Wan Suk Oh
发明人： Sung Kil Cho , Hai Won Kim , Sang Ho Woo , Seung Woo Shin , Gil Sun Jang , Wan Suk Oh
IPC分类号： H01L21/306 , C23C16/458 , H01L21/02 , H01L21/311 , H01L27/115 , H01L29/66 , H01L29/792 , H01L21/67
CPC分类号： H01L21/306 , C23C16/4585 , H01L21/02126 , H01L21/02129 , H01L21/02164 , H01L21/02211 , H01L21/02271 , H01L21/30604 , H01L21/31111 , H01L21/67069 , H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： A method for manufacturing a memory device having a vertical structure according to one embodiment of the present invention comprises: a step for alternatingly laminating one or more insulation layers and one or more sacrificial layers on a substrate; a step for forming a penetration hole for penetrating the insulation layer and the sacrificial layer; a step for forming a pattern for filling up the penetration hole; a step for forming an opening for penetrating the insulation layer and the sacrificial layer; and a step for removing the sacrificial layer by supplying an etchant through the opening, wherein the step for laminating the insulation layer includes a step for depositing a first silicon oxide film by supplying to the substrate at least one gas selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and the step for laminating the sacrificial layer includes a step for depositing a second silicon oxide film by supplying dichlorosilane (SiCl2H2) to the substrate.
摘要翻译：根据本发明的一个实施例的用于制造具有垂直结构的存储器件的方法包括：在衬底上交替层叠一个或多个绝缘层和一个或多个牺牲层的步骤; 形成用于穿透绝缘层和牺牲层的穿透孔的步骤; 形成填充贯通孔的图案的工序; 用于形成用于穿透绝缘层和牺牲层的开口的步骤; 以及通过向所述开口供给蚀刻剂来除去所述牺牲层的步骤，其中所述层叠所述绝缘层的步骤包括通过向所述基板供给至少一种选自SiH 4的气体来沉积第一氧化硅膜的步骤 Si 2 H 6，Si 3 H 8，Si 4 H 10，层叠牺牲层的步骤包括通过向衬底提供二氯硅烷（SiCl 2 H 2）而沉积第二氧化硅膜的步骤。

25. 发明申请

US20130130497A1 PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的生产方法
公开(公告)号：US20130130497A1
公开(公告)日：2013-05-23
申请号：US13814533
申请日：2011-08-30
申请人： Hai Won Kim , Sang Ho Woo , Sung Kil Cho , Gil Sun Jang
发明人： Hai Won Kim , Sang Ho Woo , Sung Kil Cho , Gil Sun Jang
IPC分类号： H01L21/02
CPC分类号： H01L21/02697 , C01B33/06 , C23C16/0227 , C23C16/04 , C23C16/24 , H01L21/28273 , H01L21/28282 , H01L21/32051 , H01L21/823835 , H01L27/11521 , H01L27/11568 , H01L29/4975 , H01L29/66825 , H01L29/66833
摘要： Provided is a production method for a semiconductor device comprising a metal silicide layer. According to one embodiment of the present invention, the production method for a semiconductor device comprises the steps of: forming an insulating layer on a substrate, on which a polysilicon pattern has been formed, in such a way that the polysilicon pattern is exposed; forming a silicon seed layer on the exposed polysilicon pattern that has been selectively exposed with respect to the insulating layer; forming a metal layer on the substrate on which the silicon seed layer has been formed; and forming a metal silicide layer by carrying out a heat treatment on the substrate on which the metal layer has been formed.
摘要翻译：提供了一种包括金属硅化物层的半导体器件的制造方法。根据本发明的一个实施例，半导体器件的制造方法包括以下步骤：在已经形成多晶硅图案的衬底上形成绝缘层，以使多晶硅图案暴露; 在已经相对于绝缘层选择性地暴露的暴露的多晶硅图案上形成硅籽晶层; 在已经形成有硅籽晶层的基板上形成金属层; 以及通过在其上形成有金属层的基板上进行热处理来形成金属硅化物层。

26. 发明申请

US20130130480A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20130130480A1
公开(公告)日：2013-05-23
申请号：US13813978
申请日：2011-09-01
申请人： Hai Won Kim , Sang Ho Woo , Sung Kill Cho , Gil Sun Jang
发明人： Hai Won Kim , Sang Ho Woo , Sung Kill Cho , Gil Sun Jang
IPC分类号： H01L21/02
CPC分类号： H01L21/02507 , H01L21/0245 , H01L21/02488 , H01L21/02532 , H01L21/0262
摘要： Disclosed is a method for manufacturing a semiconductor device having a multilayer structure. The method for manufacturing a semiconductor device according to the present invention comprises the loading of a substrate into the chamber of a chemical vapor deposition apparatus and the forming of a multilayer structure in which a plurality of doped amorphous silicon layers and a plurality of insulation layers are alternately stacked. Said layers are stacked by alternately and repetitively forming the doped amorphous silicon layer on the substrate by supplying a conductive dopant and silicon precursor into the chamber where the substrate is loaded, and forming the insulation layer containing silicon on the substrate by introducing the silicon precursor and a reaction gas into the chamber where the substrate is loaded.
摘要翻译：公开了一种具有多层结构的半导体器件的制造方法。根据本发明的制造半导体器件的方法包括将衬底加载到化学气相沉积设备的室中，以及形成多层结构，其中多个掺杂的非晶硅层和多个绝缘层是交替堆叠。通过将衬底上的导电掺杂剂和硅前驱体加载到衬底载体的腔室内，通过交替重复地形成掺杂的非晶硅层，并且通过引入硅前体在衬底上形成含硅的绝缘层来堆叠所述层，将反应气体输入到载置基板的室中。

27. 发明申请

US20130115783A1 METHOD FOR DEPOSITING CYCLIC THIN FILM 有权
标题翻译：沉积环状薄膜的方法
公开(公告)号：US20130115783A1
公开(公告)日：2013-05-09
申请号：US13808926
申请日：2011-08-01
申请人： Hai Won Kim , Sang Ho Woo
发明人： Hai Won Kim , Sang Ho Woo
IPC分类号： H01L21/02
CPC分类号： H01L21/02271 , C23C16/345 , C23C16/401 , C23C16/4554 , H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02219 , H01L21/02274 , H01L21/0228 , H01L21/02532 , H01L21/0262
摘要： Provided is a method of depositing a cyclic thin film that can provide excellent film properties and step coverage. The method comprises the steps of forming a silicon thin film by repeating a silicon deposition step for depositing silicon on a substrate by injecting a silicon precursor into a chamber into which the substrate is loaded and a first purge step for removing a non-reacted silicon precursor and a reacted byproduct from the chamber; and forming the insulating film including silicon from the silicon thin film by forming a plasma atmosphere into the chamber.
摘要翻译：提供一种沉积能够提供优异的膜性质和阶梯覆盖的环状薄膜的方法。该方法包括以下步骤：通过重复硅沉积步骤形成硅薄膜，用于通过将硅前体注入到其中负载衬底的室中沉积硅，以及用于去除未反应的硅前体的第一吹扫步骤和来自室的反应副产物; 以及通过在所述室中形成等离子体气氛，从所述硅薄膜形成包括硅的绝缘膜。

28. 发明申请

US20110111582A1 METHOD FOR DEPOSITING ULTRA FINE GRAIN POLYSILICON THIN FILM 审中-公开
标题翻译：沉积超细晶粒多晶硅薄膜的方法
公开(公告)号：US20110111582A1
公开(公告)日：2011-05-12
申请号：US12990629
申请日：2009-04-29
申请人： Hai Won Kim , Sang Ho Woo , Sung Gil Cho , Song Hwan , Kyung Soo Jung
发明人： Hai Won Kim , Sang Ho Woo , Sung Gil Cho , Song Hwan , Kyung Soo Jung
IPC分类号： H01L21/285
CPC分类号： C23C16/24 , H01L21/02532 , H01L21/02595 , H01L21/0262 , H01L21/28556 , H01L21/32055
摘要： Disclosed is a method for depositing a polysilicon thin film with ultra-fine crystal grains. According to the present invention, the polysilicon thin film is deposited on a substrate by supplying source gases inside a chamber in which the substrate is loaded, wherein the source gases include a silicon-based gas and an oxygen-based gas. The mixing ratio of the oxygen-based gas to the silicon-based gas may be 0.15 or less (excluding 0). The oxygen within the thin film may be 20 atomic % (atomic percentage) or less (excluding 0).
摘要翻译：公开了一种用超细晶粒沉积多晶硅薄膜的方法。根据本发明，通过在其中装载基板的室内供给源气体将多晶硅薄膜沉积在基板上，其中源气体包括硅基气体和氧基气体。氧基气体与硅系气体的混合比可以为0.15以下（不包括0）。薄膜内的氧可以为20原子％（原子百分比）以下（不包括0）。

29. 发明授权

US07688570B2 Capacitor with nanotubes and method for fabricating the same 失效
标题翻译：纳米管电容器及其制造方法
公开(公告)号：US07688570B2
公开(公告)日：2010-03-30
申请号：US12288880
申请日：2008-10-24
申请人： Eun-A Lee , Ho-Jin Cho , Young-Dae Kim , Jun-Soo Chang , Su-Jin Chae , Hai-Won Kim
发明人： Eun-A Lee , Ho-Jin Cho , Young-Dae Kim , Jun-Soo Chang , Su-Jin Chae , Hai-Won Kim
IPC分类号： H01G4/06
CPC分类号： B82Y10/00 , H01G4/005 , H01G4/33 , H01L23/5223 , H01L27/10852 , H01L28/82 , H01L28/84 , H01L28/90 , H01L2924/0002 , H01L2924/00
摘要： A capacitor with nanotubes and a method for fabricating the same are provided. The capacitor includes: a lower electrode including a patterned conductive layer and a plurality of nanotubes formed on the patterned conductive layer in the shape of whiskers without using a catalytic layer; a dielectric layer formed on the lower electrode; and an upper electrode formed on the dielectric layer. The method includes the steps of: forming a conductive layer for forming a lower electrode; forming a nanotube array including a plurality of nanotubes formed on the conductive layer without using a catalytic layer; forming a dielectric layer on the nanotube array; and forming an upper electrode on the dielectric layer.
摘要翻译：提供了一种具有纳米管的电容器及其制造方法。所述电容器包括：下电极，其包括图案化导电层和形成在所述图案化导电层上的多个纳米管，所述多个纳米管不需要使用催化剂层; 形成在下电极上的电介质层; 以及形成在电介质层上的上电极。该方法包括以下步骤：形成用于形成下电极的导电层; 在不使用催化剂层的情况下形成包括形成在所述导电层上的多个纳米管的纳米管阵列; 在纳米管阵列上形成介电层; 以及在所述电介质层上形成上电极。

30. 发明申请

US20080211003A1 Capacitor in semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件中的电容器及其制造方法
公开(公告)号：US20080211003A1
公开(公告)日：2008-09-04
申请号：US12117904
申请日：2008-05-09
申请人： Eun A. Lee , Hai Won Kim
发明人： Eun A. Lee , Hai Won Kim
IPC分类号： H01L27/108
CPC分类号： H01L28/40
摘要： The present invention relates to a capacitor in semiconductor device and a method of manufacturing the same, wherein, owing to formation of a lower electrode and an upper electrode into a stack structure of a poly-silicon layer and an aluminum (Al) layer and formation of an alumina (Al2O3) film as a dielectric film, the lower electrode is formed into a stack structure of the poly-silicon layer-aluminum (Al) layer, thus increasing a surface area of electrodes due to the absence of oxidation during annealing, and preventing degeneration of the device, and use of the dielectric film including a high-dielectric constant material layer enables reduction of the dielectric film's thickness. Accordingly, the present invention is capable of increasing capacitance, is capable of reducing leakage current and improving dielectric breakdown characteristics via internal formation of an MIM capacitor, and is capable of reducing production costs by performing a continuous process via use of a single piece of equipment.
摘要翻译：本发明涉及一种半导体器件中的电容器及其制造方法，其中，由于将下电极和上电极形成为多晶硅层和铝（Al）层的叠层结构和形成的作为电介质膜的氧化铝（Al 2 O 3 O 3）膜，下电极形成为多晶硅 - 铝（Al）层的叠层结构因此，由于退火时不会发生氧化而使电极的表面积增加，并且能够防止器件变性，并且使用包含高介电常数材料层的电介质膜能够降低电介质膜的厚度。因此，本发明能够增加电容，能够通过MIM电容器的内部形成来减少泄漏电流和提高电介质击穿特性，并能够通过使用单件设备进行连续的处理来降低生产成本。

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