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11. 发明授权

US06674103B2 HBT with nitrogen-containing current blocking base collector interface and method for current blocking 有权
标题翻译： HBT与含氮电流阻塞基极收集器接口和电流阻塞方法
公开(公告)号：US06674103B2
公开(公告)日：2004-01-06
申请号：US09919367
申请日：2001-07-31
申请人： Charles W. Tu , Peter M. Asbeck , Kazuhiro Mochizuki , Rebecca Welty
发明人： Charles W. Tu , Peter M. Asbeck , Kazuhiro Mochizuki , Rebecca Welty
IPC分类号： H01L310328
CPC分类号： H01L29/7371 , H01L29/0821 , H01L29/1004 , H01L29/2003
摘要： An improved HBT of the invention reduces the current blocking effect at the base-collector interface. Nitrogen is incorporated at the base-collector interface in an amount sufficient to reduce the conduction band energy of the collector at the base-collector interface to equal the conduction band energy of the base. In a preferred embodiment, a nitrogen concentration on the order of 2% is used in a thin ˜20 nm layer at the base-collector interface. Preferred embodiment HBTs of the invention include both GaAs HBTs and InP transistors in various layer structures, e.g., single and double heterojunction bipolar transistors and blocked hole bipolar transistors.
摘要翻译：本发明的改进的HBT降低了基极 - 集电极界面处的电流阻塞效应。在基极 - 集电极界面处以足以降低集电极界面处的集电极的导带能量等于基极的导带能量的量引入氮。在优选的实施方案中，在基极 - 收集器界面处的薄的〜20nm层中使用2％量级的氮浓度。本发明的优选实施例HBT包括GaAs HBT和各种层结构中的InP晶体管，例如单和双异质结双极晶体管和阻塞双极晶体管。

12. 发明授权

US06667498B2 Nitride semiconductor stack and its semiconductor device 有权
公开(公告)号：US06667498B2
公开(公告)日：2003-12-23
申请号：US10163698
申请日：2002-06-05
申请人： Toshiki Makimoto , Kazuhide Kumakura , Naoki Kobayashi
发明人： Toshiki Makimoto , Kazuhide Kumakura , Naoki Kobayashi
IPC分类号： H01L310328
CPC分类号： H01L33/32 , H01L29/2003 , H01L29/66318 , H01L29/7371
摘要： A transistor structure is implemented which can achieve high current gain by causing electrons injected from an emitter to reach a collector. An InGaN graded layer, which is interposed between a p-type InGaN layer and an n-type GaN layer, includes an In composition that varies from 0% to 10%. A bandgap of the thin film structure is gradually reduced from the substrate side to the surface side. An AlN buffer layer is grown on an SiC substrate by 100 nm thick, followed by growing a Si-doped GaN layer used for forming an ohmic electrode. A Si-doped GaN layer (n-type GaN layer) is grown thereon, followed by growing an InGaN layer whose In composition is varied, and by growing, an Mg-doped InGaN (p-type GaN layer), thereby fabricating a heterojunction diode.

13. 发明授权

US06605831B1 Field-effect semiconductor device 有权
标题翻译：场效应半导体器件
公开(公告)号：US06605831B1
公开(公告)日：2003-08-12
申请号：US09659134
申请日：2000-09-11
申请人： Makoto Inai , Hidehiko Sasaki
发明人： Makoto Inai , Hidehiko Sasaki
IPC分类号： H01L310328
CPC分类号： H01L29/802 , H01L29/7785 , H01L29/7787
摘要： A field-effect semiconductor device includes a channel layer; a barrier structure formed on the channel layer and including a plurality of semiconductor layers; a plurality of ohmic electrodes formed above the barrier structure; and a Schottky electrode formed on the barrier structure between the ohmic electrodes. The barrier structure has an electron-affinity less than that of the channel layer and includes at least two heavily doped layers and a lightly doped layer provided therebetween.
摘要翻译：场效应半导体器件包括沟道层; 形成在所述沟道层上并且包括多个半导体层的势垒结构; 形成在阻挡结构上方的多个欧姆电极; 以及形成在欧姆电极之间的阻挡结构上的肖特基电极。阻挡结构具有小于沟道层的电子亲和力，并且包括至少两个重掺杂层和在其间设置的轻掺杂层。

14. 发明授权

US06583454B2 Nitride based transistors on semi-insulating silicon carbide substrates 有权
公开(公告)号：US06583454B2
公开(公告)日：2003-06-24
申请号：US09821360
申请日：2001-03-29
申请人： Scott Thomas Sheppard , Scott Thomas Allen , John Williams Palmour
发明人： Scott Thomas Sheppard , Scott Thomas Allen , John Williams Palmour
IPC分类号： H01L310328
CPC分类号： H01L29/1608 , H01L29/2003 , H01L29/267 , H01L29/452 , H01L29/7783 , H01L29/7787
摘要： A high electron mobility transistor (HEMT) is disclosed that includes a semi-insulating silicon carbide substrate, an aluminum nitride buffer layer on the substrate, an insulating gallium nitride layer on the buffer layer, an active structure of aluminum gallium nitride on the gallium nitride layer, a passivation layer on the aluminum gallium nitride active structure, and respective source, drain and gate contacts to the aluminum gallium nitride active structure.

15. 发明授权

US06583437B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06583437B2
公开(公告)日：2003-06-24
申请号：US09810607
申请日：2001-03-19
申请人： Tomohisa Mizuno , Naoharu Sugiyama , Shinichi Takagi
发明人： Tomohisa Mizuno , Naoharu Sugiyama , Shinichi Takagi
IPC分类号： H01L310328
CPC分类号： H01L21/76243 , H01L21/26533 , H01L29/1054 , H01L29/78687 , Y10S438/933 , Y10S438/938
摘要： A method of manufacturing a semiconductor device which includes forming a first SiGe layer having a low content of Ge, forming an oxide layer by implanting oxygen ions into the first SiGe layer, and then annealing the first SiGe layer. The method also includes forming, on the first SiGe layer, a second SiGe layer which has a higher content of Ge than the first SiGe layer, forming a strained Si layer on the second SiGe layer, and forming a field effect transistor in which the strained Si layer is used a channel region. Further, a field effect transistor may be formed on a semiconductor substrate having an indefectible, high-quality, buried oxide layer and a largely strained Si layer, and hence a high-speed, low-power-consumption semiconductor device can be realized.
摘要翻译：一种制造半导体器件的方法，包括：通过将氧离子注入到第一SiGe层中形成具有低Ge含量的第一SiGe层，形成氧化层，然后退火第一SiGe层。该方法还包括在第一SiGe层上形成第二SiGe层，其具有比第一SiGe层更高的Ge含量，在第二SiGe层上形成应变Si层，并形成其中应变的场效晶体管 Si层用于沟道区。此外，可以在具有不可缺的，高质量的掩埋氧化物层和大的应变Si层的半导体衬底上形成场效应晶体管，因此可以实现高速，低功耗的半导体器件。

16. 发明授权

US06573528B2 Detector diode with internal calibration structure 失效
公开(公告)号：US06573528B2
公开(公告)日：2003-06-03
申请号：US09976907
申请日：2001-10-12
申请人： Walter David Braddock
发明人： Walter David Braddock
IPC分类号： H01L310328
CPC分类号： H01L29/882 , H01L29/155
摘要： This patent is generally directed towards a method and device for providing a diode structure that has a barrier height that may be readily engineered with a series resistance that may be independently varied while simultaneously providing for the complete characterization and discernment of the barrier height in a microwave and millimeter-wave rectifying diode without the need for device fabrication and electrical measurement. The present invention generally relates to microwave and millimeterwave diodes, and more particularly to low barrier structures within these diodes that are capable of rectification of microwave and millimeterwave radiation. The diode structure comprises a semiconductor substrate, a verification structure consisting of alternating layers of binary compound semiconductors that exist in crystalline form on said substrate, a doped contact layer with sufficient doping and thickness to provide for the formation of electrical contact with ohmic behavior, a barrier structure consisting of some combination of multiple heterojunctions and alternating layers that may be periodic in nature or of a chirped superlattice nature in said barrier, and a doped contact layer that is of the proper thickness and doping to allow the formation of a sufficient electrical contact with ohmic or partly resistive nature as necessary for the required contact.

17. 发明授权

US06570194B2 Compound semiconductor field effect transistor with improved ohmic contact layer structure and method of forming the same 失效
标题翻译：具有改善的欧姆接触层结构的复合半导体场效应晶体管及其形成方法
公开(公告)号：US06570194B2
公开(公告)日：2003-05-27
申请号：US09793656
申请日：2001-02-27
申请人： Takehiko Kato , Naotaka Iwata
发明人： Takehiko Kato , Naotaka Iwata
IPC分类号： H01L310328
CPC分类号： H01L29/452 , H01L29/4175 , H01L29/7785
摘要： The present invention provides a structure of a semiconductor device, the structure comprising: a compound semiconductor multi-layer structure having at least a channel region; and at least an ohmic contact layer provided adjacent to a first side face of the multi-layer structure, and the ohmic contact layer being in contact with at least a part of the first side face, wherein the ohmic contact layer has a top extending portion which extends in contact with a part of a top surface of the multi-layer structure.
摘要翻译：本发明提供一种半导体器件的结构，该结构包括：至少具有沟道区的化合物半导体多层结构; 以及至少与所述多层结构的第一侧面相邻设置的欧姆接触层，所述欧姆接触层与所述第一侧面的至少一部分接触，其中所述欧姆接触层具有顶部延伸部分其与多层结构的顶表面的一部分延伸接触。

18. 发明授权

US06525348B1 Two terminal edge illuminated epilayer waveguide phototransistor 失效
标题翻译：两个端边照明外延波导光电晶体管
公开(公告)号：US06525348B1
公开(公告)日：2003-02-25
申请号：US09907318
申请日：2001-07-17
申请人： David C. Scott , Timothy A. Vang , Srinath Kalluri
发明人： David C. Scott , Timothy A. Vang , Srinath Kalluri
IPC分类号： H01L310328
CPC分类号： H01L31/1105 , H01L31/03046 , Y02E10/544
摘要： An edge illuminated epilayer waveguide phototransistor including a subcollector layer formed from an epitaxially grown quaternary semiconductor material, such as heavily doped InGaAsP. A collector region of undoped InGaAs is epitaxially grown on the subcollector layer. A base region of moderately doped InGaAs is epitaxially grown on the collector layer. An emitter region, including a doped InGaAsP layer, a doped InP layer, and a heavily doped InGaAs emitter contact layer, is epitaxially grown on the base layer. The various layers and regions are formed so as to define an edge-illuminated facet for receiving incident light. Also, the base does not have an ohmic contact so that the base thickness can be minimized. Finally, the base doping concentration is minimized so that the gain-bandwidth product can be maximized.
摘要翻译：包括由外延生长的四元半导体材料（例如重掺杂的InGaAsP）形成的子集电极层的边缘照明外延波导光电晶体管。未掺杂的InGaAs的集电极区域在子集电极层上外延生长。中等掺杂的InGaAs的基极区域在集电极层上外延生长。在基极层上外延生长包括掺杂的InGaAsP层，掺杂的InP层和重掺杂的InGaAs发射极接触层的发射极区域。形成各种层和区域以限定用于接收入射光的边缘照明面。此外，基座不具有欧姆接触，使得基底厚度可以最小化。最后，使基极掺杂浓度最小化，使得增益带宽乘积可以最大化。

19. 发明授权

US06509586B2 Semiconductor device, method for fabricating the semiconductor device and semiconductor integrated circuit 失效
公开(公告)号：US06509586B2
公开(公告)日：2003-01-21
申请号：US09794012
申请日：2001-02-28
申请人： Yuji Awano
发明人： Yuji Awano
IPC分类号： H01L310328
CPC分类号： H01L29/66772 , H01L21/84 , H01L27/1203 , H01L29/78618 , H01L29/78639 , H01L29/78642 , H01L29/78645 , H01L29/78648 , H01L29/78684
摘要： A semiconductor device comprises: a channel region 14 of silicon, a source region 26 and a drain region 26 respectively forming junction with the channel region 14, and a gate electrode 30 formed on the channel region 14 interposing an insulation film 16 therebetween, either of the source region 26 and the drain region 26 being formed of SiGeC, which lattice-matches with silicon. Whereby parasitic resistance between the source region and the drain region can be much decreased.

20. 发明授权

US06489639B1 High electron mobility transistor 有权
标题翻译：高电子迁移率晶体管
公开(公告)号：US06489639B1
公开(公告)日：2002-12-03
申请号：US09577508
申请日：2000-05-24
申请人： William E. Hoke , Peter J. Lemonias , Theodore D. Kennedy
发明人： William E. Hoke , Peter J. Lemonias , Theodore D. Kennedy
IPC分类号： H01L310328
CPC分类号： H01L29/66462 , H01L21/28587 , H01L29/205 , H01L29/7785
摘要： A semiconductor structure, e.g., a high electron mobility transistor structure, is formed by using metamorphic growth and strain compensation. The structure includes a substrate, a graded layer over the substrate, a first donor/barrier layer over the graded layer, and a channel layer over the first donor/barrier layer. The substrate has a substrate lattice constant, and the graded layer has a graded lattice constant. The graded layer has a first lattice constant near a bottom of the graded layer substantially equal to the substrate lattice constant and a second lattice constant near a top of the graded layer different than the first lattice constant. The first donor/barrier layer has a third lattice constant, and the channel layer has a fourth lattice constant. The second lattice constant is intermediate the third and fourth lattice constants.
摘要翻译：通过使用变质生长和应变补偿形成半导体结构，例如高电子迁移率晶体管结构。该结构包括衬底，衬底上的渐变层，梯度层上的第一施主/势垒层，以及在第一施主/阻挡层上的沟道层。衬底具有衬底晶格常数，并且渐变层具有梯度晶格常数。渐变层在梯度层的底部附近具有基本上等于衬底晶格常数的第一晶格常数，并且在渐变层的顶部附近的第二晶格常数不同于第一晶格常数。第一施主/势垒层具有第三晶格常数，沟道层具有第四晶格常数。第二晶格常数在第三和第四晶格常数之间。

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