专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明申请

US20170113925A1 METHOD OF ENCAPSULATING A MICROELECTRONIC COMPONENT 审中-公开
公开(公告)号：US20170113925A1
公开(公告)日：2017-04-27
申请号：US15297662
申请日：2016-10-19
申请人： Commissariat a L'Energie Atomique et aux Energies Alternatives
发明人： Patrice REY
IPC分类号： B81C1/00
CPC分类号： B81C1/0023 , B81C1/00333 , B81C2201/0108 , B81C2201/0109 , B81C2201/0126 , B81C2201/014 , B81C2201/056 , B81C2203/01 , B81C2203/0792
摘要： Method for encapsulation of a microelectronic component, including making of a portion of sacrificial material on a front face of a first substrate in which the component is intended to be made, then making of a cover encapsulating the portion of sacrificial material, then making of the component by etching the first substrate from its back face, such that part of the component is arranged to face the portion of sacrificial material and such that the portion of sacrificial material is accessible from a back face of the component, then elimination of the portion of sacrificial material by etching from the back face of the component, then securing of the back face of the component to a second substrate.

12. 发明申请

US20150175845A1 PROCESS FOR THE MANUFACTURE OF SEMICONDUCTOR DEVICES COMPRISING THE CHEMICAL MECHANICAL POLISHING (CMP) OF III-V MATERIAL IN THE PRESENCE OF A CMP COMPOSITION COMPRISING A SPECIFIC NON-IONIC SURFACTANT 有权
标题翻译：在包含特定非离子表面活性剂的CMP组合物存在下，包含III-V材料的化学机械抛光（CMP）的半导体器件的制造方法
公开(公告)号：US20150175845A1
公开(公告)日：2015-06-25
申请号：US14402975
申请日：2013-05-21
申请人： BASF SE
发明人： Yuzhuo Li , Bastian Marten Noller , Christophe Gillot , Diana Franz
IPC分类号： C09G1/02 , H01L21/306
CPC分类号： C09G1/02 , B81C2201/0121 , B81C2201/0123 , B81C2201/0126 , H01L21/02024 , H01L21/302 , H01L21/304 , H01L21/30625 , H01L21/3212 , H01L21/461
摘要： A process for the manufacture of semiconductor devices comprising the chemical-mechanical polishing of a substrate or layer containing at least one III-V material in the presence of a chemical-mechanical polishing composition (Q1) comprising (A) inorganic particles, organic particles, or a mixture or composite thereof, (B) at least one amphiphilic non-ionic surfactant having (b1) at least one hydrophobic group; and (b2) at least one hydrophilic group selected from the group consisting of polyoxyalkylene groups comprising (b22) oxyalkylene monomer units other than oxyethylene monomer units; and (M) an aqueous medium.
摘要翻译：一种用于制造半导体器件的方法，包括在化学机械抛光组合物（Q1）的存在下对包含至少一种III-V材料的基底或层进行化学机械抛光，所述化学机械抛光组合物包含（A）无机颗粒，有机颗粒，或其混合物或复合物，（B）至少一种具有（b1）至少一个疏水基团的两亲性非离子表面活性剂; 和（b2）至少一种选自包含（b22）氧化烯单体单元以外的氧化烯单体单元的聚氧化烯基的亲水基团; 和（M）水性介质。

13. 发明授权

US06846746B2 Method of smoothing a trench sidewall after a deep trench silicon etch process 失效
标题翻译：在深沟槽硅蚀刻工艺之后平滑沟槽侧壁的方法
公开(公告)号：US06846746B2
公开(公告)日：2005-01-25
申请号：US10137543
申请日：2002-05-01
申请人： Michael Rattner , Jeffrey D. Chinn
发明人： Michael Rattner , Jeffrey D. Chinn
IPC分类号： B81C1/00 , H01L21/3065 , H01L21/302
CPC分类号： B81C1/00611 , B81B2203/033 , B81C2201/0126 , B81C2201/0178 , H01L21/3065 , H01L21/30655
摘要： Disclosed herein is a method of smoothing a trench sidewall after a deep trench silicon etch process which minimizes sidewall scalloping present after the silicon trench etch. The method comprises exposing the silicon trench sidewall to a plasma generated from a fluorine-containing gas, at a process chamber pressure within the range of about 1 mTorr to about 30 mTorr, for a time period within the range of about 10 seconds to about 600 seconds. A substrate bias voltage within the range of about −10 V to about −40 V is applied during the performance of the post-etch treatment method of the invention.
摘要翻译：这里公开了一种在深沟槽硅蚀刻工艺之后平滑沟槽侧壁的方法，其最小化在硅沟槽蚀刻之后存在的侧壁扇形。该方法包括将硅沟槽侧壁暴露于在约1mTorr至约30mTorr范围内的处理室压力下从含氟气体产生的等离子体，时间范围为约10秒至约600 秒。在本发明的蚀刻后处理方法的执行期间，施加约-10V至约-40V范围内的衬底偏置电压。

14. 发明申请

WO2008133767A3 POLYSILICON PLANARIZATION SOLUTION FOR PLANARIZING LOW TEMPERATURE POLYSILICON THIN FILM PANELS 审中-公开
标题翻译：用于平面化低温多晶硅薄膜面板的多晶硅平面解决方案
公开(公告)号：WO2008133767A3
公开(公告)日：2009-01-08
申请号：PCT/US2008002169
申请日：2008-02-19
申请人： MALLINCKRODT BAKER INC , KIM SANG IN , HONG SEONG JIN
发明人： KIM SANG IN , HONG SEONG JIN
IPC分类号： H01L21/311 , C09K13/02 , H01L21/3213
CPC分类号： B81C1/00611 , B81C2201/0126 , C09K13/02 , H01L21/32134 , H01L29/6675
摘要： A highly aqueous, strongly basic planarizing solution and a process for its use to reducing or essentially eliminating protrusions or projections extending generally upwardly from a generally planar surface of polysilicon film produced by Low Temperature Poly Si (LTPS) annealing a film of amorphous silicon deposited on a substrate; the process including contacting the surface of the generally planar polysilicon film with the highly aqueous, strongly basic solution for a time sufficient to selectively etch the protrusions or projections from the surface of the generally planar polysilicon film without any significant etching of the generally planar polysilicon film, said highly aqueous, strongly basic solution being a solution having a pH of 12 or higher and comprising water, at least one strong base, and at least one etch rate control agent.
摘要翻译：高度水性，强碱性的平面化溶液和用于减少或基本上消除从通过低温多晶硅（LTPS）生产的多晶硅膜的大致平坦表面大致向上延伸的突起或突起的方法，退火沉积在非晶硅上的非晶硅膜底物; 该方法包括使大体上平坦的多晶硅膜的表面与高水溶液，强碱性溶液接触一段时间，足以从大体上平坦的多晶硅膜的表面选择性地蚀刻突起或突起，而无需大致平坦的多晶硅膜的显着蚀刻所述高含水强碱性溶液是pH为12或更高的溶液，其包含水，至少一种强碱和至少一种蚀刻速率控制剂。

15. 发明申请

WO2008133767A2 POLYSILICON PLANARIZATION SOLUTION FOR PLANARIZING LOW TEMPERATURE POLYSILICON THIN FILM PANELS 审中-公开
标题翻译：用于平面化低温多晶硅薄膜面板的多晶硅平面解决方案
公开(公告)号：WO2008133767A2
公开(公告)日：2008-11-06
申请号：PCT/US2008/002169
申请日：2008-02-19
申请人： MALLINCKRODT BAKER, INC. , KIM, Sang In , HONG, Seong Jin
发明人： KIM, Sang In , HONG, Seong Jin
IPC分类号： H01L21/311
CPC分类号： B81C1/00611 , B81C2201/0126 , C09K13/02 , H01L21/32134 , H01L29/6675
摘要： A highly aqueous, strongly basic planarizing solution and a process for its use to reducing or essentially eliminating protrusions or projections extending generally upwardly from a generally planar surface of polysilicon film produced by Low Temperature Poly Si (LTPS) annealing a film of amorphous silicon deposited on a substrate; the process including contacting the surface of the generally planar polysilicon film with the highly aqueous, strongly basic solution for a time sufficient to selectively etch the protrusions or projections from the surface of the generally planar polysilicon film without any significant etching of the generally planar polysilicon film, said highly aqueous, strongly basic solution being a solution having a pH of 12 or higher and comprising water, at least one strong base, and at least one etch rate control agent.
摘要翻译：高度水性，强碱性的平面化溶液和用于减少或基本上消除从通过低温多晶硅（LTPS）生产的多晶硅膜的大致平坦表面大致向上延伸的突起或突起的方法，退火沉积在非晶硅上的非晶硅膜底物; 该方法包括使大体上平坦的多晶硅膜的表面与高水溶液，强碱性溶液接触一段时间，足以从大体上平坦的多晶硅膜的表面选择性地蚀刻突起或突起，而无需大致平坦的多晶硅膜的显着蚀刻所述高含水强碱性溶液是pH为12或更高的溶液，其包含水，至少一种强碱和至少一种蚀刻速率控制剂。

16. 发明申请

WO2004030057A1 VERFAHREN ZUR STRUKTURIERUNG EINES AUS GLASARTIGEM MATERIAL BESTEHENDEN FLÄCHENSUBSTRATS 审中-公开
标题翻译：法玻璃材质现有面积基板的构建以
公开(公告)号：WO2004030057A1
公开(公告)日：2004-04-08
申请号：PCT/EP2003/009328
申请日：2003-08-22
申请人： FRAUNHOFER GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG e. V. , QUENZER, Hans-Joachim , SCHULZ, Arne, Veit , MERZ, Peter
发明人： QUENZER, Hans-Joachim , SCHULZ, Arne, Veit , MERZ, Peter
IPC分类号： H01L21/20
CPC分类号： B81C1/00611 , B81C2201/0126 , C03B19/02 , C03B23/02
摘要： Beschrieben wird ein Verfahren zur Strukturierung eines aus glasartigen Material bestehenden Flächensubstrats. Das erfindungsgemässe Verfahren zeichnet sich durch die Kombination der folgenden Verfahrensschritte aus: - Bereitstellen eines aus einem Halbleitermaterial bestehenden Halbleiter Flächensubstrats, - Dickenreduzieren des Halbleiter-Flächensubstrats innerhalb wenigstens eines Oberflächenbereiches des Halbleiter-Flächensubstrates zur Ausbildung eines gegenüber des dickenreduzierten Oberflächenflächenbereiches erhabenen Oberflächenbereiches, - Strukturieren des erhabenen Oberflächenbereiches des Halbleiter Flächensubstrats mittels lokalen mechanischem Materialabtrag, zum Einbringen von Vertiefungen innerhalb des erhabenen Oberflächenbereiches,.- Verbinden der strukturierten Oberfläche des Halbleiter-Flächensubstrats mit dem glasartigen Flächensubstrat derart, dass das glasartige Flächensubstrat zumindest teilweise den dickenreduzierten Oberflächenflächenbereich überdeckt, - Tempern der verbundenen Flächensubstrate derart, dass in einer ersten Temperphase, die unter Unterdruckbedingungen durchgeführt wird, das den dickenreduzierten Oberflächenbereich überdeckende glasartige Flächensubstrat mit dem dickenreduzierten Oberflächenbereich eine fluiddichte Verbindung eingeht, wobei das Flächensubstrat die Vertiefungen unter Unterdruckbedingungen fluiddicht überdeckt, und dass in einer zweiten Temperphase ein Hineinfliessen wenigstens von Teilbereichen des glasartigen Materials in die Vertiefungen der strukturierten Oberfläche des HalbleiterFlächensubstrats erfolgt.
摘要翻译：描述了一种用于构造由玻璃型材料基板的表面的方法。本发明的方法的特征在于以下方法步骤的组合： - 提供由半导体平坦衬底的半导体材料的基团， - 至少在所述半导体平坦的衬底，以形成相对的面部分凸起的表面区域的厚度，减小的表面的表面部分中的厚度减小的半导体表面衬底的 - 图案化该的凸起表面区域由所述局部机械材料去除的手段半导体平坦基板，凸起的表面区域内引入凹部，.-与所述玻璃型扁平基材，所述半导体扁平基材的结构化表面连接以这样的方式使玻璃样表面基板至少部分地重叠厚度减小的表面积， - 退火该相关平面衬底，使得在第一回火阶段，这UNT下 erdruckbedingungen进行，其经历覆盖玻璃样表面基板具有减小的厚度的表面积，流体密封的连接，其中所述平面基底流体密封的，减压条件下孔所覆盖的厚度减小的表面面积，并且在一个第二回火阶段，流入所述玻璃状材料的至少部分区域中的结构化表面的凹陷部所述半导体基板平坦发生。

17. 发明公开

EP3094592A1 HERSTELLUNGSVERFAHREN FÜR EIN MIKROMECHANISCHES BAUTEIL UND MIKROMECHANISCHES BAUTEIL 审中-公开
标题翻译：用于微机械结构和微机械结构
公开(公告)号：EP3094592A1
公开(公告)日：2016-11-23
申请号：EP14800066.4
申请日：2014-11-20
申请人： Robert Bosch GmbH
发明人： LUTZ, Theresa , HEUCK, Friedjof
IPC分类号： B81C1/00
CPC分类号： B81C1/00595 , B81C1/00611 , B81C2201/0126 , B81C2201/0132 , B81C2201/0133
摘要： The invention relates to a production method for a micromechanical part, comprising at least the following steps: forming a main structure (10) of at least one component of the micromechanical part from at least one crystalline layer (12) of a substrate by means of a crystal orientation-independent etching step, and etching at least one area (18) in a defined crystal plane (20) away on the main structure (10) of the at least one component by means of a crystal orientation-dependent etching step. For said crystal orientation-dependent etching step, the defined crystal plane (20) in respect of which the at least one area (18) etched away on the main structure (10) is oriented is the crystal plane that features the lowest etching rate of all crystal planes. The invention further relates to a micromechanical part.

18. 发明公开

EP2852644A4 A PROCESS FOR THE MANUFACTURE OF SEMICONDUCTOR DEVICES COMPRISING THE CHEMICAL MECHANICAL POLISHING (CMP) OF III-V MATERIAL IN THE PRESENCE OF A CMP COMPOSITION COMPRISING A SPECIFIC NON-IONIC SURFACTANT 审中-公开
标题翻译： PROCESS用于产生具有化学机械抛光（CMP）的III-V材料的存在CMP组合物的半导体元件与特定的，非离子表面活性
公开(公告)号：EP2852644A4
公开(公告)日：2016-04-06
申请号：EP13794728
申请日：2013-05-21
申请人： BASF SE
发明人： NOLLER BASTIAN MARTEN , GILLOT CHRISTOPHE , FRANZ DIANA , LI YUZHUO
IPC分类号： H01L21/306 , C09G1/02
CPC分类号： C09G1/02 , B81C2201/0121 , B81C2201/0123 , B81C2201/0126 , H01L21/02024 , H01L21/302 , H01L21/304 , H01L21/30625 , H01L21/3212 , H01L21/461

19. 发明公开

EP1535315A1 GLASARTIGES FLÄCHENSUBSTRAT, SEINE VERWENDUNG UND VERFAHREN ZU SEINER HERSTELLUNG 有权转让
标题翻译：像玻璃一样面积的基板，其用途及其制造方法
公开(公告)号：EP1535315A1
公开(公告)日：2005-06-01
申请号：EP03775135.1
申请日：2003-08-22
申请人： FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DERANGEWANDTEN FORSCHUNG E.V.
发明人： QUENZER, Hans-Joachim , SCHULZ, Arne, Veit , MERZ, Peter
IPC分类号： H01L21/20 , B81C1/00 , C03B19/02 , C03B23/02
CPC分类号： B81C1/00611 , B81C2201/0126 , C03B19/02 , C03B23/02
摘要： Disclosed is a method for structuring a planar substrate made of a glass-type material, which is characterized by the following steps: - the thickness of the planar semiconductor substrate is reduced within at least one surface area thereof so as to obtain a surface area that is raised relative to the surface areas having a reduced thickness; - the raised surface area of the planar semiconductor substrate is structured by locally removing material in a mechanical manner so as to introduce recesses within the raised surface area; - the structured surface of the planar semiconductor substrate is connected to the glass-type planar substrate such that the glass-type planar substrate at least partly covers the surface area having a reduced thickness; - the connected planar substrates are heated up such that the glass-type planar substrate which covers the surface area having a reduced thickness forms a fluid-tight connection along with the surface area having a reduced thickness in a first heating phase which is carried out at negative pressure conditions, the planar substrate covering the recesses in a fluid-tight manner at negative pressure conditions, whereupon at least some areas of the glass-type material flow into the recesses of the structured surface of the planar semiconductor substrate in a second heating phase. Also disclosed are a glass-type planar substrate and the use thereof.

20. 发明申请

US20080119051A1 Method For Selective CMP Of Polysilicon 失效
标题翻译：多晶硅选择性CMP方法
公开(公告)号：US20080119051A1
公开(公告)日：2008-05-22
申请号：US11562443
申请日：2006-11-22
申请人： Suryadevara V. Babu , Anita Natarajan , Sharath Hegde
发明人： Suryadevara V. Babu , Anita Natarajan , Sharath Hegde
IPC分类号： H01L21/304
CPC分类号： H01L21/3212 , B81C1/00595 , B81C1/00611 , B81C2201/0104 , B81C2201/0126 , C09G1/02 , C09K3/1463
摘要： A method of removing polysilicon in preference to silicon dioxide and/or silicon nitride by chemical mechanical polishing. The method removes polysilicon from a surface at a high removal rate while maintaining a high selectivity of polysilicon to silicon dioxide and/or a polysilicon to silicon nitride. The method is particularly suitable for use in the fabrication of MEMS devices.
摘要翻译：通过化学机械抛光优选去除二氧化硅和/或氮化硅的多晶硅的方法。该方法以高去除率从表面去除多晶硅，同时保持多晶硅对二氧化硅和/或多晶硅与氮化硅的高选择性。该方法特别适用于MEMS器件的制造。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式