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11. 发明授权

US08325127B2 Shift register and architecture of same on a display panel 有权
标题翻译：移位寄存器和结构在显示面板上
公开(公告)号：US08325127B2
公开(公告)日：2012-12-04
申请号：US12823237
申请日：2010-06-25
申请人： Chun-Huan Chang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
发明人： Chun-Huan Chang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
IPC分类号： G06F3/038 , G11C19/00
CPC分类号： G11C19/287 , G09G3/20 , G09G3/3677 , G09G2310/0205 , G09G2310/0281 , G09G2310/0286 , G09G2310/0297 , G09G2310/06
摘要： The present invention relates to a shift register and GOA architecture of the same in a display panel comprising a substrate and a plurality of pixels spatially formed on the substrate defining a number of pixel rows, each pixel row having a height of H. The shift register has the plurality of shift register stages disposed spatially and sequentially on the substrate in such a way that the layout of each shift register stage has a height of (j*H), j being an integer greater than one. Each shift register stages is configured to generate j scanning signals for driving j neighboring pixel rows, respectively.
摘要翻译：本发明涉及一种显示面板中的移位寄存器和GOA结构，包括基板和空间上形成在衬底上的多个像素，其限定多个像素行，每个像素行具有高度H.移位寄存器具有多个移位寄存器级，以这样的方式在基板上空间和顺序地布置，使得每个移位寄存器级的布局具有（j * H）的高度，j是大于1的整数。每个移位寄存器级被配置为分别产生用于驱动j个相邻像素行的j个扫描信号。

12. 发明申请

US20110316833A1 Shift Register and Architecture of Same on a Display Panel 有权
标题翻译：移位寄存器和显示面板上的相同结构
公开(公告)号：US20110316833A1
公开(公告)日：2011-12-29
申请号：US12823237
申请日：2010-06-25
申请人： Chun-Huan Chang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
发明人： Chun-Huan Chang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
IPC分类号： G06F3/038 , G11C19/00
CPC分类号： G11C19/287 , G09G3/20 , G09G3/3677 , G09G2310/0205 , G09G2310/0281 , G09G2310/0286 , G09G2310/0297 , G09G2310/06
摘要： The present invention relates to a shift register and GOA architecture of the same in a display panel comprising a substrate and a plurality of pixels spatially formed on the substrate defining a number of pixel rows, each pixel row having a height of H. The shift register has the plurality of shift register stages disposed spatially and sequentially on the substrate in such a way that the layout of each shift register stage has a height of (j*H), j being an integer greater than one. Each shift register stages is configured to generate j scanning signals for driving j neighboring pixel rows, respectively.
摘要翻译：本发明涉及一种显示面板中的移位寄存器和GOA结构，包括基板和空间上形成在衬底上的多个像素，其限定多个像素行，每个像素行具有高度H.移位寄存器具有多个移位寄存器级，以这样的方式在基板上空间和顺序地布置，使得每个移位寄存器级的布局具有（j * H）的高度，j是大于1的整数。每个移位寄存器级被配置为分别产生用于驱动j个相邻像素行的j个扫描信号。

13. 发明授权

US08331524B2 Shift register circuit 有权
标题翻译：移位寄存器电路
公开(公告)号：US08331524B2
公开(公告)日：2012-12-11
申请号：US13110948
申请日：2011-05-19
申请人： Kuo-Hua Hsu , Chun-Hsin Liu , Yung-Chih Chen , Chih-Ying Lin , Kuo-Chang Su , Yu-Chung Yang
发明人： Kuo-Hua Hsu , Chun-Hsin Liu , Yung-Chih Chen , Chih-Ying Lin , Kuo-Chang Su , Yu-Chung Yang
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G2310/0286
摘要： A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.
摘要翻译：具有波形整形功能的移位寄存器电路包括多个移位寄存器级。每个移位寄存器级包括第一输入单元，上拉单元，下拉电路，第二输入单元，控制单元和波形整形单元。第一输入单元用于响应于第一门信号输出第一驱动控制电压。上拉单元响应于第一驱动控制电压拉起第二门信号。下拉电路用于下拉第一驱动控制电压和第二栅极信号。第二输入单元用于响应于第一门信号输出第二驱动控制电压。控制单元响应于第二驱动控制电压和辅助信号提供控制信号。波形整形单元响应于控制信号对第二门信号执行波形整形操作。

14. 发明申请

US20120140873A1 SHIFT REGISTER 有权
标题翻译：移位寄存器
公开(公告)号：US20120140873A1
公开(公告)日：2012-06-07
申请号：US13372796
申请日：2012-02-14
申请人： Yu-Chung Yang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
发明人： Yu-Chung Yang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G2310/0286 , G11C19/184
摘要： An exemplary shift register includes a control circuit and an output transistor. The control circuit has a start pulse signal input terminal, a first clock pulse signal input terminal and a power supply voltage input terminal and includes a first control transistor and a second control transistor. The output transistor is electrically coupled to the first control transistor and includes a gate driving signal output terminal and a second clock pulse signal input terminal. Moreover, the first control transistor, the second control transistor and the output transistor all are negative threshold voltage transistors.
摘要翻译：示例性移位寄存器包括控制电路和输出晶体管。控制电路具有起始脉冲信号输入端，第一时钟脉冲信号输入端和电源电压输入端，并具有第一控制晶体管和第二控制晶体管。输出晶体管电耦合到第一控制晶体管，并且包括栅极驱动信号输出端和第二时钟脉冲信号输入端。此外，第一控制晶体管，第二控制晶体管和输出晶体管都是负阈值电压晶体管。

15. 发明申请

US20110255652A1 SHIFT REGISTER 有权
标题翻译：移位寄存器
公开(公告)号：US20110255652A1
公开(公告)日：2011-10-20
申请号：US13175475
申请日：2011-07-01
申请人： Yu-Chung YANG , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
发明人： Yu-Chung YANG , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G2310/0286 , G11C19/184
摘要： An exemplary shift register includes a control circuit and an output circuit. The control circuit is electrically coupled to receive a start pulse signal, a first clock pulse signal and a power supply voltage and for generating an enable signal according to the start pulse signal and the first clock pulse signal. A logic low level of the first clock pulse signal is lower than a level of the power supply voltage. The output circuit is subjected to the control of the enable signal and for generating a gate driving signal according to a second clock pulse signal. The second clock pulse signal and the first clock pulse signal are phase-inverted with respect to each other, and a logic low level of the second clock pulse signal is higher than the level of the power supply voltage.
摘要翻译：示例性移位寄存器包括控制电路和输出电路。控制电路电耦合以接收起始脉冲信号，第一时钟脉冲信号和电源电压，并且用于根据起始脉冲信号和第一时钟脉冲信号产生使能信号。第一时钟脉冲信号的逻辑低电平低于电源电压的电平。对输出电路进行使能信号的控制，并根据第二时钟脉冲信号产生栅极驱动信号。第二时钟脉冲信号和第一时钟脉冲信号相对于彼此相位反转，并且第二时钟脉冲信号的逻辑低电平高于电源电压的电平。

16. 发明授权

US08890790B2 Liquid crystal display device with a reduced fabrication area 有权
标题翻译：具有减小的制造面积的液晶显示装置
公开(公告)号：US08890790B2
公开(公告)日：2014-11-18
申请号：US13316572
申请日：2011-12-12
申请人： Chih-Ying Lin , Chun-Hsin Liu , Kuo-Chang Su , Yung-Chih Chen
发明人： Chih-Ying Lin , Chun-Hsin Liu , Kuo-Chang Su , Yung-Chih Chen
IPC分类号： G09G3/36 , G02F1/1362
CPC分类号： G09G3/3688 , G02F1/13624
摘要： A liquid crystal display device includes a plurality of pixel driving circuits and a pixel array. Each pixel driving circuit of the plurality of pixel driving circuits includes four thin film transistors and has four output terminals, where each thin film transistor is used for driving an output terminal of the four output terminals, and the four output terminals are coupled to two gate lines and two sharing lines respectively for outputting two main output signals and two sharing output signals. The phases and timings of the two main output signals and the two sharing output signals are all the same. A pixel of the pixel array is charged/discharged to a specific voltage level according to a main output signal of the two main output signals, a sharing output signal, and a signal of a data line.
摘要翻译：液晶显示装置包括多个像素驱动电路和像素阵列。多个像素驱动电路的每个像素驱动电路包括四个薄膜晶体管，并且具有四个输出端子，其中每个薄膜晶体管用于驱动四个输出端子的输出端子，并且四个输出端子耦合到两个栅极线路和两条共用线路分别输出两路主输出信号和两路共享输出信号。两个主输出信号和两个共享输出信号的相位和时序都相同。像素阵列的像素根据两个主输出信号的主输出信号，共享输出信号和数据线的信号而被充/放电到特定电压电平。

17. 发明授权

US08233584B2 Shift register 有权
标题翻译：移位寄存器
公开(公告)号：US08233584B2
公开(公告)日：2012-07-31
申请号：US13372796
申请日：2012-02-14
申请人： Yu-Chung Yang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
发明人： Yu-Chung Yang , Kuo-Chang Su , Yung-Chih Chen , Chun-Hsin Liu
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G2310/0286 , G11C19/184
摘要： An exemplary shift register includes a control circuit and an output transistor. The control circuit has a start pulse signal input terminal, a first clock pulse signal input terminal and a power supply voltage input terminal and includes a first control transistor and a second control transistor. The output transistor is electrically coupled to the first control transistor and includes a gate driving signal output terminal and a second clock pulse signal input terminal. Moreover, the first control transistor, the second control transistor and the output transistor all are negative threshold voltage transistors.
摘要翻译：示例性移位寄存器包括控制电路和输出晶体管。控制电路具有起始脉冲信号输入端，第一时钟脉冲信号输入端和电源电压输入端，并具有第一控制晶体管和第二控制晶体管。输出晶体管电耦合到第一控制晶体管，并且包括栅极驱动信号输出端和第二时钟脉冲信号输入端。此外，第一控制晶体管，第二控制晶体管和输出晶体管都是负阈值电压晶体管。

18. 发明申请

US20110285950A1 ACTIVE DEVICE ARRAY SUBSTRATE 有权
标题翻译：主动设备阵列基板
公开(公告)号：US20110285950A1
公开(公告)日：2011-11-24
申请号：US12858433
申请日：2010-08-17
申请人： Kuo-Chang Su , Kuo-Hua Hsu , Chun-Hsin Liu , Yung-Chih Chen
发明人： Kuo-Chang Su , Kuo-Hua Hsu , Chun-Hsin Liu , Yung-Chih Chen
IPC分类号： G02F1/1343
CPC分类号： G02F1/136286 , G09G3/3614 , G09G3/3648 , G09G2300/0426 , G09G2300/0452 , G09G2320/0233 , G09G2330/021
摘要： An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively.
摘要翻译：有源器件阵列衬底包括衬底，第一扫描线，第二扫描线，数据线和像素。第一和第二扫描线沿着第一方向交替布置。数据线沿第二方向平行布置。像素被布置成形成沿第一方向交替布置的第一像素行和第二像素行。第一像素行包括分别电连接到第一扫描线，第二扫描线和数据线的第一和第二像素。第二像素行包括分别电连接到第一扫描线，第二扫描线和数据线的第三和第四像素。两个相邻数据线之间的像素排列成两列。在同一列中的像素中，奇数行和偶数行中的像素分别电连接到不同的数据线。

19. 发明授权

US08502948B2 Active device array substrate 有权
标题翻译：有源器件阵列衬底
公开(公告)号：US08502948B2
公开(公告)日：2013-08-06
申请号：US12858433
申请日：2010-08-17
申请人： Kuo-Chang Su , Kuo-Hua Hsu , Chun-Hsin Liu , Yung-Chih Chen
发明人： Kuo-Chang Su , Kuo-Hua Hsu , Chun-Hsin Liu , Yung-Chih Chen
IPC分类号： G02F1/1343
CPC分类号： G02F1/136286 , G09G3/3614 , G09G3/3648 , G09G2300/0426 , G09G2300/0452 , G09G2320/0233 , G09G2330/021
摘要： An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively.
摘要翻译：有源器件阵列衬底包括衬底，第一扫描线，第二扫描线，数据线和像素。第一和第二扫描线沿着第一方向交替排列。数据线沿第二方向平行布置。像素被布置成形成沿第一方向交替布置的第一像素行和第二像素行。第一像素行包括分别电连接到第一扫描线，第二扫描线和数据线的第一和第二像素。第二像素行包括分别电连接到第一扫描线，第二扫描线和数据线的第三和第四像素。两个相邻数据线之间的像素排列成两列。在同一列中的像素中，奇数行和偶数行中的像素分别电连接到不同的数据线。

20. 发明申请

US20120169679A1 LIQUID CRYSTAL DISPLAY DEVICE 有权
标题翻译：液晶显示装置
公开(公告)号：US20120169679A1
公开(公告)日：2012-07-05
申请号：US13316572
申请日：2011-12-12
申请人： Chih-Ying Lin , Chun-Hsin Liu , Kuo-Chang Su , Yung-Chih Chen
发明人： Chih-Ying Lin , Chun-Hsin Liu , Kuo-Chang Su , Yung-Chih Chen
IPC分类号： G09G3/36 , G06F3/038
CPC分类号： G09G3/3688 , G02F1/13624
摘要： A liquid crystal display device includes a plurality of pixel driving circuits and a pixel array. Each pixel driving circuit of the plurality of pixel driving circuits includes four thin film transistors and has four output terminals, where each thin film transistor is used for driving an output terminal of the four output terminals, and the four output terminals are coupled to two gate lines and two sharing lines respectively for outputting two main output signals and two sharing output signals. The phases and timings of the two main output signals and the two sharing output signals are all the same. A pixel of the pixel array is charged/discharged to a specific voltage level according to a main output signal of the two main output signals, a sharing output signal, and a signal of a data line.
摘要翻译：液晶显示装置包括多个像素驱动电路和像素阵列。多个像素驱动电路的每个像素驱动电路包括四个薄膜晶体管，并且具有四个输出端子，其中每个薄膜晶体管用于驱动四个输出端子的输出端子，并且四个输出端子耦合到两个栅极线路和两条共用线路分别输出两路主输出信号和两路共享输出信号。两个主输出信号和两个共享输出信号的相位和时序都相同。像素阵列的像素根据两个主输出信号的主输出信号，共享输出信号和数据线的信号而被充/放电到特定电压电平。

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