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    • 1. 发明授权
    • Active device array substrate
    • 有源器件阵列衬底
    • US08502948B2
    • 2013-08-06
    • US12858433
    • 2010-08-17
    • Kuo-Chang SuKuo-Hua HsuChun-Hsin LiuYung-Chih Chen
    • Kuo-Chang SuKuo-Hua HsuChun-Hsin LiuYung-Chih Chen
    • G02F1/1343
    • G02F1/136286G09G3/3614G09G3/3648G09G2300/0426G09G2300/0452G09G2320/0233G09G2330/021
    • An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively.
    • 有源器件阵列衬底包括衬底,第一扫描线,第二扫描线,数据线和像素。 第一和第二扫描线沿着第一方向交替排列。 数据线沿第二方向平行布置。 像素被布置成形成沿第一方向交替布置的第一像素行和第二像素行。 第一像素行包括分别电连接到第一扫描线,第二扫描线和数据线的第一和第二像素。 第二像素行包括分别电连接到第一扫描线,第二扫描线和数据线的第三和第四像素。 两个相邻数据线之间的像素排列成两列。 在同一列中的像素中,奇数行和偶数行中的像素分别电连接到不同的数据线。
    • 2. 发明申请
    • SHIFT REGISTER CIRCUIT
    • 移位寄存器电路
    • US20110216877A1
    • 2011-09-08
    • US13110948
    • 2011-05-19
    • Kuo-Hua HsuChun-Hsin LiuYung-Chih ChenChih-Ying LinKuo-Chang SuYu-Chung Yang
    • Kuo-Hua HsuChun-Hsin LiuYung-Chih ChenChih-Ying LinKuo-Chang SuYu-Chung Yang
    • G11C19/00
    • G11C19/28G09G2310/0286
    • A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.
    • 具有波形整形功能的移位寄存器电路包括多个移位寄存器级。 每个移位寄存器级包括第一输入单元,上拉单元,下拉电路,第二输入单元,控制单元和波形整形单元。 第一输入单元用于响应于第一门信号输出第一驱动控制电压。 上拉单元响应于第一驱动控制电压拉起第二门信号。 下拉电路用于下拉第一驱动控制电压和第二栅极信号。 第二输入单元用于响应于第一门信号输出第二驱动控制电压。 控制单元响应于第二驱动控制电压和辅助信号提供控制信号。 波形整形单元响应于控制信号对第二门信号执行波形整形操作。
    • 3. 发明授权
    • Shift register circuit
    • 移位寄存器电路
    • US08331524B2
    • 2012-12-11
    • US13110948
    • 2011-05-19
    • Kuo-Hua HsuChun-Hsin LiuYung-Chih ChenChih-Ying LinKuo-Chang SuYu-Chung Yang
    • Kuo-Hua HsuChun-Hsin LiuYung-Chih ChenChih-Ying LinKuo-Chang SuYu-Chung Yang
    • G11C19/00
    • G11C19/28G09G2310/0286
    • A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.
    • 具有波形整形功能的移位寄存器电路包括多个移位寄存器级。 每个移位寄存器级包括第一输入单元,上拉单元,下拉电路,第二输入单元,控制单元和波形整形单元。 第一输入单元用于响应于第一门信号输出第一驱动控制电压。 上拉单元响应于第一驱动控制电压拉起第二门信号。 下拉电路用于下拉第一驱动控制电压和第二栅极信号。 第二输入单元用于响应于第一门信号输出第二驱动控制电压。 控制单元响应于第二驱动控制电压和辅助信号提供控制信号。 波形整形单元响应于控制信号对第二门信号执行波形整形操作。
    • 4. 发明申请
    • ACTIVE DEVICE ARRAY SUBSTRATE
    • 主动设备阵列基板
    • US20110285950A1
    • 2011-11-24
    • US12858433
    • 2010-08-17
    • Kuo-Chang SuKuo-Hua HsuChun-Hsin LiuYung-Chih Chen
    • Kuo-Chang SuKuo-Hua HsuChun-Hsin LiuYung-Chih Chen
    • G02F1/1343
    • G02F1/136286G09G3/3614G09G3/3648G09G2300/0426G09G2300/0452G09G2320/0233G09G2330/021
    • An active device array substrate includes a substrate, first scan lines, second scan lines, data lines, and pixels. The first and the second scan lines are alternately arranged along a first direction. The data lines are arranged in parallel along a second direction. The pixels are arranged to form first pixel rows and second pixel rows alternately arranged in the first direction. The first pixel row includes first and second pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The second pixel row includes third and fourth pixels electrically connected to the first scan lines, the second scan lines, and the data line, respectively. The pixels between two adjacent data lines are arranged in two columns. Among the pixels in the same column, the pixels in odd rows and in even rows are electrically connected to different data lines, respectively.
    • 有源器件阵列衬底包括衬底,第一扫描线,第二扫描线,数据线和像素。 第一和第二扫描线沿着第一方向交替布置。 数据线沿第二方向平行布置。 像素被布置成形成沿第一方向交替布置的第一像素行和第二像素行。 第一像素行包括分别电连接到第一扫描线,第二扫描线和数据线的第一和第二像素。 第二像素行包括分别电连接到第一扫描线,第二扫描线和数据线的第三和第四像素。 两个相邻数据线之间的像素排列成两列。 在同一列中的像素中,奇数行和偶数行中的像素分别电连接到不同的数据线。
    • 5. 发明申请
    • SHIFT REGISTER CIRCUIT
    • 移位寄存器电路
    • US20120140871A1
    • 2012-06-07
    • US13049863
    • 2011-03-16
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • G11C19/28G11C19/00
    • G09G3/20G09G3/3674G09G2310/0267G09G2310/0286G09G2310/08G09G2330/021G11C19/28
    • A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit, a pull-up unit, a pull-down unit, a control unit and an auxiliary pull-down unit. The input unit is put in use for outputting a driving control voltage according to at least one first input signal. The pull-up unit pulls up a corresponding gate signal according to the driving control voltage and a system clock. The pull-down unit pulls down the corresponding gate signal to a first power voltage according to a control signal. The control unit is utilized for generating the control signal according to the corresponding gate signal. The auxiliary pull-down unit pulls down the driving control voltage to a second power voltage according to a second input signal.
    • 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括输入单元,上拉单元,下拉单元,控制单元和辅助下拉单元。 输入单元被用于根据至少一个第一输入信号输出驱动控制电压。 上拉单元根据驱动控制电压和系统时钟提取相应的门信号。 下拉单元根据控制信号将相应的门信号拉低至第一电源电压。 控制单元用于根据相应的门信号产生控制信号。 辅助下拉单元根据第二输入信号将驱动控制电压下拉到第二电源电压。
    • 6. 发明授权
    • Shift register circuit
    • 移位寄存器电路
    • US08396183B2
    • 2013-03-12
    • US13049863
    • 2011-03-16
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • Yu-Chung YangYung-Chih ChenKuo-Hua HsuKuo-Chang Su
    • G11C19/00
    • G09G3/20G09G3/3674G09G2310/0267G09G2310/0286G09G2310/08G09G2330/021G11C19/28
    • A shift register circuit includes plural shift register stages for providing plural gate signals. Each shift register stage includes an input unit, a pull-up unit, a pull-down unit, a control unit and an auxiliary pull-down unit. The input unit is put in use for outputting a driving control voltage according to at least one first input signal. The pull-up unit pulls up a corresponding gate signal according to the driving control voltage and a system clock. The pull-down unit pulls down the corresponding gate signal to a first power voltage according to a control signal. The control unit is utilized for generating the control signal according to the corresponding gate signal. The auxiliary pull-down unit pulls down the driving control voltage to a second power voltage according to a second input signal.
    • 移位寄存器电路包括用于提供多个门信号的多个移位寄存器级。 每个移位寄存器级包括输入单元,上拉单元,下拉单元,控制单元和辅助下拉单元。 输入单元被用于根据至少一个第一输入信号输出驱动控制电压。 上拉单元根据驱动控制电压和系统时钟提取相应的门信号。 下拉单元根据控制信号将相应的门信号拉低至第一电源电压。 控制单元用于根据相应的门信号产生控制信号。 辅助下拉单元根据第二输入信号将驱动控制电压下拉到第二电源电压。
    • 10. 发明授权
    • Shift register and driving method thereof
    • 移位寄存器及其驱动方法
    • US09105347B2
    • 2015-08-11
    • US13270333
    • 2011-10-11
    • Kuo-Chang SuYung-Chih ChenKuo-Hua Hsu
    • Kuo-Chang SuYung-Chih ChenKuo-Hua Hsu
    • G11C19/28
    • G11C19/28G09G2310/0267G09G2310/0286G11C19/285
    • A shift register includes a signal input unit for receiving and providing an input signal, a signal output unit for controlling whether outputting a clock signal according to the input signal provided by the signal input unit, and a plurality of stable modules. Each of the stable modules is electrically coupled to an output terminal of the signal input unit, an output terminal of the signal output unit, and a default potential. Each of the stable modules receives a corresponding operation signal and is enabled in a duty of the corresponding operation signal, such that both the output terminal of the signal input unit and the output terminal of the signal output unit are electrically coupled to the default potential when the input signal is disabled. Before one of the stable modules is disabled, another of the stable modules has already been enabled.
    • 移位寄存器包括用于接收和提供输入信号的信号输入单元,用于根据由信号输入单元提供的输入信号来控制是否输出时钟信号的信号输出单元和多个稳定模块。 每个稳定模块电耦合到信号输入单元的输出端,信号输出单元的输出端和默认电位。 每个稳定模块接收对应的操作信号,并且在对应的操作信号的占空比中使能,使得信号输入单元的输出端和信号输出单元的输出端都电耦合到默认电位, 输入信号被禁止。 在禁用其中一个稳定模块之前,已经启用了另一个稳定模块。