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11. 发明授权

US5576376A Rubber composition containing a conjugated diene polymer 失效
标题翻译：含有共轭二烯聚合物的橡胶组合物
公开(公告)号：US5576376A
公开(公告)日：1996-11-19
申请号：US219284
申请日：1994-03-28
申请人： Tadashi Shibata , Ryota Fujio
发明人： Tadashi Shibata , Ryota Fujio
IPC分类号： C08C19/44 , C08F4/42 , C08F4/48 , C08F8/30 , C08F8/32 , C08F36/04 , C08K3/04 , C08L9/00 , C08L9/06 , C08L19/00 , C08F36/00 , C08F8/34
CPC分类号： C08L19/006 , C08C19/44 , C08F36/04 , C08F8/30 , C08L9/00 , C08K3/04 , C08K5/01 , C08L9/06
摘要： A rubber composition having good physical properties such as breaking properties, wear strength and grip properties, and good processability at the same time is suitable for a high performance tire. A nitrogen containing polymer with a weight average molecular weight of 70.times.10.sup.4 to 250.times.10.sup.4 is compounded with 60 to 200 phr of carbon black, a softener comprising 30 to 250 phr of a process oil and/or 5 to 100 phr of liquid polymer, and not more than 60 parts of another polymer.
摘要翻译：具有良好的物理性能如断裂性，磨损强度和抓地性能以及同时具有良好加工性能的橡胶组合物适用于高性能轮胎。将重均分子量为70×10 4至250×10 4的含氮聚合物与60至200phr的炭黑混合，软化剂包含30至250phr的工艺油和/或5至100phr的液体聚合物，而不是更多超过60份的另一种聚合物。

12. 发明授权

US5362672A Method of forming a monocrystalline film having a closed loop step portion on the substrate 失效
标题翻译：在基板上形成具有闭环台阶部分的单晶膜的方法
公开(公告)号：US5362672A
公开(公告)日：1994-11-08
申请号：US465175
申请日：1990-02-01
申请人： Tadahiro Ohmi , Tadashi Shibata , Masaru Umeda
发明人： Tadahiro Ohmi , Tadashi Shibata , Masaru Umeda
IPC分类号： C23C14/06 , H01L21/20 , H01L21/203 , H01L21/336 , H01L21/84
CPC分类号： H01L29/66772 , H01L21/0242 , H01L21/02422 , H01L21/02491 , H01L21/02532 , H01L21/02631 , H01L21/84 , Y10S148/158
摘要： A method of manufacturing a semiconductor device, and particularly a method of forming a monocrystalline film on a substrate. The method includes the step of forming a conductor layer having a step portion on the surface of a substrate. The step portion includes a lateral face which surrounds the lower surface of the step portion to form a closed loop. After the conductor layer has been formed on the surface of the substrate, a monocrystalline film is formed directly on the substrate. Specifically, the film is formed on the lower surface of the step portion, while a DC potential is applied to the conductor layer.
摘要翻译： PCT No.PCT / JP89 / 00599 Sec。 371日期1990年2月1日 102（e）1990年2月1日PCT PCT。1989年6月15日PCT公布。公开号WO89 / 12908 日期：1989年12月28日。一种制造半导体器件的方法，特别是在衬底上形成单晶膜的方法。该方法包括在衬底的表面上形成具有台阶部分的导体层的步骤。台阶部分包括侧面，该侧面围绕台阶部分的下表面以形成闭环。在衬底表面上形成导体层之后，直接在衬底上形成单晶膜。具体地，在台阶部的下表面上形成膜，同时对导体层施加DC电位。

13. 发明授权

US5258657A Neuron circuit 失效
标题翻译：神经元电路
公开(公告)号：US5258657A
公开(公告)日：1993-11-02
申请号：US777352
申请日：1992-01-06
申请人： Tadashi Shibata , Tadahiro Ohmi
发明人： Tadashi Shibata , Tadahiro Ohmi
IPC分类号： G06G7/60 , G06F15/18 , G06N3/063 , G06N99/00 , H01L21/8234 , H01L27/088 , H01L27/115 , H01L29/66 , H01L29/788 , H03K19/08 , H03K19/23
CPC分类号： G06N3/0635 , H01L27/115 , H01L29/7881 , H01L2924/0002
摘要： A semiconductor device of this invention comprises on a substrate a first semiconductor region of one conductive type, first source and drain regions of the opposite conductive type formed in said semiconductor region, a first gate electrode formed in a region separating said source and drain regions, the first gate electrode being electrically floating through an insulating film, and at least two second gate electrodes connected to said first gate electrode by capacitive coupling, wherein an inversion layer is formed under said first gate electrode and said first source and drain regions are electrically connected together only when a predetermined threshold value is exceeded by the absolute value of a value obtained by linearly summing up the weighted voltages applied to said second gate electrodes.

14. 发明授权

US4914050A Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US4914050A
公开(公告)日：1990-04-03
申请号：US362653
申请日：1989-06-07
申请人： Tadashi Shibata
发明人： Tadashi Shibata
IPC分类号： H01L23/522 , H01L21/28 , H01L21/3205 , H01L21/336 , H01L21/768 , H01L23/485 , H01L29/41 , H01L29/417
CPC分类号： H01L29/66636 , H01L21/768 , H01L23/485 , H01L29/41 , H01L29/41766 , H01L2924/0002
摘要： A concave portion having a V-shaped cross section is formed in a contact region of a p-type silicon substrate. The contact region is defined by a hole formed in an insulative layer formed over the substrate. An n-type diffusion layer is formed in the substrate so as to surround the concave portion. The n-type diffusion layer is connected to a drain region of a FET. A metal layer is formed on the insulative layer such that the metal layer is in electric contact with the diffusion layer through the increased surface area of the concave portion in the contact region.

15. 发明授权

US4860084A Semiconductor device MOSFET with V-shaped drain contact 失效
标题翻译：具有V形漏极接触的半导体器件MOSFET
公开(公告)号：US4860084A
公开(公告)日：1989-08-22
申请号：US293570
申请日：1989-01-03
申请人： Tadashi Shibata
发明人： Tadashi Shibata
IPC分类号： H01L23/522 , H01L21/28 , H01L21/3205 , H01L21/336 , H01L21/768 , H01L23/485 , H01L29/41 , H01L29/417
CPC分类号： H01L29/66636 , H01L21/768 , H01L23/485 , H01L29/41 , H01L29/41766 , H01L2924/0002
摘要： A concave portion having a V-shaped cross section is formed in a contact region of a p-type silicon substrate. The contact region is defined by a hole formed in an insulative layer formed over the substrate. An n-type diffusion layer is formed in the substrate so as to surround the concave portion. The n-type diffusion layer is connected to a drain region of a FET. A metal layer is formed on the insulative layer such that the metal layer is in electric contact with the diffusion layer through the increased surface area of the concave portion in the contact region.
摘要翻译：在p型硅衬底的接触区域中形成具有V形横截面的凹部。接触区域由形成在衬底上形成的绝缘层中的孔限定。在该基板上形成n型扩散层，以包围该凹部。 n型扩散层连接到FET的漏极区域。在绝缘层上形成金属层，使得金属层通过接触区域中的凹部的增加的表面积与扩散层电接触。

16. 发明授权

US4140547A Method for manufacturing MOSFET devices by ion-implantation 失效
标题翻译：通过离子注入制造MOSFET器件的方法
公开(公告)号：US4140547A
公开(公告)日：1979-02-20
申请号：US831393
申请日：1977-09-08
申请人： Tadashi Shibata , Nozomu Harada
发明人： Tadashi Shibata , Nozomu Harada
IPC分类号： H01L21/265 , H01L21/266 , H01L29/06 , H01L29/78
CPC分类号： H01L29/0638 , H01L21/2652 , H01L21/266 , Y10S438/975
摘要： A method for manufacturing an MOS FET includes a step of forming a p.sup.+ -type layer in a p-type substrate by injecting ions into the substrate through a field oxide film using a mask layer and removing the portion of the field oxide film under the mask layer.
摘要翻译：一种用于制造MOS FET的方法包括通过使用掩模层通过场氧化膜将离子注入衬底而在p型衬底中形成p +型层并除去掩模下的场氧化物膜的部分的步骤层。

17. 发明授权

US4113064A Elevator car mounting 失效
标题翻译：电梯汽车安装
公开(公告)号：US4113064A
公开(公告)日：1978-09-12
申请号：US420050
申请日：1973-11-29
申请人： Masayuki Shigeta , Tadashi Shibata
发明人： Masayuki Shigeta , Tadashi Shibata
IPC分类号： B66B7/08 , B66B1/34 , B66B11/02
CPC分类号： B66B1/3484 , B66B1/34 , B66B11/0273
摘要： An elevator car mounting arrangement for an elevator of the type comprising a car for carrying passengers or freight mounted in a framework hung by a wire rope and guided in its ascent and descent along guide rails fixed to a shaft. The car is arranged such that it can oscillate freely in a horizontal direction whereby the transversal vibration of the car can be prevented.

18. 发明授权

US06949478B2 Oxide film forming method 失效
标题翻译：氧化膜成型方法
公开(公告)号：US06949478B2
公开(公告)日：2005-09-27
申请号：US10120628
申请日：2002-04-11
申请人： Tadahiro Ohmi , Takashi Imaoka , Hisayuki Shimada , Nobuhiro Konishi , Mizuho Morita , Takeo Yamashita , Tadashi Shibata , Hidetoshi Wakamatsu , Jinzo Watanabe , Shintaro Aoyama , Masakazu Nakamura
发明人： Tadahiro Ohmi , Takashi Imaoka , Hisayuki Shimada , Nobuhiro Konishi , Mizuho Morita , Takeo Yamashita , Tadashi Shibata , Hidetoshi Wakamatsu , Jinzo Watanabe , Shintaro Aoyama , Masakazu Nakamura
IPC分类号： B01J19/08 , C23C8/10 , C23C8/36 , C23C14/02 , C23C14/48 , C23C16/02 , C23C16/44 , C30B23/02 , C30B25/02 , G01N23/00 , H01L21/66 , H01L21/31
CPC分类号： C30B23/02 , C23C8/10 , C23C8/36 , C23C14/022 , C23C14/48 , C23C16/02 , C23C16/4401 , C30B25/02 , C30B29/16 , Y10S438/903
摘要： A method of forming an oxide film having high insularity capability is performed within an ultra clean environment, using charged particles.
摘要翻译：使用带电粒子在超清洁环境下进行形成具有高绝缘性的氧化膜的方法。

19. 发明申请

US20050031312A1 Method and apparatus for signal reproduction 审中-公开
标题翻译：用于信号再现的方法和装置
公开(公告)号：US20050031312A1
公开(公告)日：2005-02-10
申请号：US10895377
申请日：2004-07-21
申请人： Tomoko Matsui , Ryouji Yamaguchi , Tadashi Shibata
发明人： Tomoko Matsui , Ryouji Yamaguchi , Tadashi Shibata
IPC分类号： G11B20/10 , H04N5/781 , H04N5/85 , H04N5/907 , H04N9/804 , H04N9/806 , H04N5/76
CPC分类号： H04N9/8063 , G11B20/10 , G11B2020/1062 , G11B2020/10694 , G11B2020/10814 , H04N5/781 , H04N5/85 , H04N5/907 , H04N9/8042 , H04N9/8047
摘要： This invention provides a method and apparatus for signal reproduction that can simultaneously reproduce N (N≧2) signals which are previously multiplexed, and simultaneously reproduce N independent signals. This apparatus selectively inputs the independent N coded signals in time division, adds the corresponding stream information to the selected input signal among N kinds of stream information for identifying the input signals, detects the stream information from the respective input signal, decodes the respective input signal by a decoding method corresponding to the respective input signal, which is decided based on the detected stream information, and outputs the decoded signal.
摘要翻译：本发明提供一种用于信号再现的方法和装置，其可以同时再现先前多路复用的N（N> = 2）个信号，同时再现N个独立信号。该装置以时分方式选择性地输入独立的N个编码信号，将N个用于识别输入信号的流信息中的所选输入信号相加的流信息相加，从相应的输入信号检测流信息，解码各输入信号通过与基于检测到的流信息决定的各个输入信号对应的解码方式，输出解码信号。

20. 发明授权

US06606119B1 Semiconductor arithmetic circuit 失效
标题翻译：半导体运算电路
公开(公告)号：US06606119B1
公开(公告)日：2003-08-12
申请号：US09039126
申请日：1998-03-13
申请人： Tadashi Shibata , Tadahiro Ohmi
发明人： Tadashi Shibata , Tadahiro Ohmi
IPC分类号： H04N5208
CPC分类号： H04N5/357 , H04N5/142
摘要： The present invention has as an object thereof to provide a semiconductor arithmetic circuit which is capable of conducting edge accentuation processing, edge detection processing, and noise removal by means of averaging processing of an image, using extremely simple circuitry. A semiconductor arithmetic circuit is provided with an amplifier circuit in which an input terminal is connected to the gate electrode of at least one MOS type transistor, a first signal input terminal, which is connected with the input terminal via a first switching element, and a plurality of second signal input terminals, which are connected with the input terminal via a capacity element; wherein a mechanism is provided for opening the first switching element in a state in which a first signal voltage is applied to the input terminal and a predetermined second input signal voltage group is applied to the second signal input terminals, and for thereafter applying a predetermined third input signal voltage group to the second signal input terminals, and wherein the amplifier circuit comprises a source follower circuit or a voltage follower circuit.
摘要翻译：本发明的目的是提供一种半导体运算电路，其能够通过使用非常简单的电路的图像的平均处理来进行边缘突出处理，边缘检测处理和噪声去除。半导体运算电路设置有放大电路，其中输入端连接到至少一个MOS型晶体管的栅电极，经由第一开关元件与输入端连接的第一信号输入端和多个第二信号输入端，经由电容元件与输入端连接; 其特征在于，提供一种机构，用于在将第一信号电压施加到输入端子并且将预定的第二输入信号电压组施加到第二信号输入端子的状态下打开第一开关元件，然后施加预定的第三输入信号电压组到第二信号输入端，并且其中放大器电路包括源极跟随器电路或电压跟随器电路。

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