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11. 发明申请

US20050093100A1 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates 有权
标题翻译：用于制造绝缘体上硅（SGOI）和绝缘体上（GeI）绝缘体（GOI）基板的方法
公开(公告)号：US20050093100A1
公开(公告)日：2005-05-05
申请号：US10700085
申请日：2003-11-03
申请人： Tze-chiang Chen , Guy Cohen , Alexander Reznicek , Devendra Sadana , Ghavam Shahidi
发明人： Tze-chiang Chen , Guy Cohen , Alexander Reznicek , Devendra Sadana , Ghavam Shahidi
IPC分类号： H01L21/762 , H01L27/12 , H01L27/144 , H01L31/0232 , H01L31/028 , H01L31/0352 , H01L31/105 , H01L31/18 , H01L31/117
CPC分类号： H01L21/76254 , H01L31/02327 , H01L31/028 , H01L31/1812 , Y02E10/547
摘要： A method for fabricating germanium-on-insulator (GOI) substrate materials, the GOI substrate materials produced by the method and various structures that can include at least the GOI substrate materials of the present invention are provided. The GOI substrate material include at least a substrate, a buried insulator layer located atop the substrate, and a Ge-containing layer, preferably pure Ge, located atop the buried insulator layer. In the GOI substrate materials of the present invention, the Ge-containing layer may also be referred to as the GOI film. The GOI film is the layer of the inventive substrate material in which devices can be formed.
摘要翻译：提供了绝缘体上（锗）绝缘体（GOI）衬底材料的方法，通过该方法生产的GOI衬底材料和至少可以包括本发明的GOI衬底材料的各种结构。 GOI衬底材料至少包括衬底，位于衬底顶部的掩埋绝缘体层，以及位于掩埋绝缘体层顶部的优选纯Ge的Ge含有层。在本发明的GOI基板材料中，Ge含有层也可以称为GOI膜。 GOI膜是可以形成器件的本发明的基底材料的层。

12. 发明授权

US06955926B2 Method of fabricating data tracks for use in a magnetic shift register memory device 失效
标题翻译：制造用于磁移位寄存器存储器件的数据轨道的方法
公开(公告)号：US06955926B2
公开(公告)日：2005-10-18
申请号：US10788190
申请日：2004-02-25
申请人： Tze-chiang Chen , Stuart S. P. Parkin
发明人： Tze-chiang Chen , Stuart S. P. Parkin
IPC分类号： G11C11/15 , G11C19/02 , G11C19/08 , H01L21/00
CPC分类号： G11C19/02 , G11C19/0841
摘要： A magnetic data track used in a magnetic shift register memory system may be fabricated by forming a multilayered stack of alternating dielectric and/or silicon layers. Vias of approximately 10 microns tall with a cross-section on the order of 100 nm×100 nm are etched in this multilayered stack of alternating layers. Vias may be etched form smooth or notched walls. Vias are filled by electroplating layers of alternating types of ferromagnetic or ferrimagnetic metals. The alternating ferromagnetic or ferrimagnetic layers are comprised of magnetic materials with different magnetization or magnetic exchange or magnetic anisotropies. These different magnetic characteristics allow the pinning of magnetic domain walls at the boundaries between these layers. Alternatively, vias are filled with a homogeneous ferromagnetic material. Magnetic domain walls are formed by the discontinuity in the ferromagnetic or ferromagnetic material that occurs at the notches or at the protuberances along the via walls.
摘要翻译：用于磁移位寄存器存储器系统的磁数据磁道可以通过形成交替的电介质层和/或硅层的多层叠层来制造。在该多层交替层中蚀刻约10微米高的具有100nm×100nm量级的横截面的通孔。通孔可能被蚀刻形成平滑或缺口的墙壁。通孔由交替类型的铁磁或亚铁磁性金属的电镀层填充。交替的铁磁或亚铁磁层由具有不同磁化或磁交换或磁各向异性的磁性材料组成。这些不同的磁特性允许磁畴壁在这些层之间的边界处的钉扎。或者，通孔用均匀的铁磁材料填充。磁畴壁由铁氧体或铁磁材料中的不连续部分形成，这些不规则发生在沿着通孔壁的凹口或凸起处。

13. 发明申请

US20080242070A1 INTEGRATION SCHEMES FOR FABRICATING POLYSILICON GATE MOSFET AND HIGH-K DIELECTRIC METAL GATE MOSFET 有权
标题翻译：用于制造多晶硅栅极MOSFET和高K介电金属栅极MOSFET的集成方案
公开(公告)号：US20080242070A1
公开(公告)日：2008-10-02
申请号：US11694104
申请日：2007-03-30
申请人： Tze-chiang Chen , Bruce B. Doris , Rangarajan Jagannathan , Hongwen Yan , Qingyun Yang , Ying Zhang
发明人： Tze-chiang Chen , Bruce B. Doris , Rangarajan Jagannathan , Hongwen Yan , Qingyun Yang , Ying Zhang
IPC分类号： H01L21/3205
CPC分类号： H01L29/4966 , H01L21/28194 , H01L21/82345 , H01L21/823462 , H01L21/823842 , H01L21/823857 , H01L29/517
摘要： Multiple integration schemes for manufacturing dual gate semiconductor structures are disclosed. By employing the novel integration schemes, polysilicon gate MOSFETs and high-k dielectric metal gate MOSFETs are formed on the same semiconductor substrate despite differences in the composition of the gate stack and resulting differences in the etch rates. A thin polysilicon layer is used for one type of gate electrodes and a silicon-containing layer are used for the other type of gate electrodes in these integration schemes to balance the different etch rates and to enable etching of the two different gate stacks.
摘要翻译：公开了用于制造双栅极半导体结构的多重集成方案。通过采用新颖的集成方案，尽管栅极堆叠的组成差异以及蚀刻速率的差异，但是在同一半导体衬底上形成多晶硅栅极MOSFET和高k介质金属栅极MOSFET。对于一种类型的栅电极使用薄多晶硅层，并且在这些集成方案中使用含硅层用于其他类型的栅电极，以平衡不同的蚀刻速率并且能够蚀刻两个不同的栅极堆叠。

14. 发明申请

US20070087454A1 Method of fabricating a magnetic shift register 有权
标题翻译：制造磁移位寄存器的方法
公开(公告)号：US20070087454A1
公开(公告)日：2007-04-19
申请号：US11252384
申请日：2005-10-17
申请人： Tze-chiang Chen , Stuart Parkin
发明人： Tze-chiang Chen , Stuart Parkin
IPC分类号： H01L21/00 , H01L51/40 , H01L21/82 , H01L21/326
CPC分类号： H01L29/82 , G11C11/14 , G11C19/02 , G11C19/0808 , G11C19/0841
摘要： A magnetic data track used in a magnetic shift register memory system may be fabricated by forming a multilayered stack of alternating dielectric and/ or silicon layers. A trench is etched in the multi-layer stack structure. A selective etching process is used to corrugate the walls of trench. A seed layer is applied to the walls and bottom of the trench; the seed layer is covered with a magnetic layer. The trench is filled with an insulating material. A patterned layer is applied and portions of insulating material exposed by the pattern are removed, forming holes. Magnetic material and seed layer exposed in holes is selectively removed. The holes are filled with insulating material and connecting leads are attached to data tracks.
摘要翻译：用于磁移位寄存器存储器系统的磁数据磁道可以通过形成交替的电介质层和/或硅层的多层叠层来制造。在多层堆叠结构中蚀刻沟槽。使用选择性蚀刻工艺来使沟槽的壁波纹化。种子层施加到沟槽的壁和底部; 种子层被磁性层覆盖。沟槽填充绝缘材料。施加图案层，去除由图案露出的部分绝缘材料，形成孔。选择性地除去暴露在孔中的磁性材料和种子层。孔中填充绝缘材料，连接引线连接到数据轨道。

15. 发明申请

US20050186686A1 METHOD OF FABRICATING DATA TRACKS FOR USE IN A MAGNETIC SHIFT REGISTER MEMORY DEVICE 失效
标题翻译：用于在磁移位置存储器件中使用的数据轨迹的方法
公开(公告)号：US20050186686A1
公开(公告)日：2005-08-25
申请号：US10788190
申请日：2004-02-25
申请人： Tze-chiang Chen , Stuart Parkin
发明人： Tze-chiang Chen , Stuart Parkin
IPC分类号： G11C11/15 , G11C19/02 , G11C19/08 , H01L21/00
CPC分类号： G11C19/02 , G11C19/0841
摘要： A magnetic data track used in a magnetic shift register memory system may be fabricated by forming a multilayered stack of alternating dielectric and/or silicon layers. Vias of approximately 10 microns tall with a cross-section on the order of 100 nm×100 nm are etched in this multilayered stack of alternating layers. Vias may be etched form smooth or notched walls. Vias are filled by electroplating layers of alternating types of ferromagnetic or ferrimagnetic metals. The alternating ferromagnetic or ferrimagnetic layers are comprised of magnetic materials with different magnetization or magnetic exchange or magnetic anisotropies. These different magnetic characteristics allow the pinning of magnetic domain walls at the boundaries between these layers. Alternatively, vias are filled with a homogeneous ferromagnetic material. Magnetic domain walls are formed by the discontinuity in the ferromagnetic or ferromagnetic material that occurs at the notches or at the protuberances along the via walls.
摘要翻译：用于磁移位寄存器存储器系统的磁数据磁道可以通过形成交替的电介质层和/或硅层的多层叠层来制造。在该多层交替层中蚀刻约10微米高的具有100nm×100nm量级的横截面的通孔。通孔可能被蚀刻形成平滑或缺口的墙壁。通孔由交替类型的铁磁或亚铁磁性金属的电镀层填充。交替的铁磁或亚铁磁层由具有不同磁化或磁交换或磁各向异性的磁性材料组成。这些不同的磁特性允许磁畴壁在这些层之间的边界处的钉扎。或者，通孔用均匀的铁磁材料填充。磁畴壁由铁氧体或铁磁材料中的不连续部分形成，这些不规则发生在沿着通孔壁的凹口或凸起处。

16. 发明授权

US07598097B2 Method of fabricating a magnetic shift register 有权
标题翻译：制造磁移位寄存器的方法
公开(公告)号：US07598097B2
公开(公告)日：2009-10-06
申请号：US12114636
申请日：2008-05-02
申请人： Tze-chiang Chen , Stuart S. P. Parkin
发明人： Tze-chiang Chen , Stuart S. P. Parkin
IPC分类号： H01L21/00
CPC分类号： H01L29/82 , G11C11/14 , G11C19/02 , G11C19/0808 , G11C19/0841
摘要： A magnetic data track used in a magnetic shift register memory system may be fabricated by forming a multilayered stack of alternating dielectric and/or silicon layers. A trench is etched in the multi-layer stack structure. A selective etching process is used to corrugate the walls of trench. A seed layer is applied to the walls and bottom of the trench; the seed layer is covered with a magnetic layer. The trench is filled with an insulating material. A patterned layer is applied and portions of insulating material exposed by the pattern are removed, forming holes. Magnetic material and seed layer exposed in holes is selectively removed. The holes are filled with insulating material and connecting leads are attached to data tracks.
摘要翻译：用于磁移位寄存器存储器系统的磁数据磁道可以通过形成交替的电介质层和/或硅层的多层叠层来制造。在多层堆叠结构中蚀刻沟槽。使用选择性蚀刻工艺来使沟槽的壁波纹化。种子层施加到沟槽的壁和底部; 种子层被磁性层覆盖。沟槽填充绝缘材料。施加图案层，去除由图案露出的部分绝缘材料，形成孔。选择性地除去暴露在孔中的磁性材料和种子层。孔中填充绝缘材料，连接引线连接到数据轨道。

17. 发明授权

US07435652B1 Integration schemes for fabricating polysilicon gate MOSFET and high-K dielectric metal gate MOSFET 有权
标题翻译：用于制造多晶硅栅极MOSFET和高K介质金属栅极MOSFET的集成方案
公开(公告)号：US07435652B1
公开(公告)日：2008-10-14
申请号：US11694104
申请日：2007-03-30
申请人： Tze-chiang Chen , Bruce B. Doris , Rangarajan Jagannathan , Hongwen Yan , Qingyun Yang , Ying Zhang
发明人： Tze-chiang Chen , Bruce B. Doris , Rangarajan Jagannathan , Hongwen Yan , Qingyun Yang , Ying Zhang
IPC分类号： H01L21/336
CPC分类号： H01L29/4966 , H01L21/28194 , H01L21/82345 , H01L21/823462 , H01L21/823842 , H01L21/823857 , H01L29/517
摘要： Multiple integration schemes for manufacturing dual gate semiconductor structures are disclosed. By employing the novel integration schemes, polysilicon gate MOSFETs and high-k dielectric metal gate MOSFETs are formed on the same semiconductor substrate despite differences in the composition of the gate stack and resulting differences in the etch rates. A thin polysilicon layer is used for one type of gate electrodes and a silicon-containing layer are used for the other type of gate electrodes in these integration schemes to balance the different etch rates and to enable etching of the two different gate stacks.
摘要翻译：公开了用于制造双栅极半导体结构的多重集成方案。通过采用新颖的集成方案，尽管栅极堆叠的组成差异以及蚀刻速率的差异，但是在同一半导体衬底上形成多晶硅栅极MOSFET和高k介质金属栅极MOSFET。对于一种类型的栅电极使用薄多晶硅层，并且在这些集成方案中使用含硅层用于其他类型的栅电极，以平衡不同的蚀刻速率并且能够蚀刻两个不同的栅极堆叠。

18. 发明授权

US07416905B2 Method of fabricating a magnetic shift register 有权
标题翻译：制造磁移位寄存器的方法
公开(公告)号：US07416905B2
公开(公告)日：2008-08-26
申请号：US11252384
申请日：2005-10-17
申请人： Tze-chiang Chen , Stuart S. P. Parkin
发明人： Tze-chiang Chen , Stuart S. P. Parkin
IPC分类号： H01L21/00
CPC分类号： H01L29/82 , G11C11/14 , G11C19/02 , G11C19/0808 , G11C19/0841
摘要： A magnetic data track used in a magnetic shift register memory system may be fabricated by forming a multilayered stack of alternating dielectric and/or silicon layers. A trench is etched in the multi-layer stack structure. A selective etching process is used to corrugate the walls of trench. A seed layer is applied to the walls and bottom of the trench; the seed layer is covered with a magnetic layer. The trench is filled with an insulating material. A patterned layer is applied and portions of insulating material exposed by the pattern are removed, forming holes. Magnetic material and seed layer exposed in holes is selectively removed. The holes are filled with insulating material and connecting leads are attached to data tracks.
摘要翻译：用于磁移位寄存器存储器系统的磁数据磁道可以通过形成交替的电介质层和/或硅层的多层叠层来制造。在多层堆叠结构中蚀刻沟槽。使用选择性蚀刻工艺来使沟槽的壁波纹化。种子层施加到沟槽的壁和底部; 种子层被磁性层覆盖。沟槽填充绝缘材料。施加图案层，去除由图案露出的部分绝缘材料，形成孔。选择性地除去暴露在孔中的磁性材料和种子层。孔中填充绝缘材料，连接引线连接到数据轨道。

19. 发明申请

US20080241369A1 METHOD OF FABRICATING A MAGNETIC SHIFT REGISTER 有权
标题翻译：制造磁性移位寄存器的方法
公开(公告)号：US20080241369A1
公开(公告)日：2008-10-02
申请号：US12114636
申请日：2008-05-02
申请人： Tze-chiang Chen , Stuart S.P. Parkin
发明人： Tze-chiang Chen , Stuart S.P. Parkin
IPC分类号： B05D5/12
CPC分类号： H01L29/82 , G11C11/14 , G11C19/02 , G11C19/0808 , G11C19/0841
摘要： A magnetic data track used in a magnetic shift register memory system may be fabricated by forming a multilayered stack of alternating dielectric and/or silicon layers. A trench is etched in the multi-layer stack structure. A selective etching process is used to corrugate the walls of trench. A seed layer is applied to the walls and bottom of the trench; the seed layer is covered with a magnetic layer. The trench is filled with an insulating material. A patterned layer is applied and portions of insulating material exposed by the pattern are removed, forming holes. Magnetic material and seed layer exposed in holes is selectively removed. The holes are filled with insulating material and connecting leads are attached to data tracks.
摘要翻译：用于磁移位寄存器存储器系统的磁数据磁道可以通过形成交替的电介质层和/或硅层的多层叠层来制造。在多层堆叠结构中蚀刻沟槽。使用选择性蚀刻工艺来使沟槽的壁波纹化。种子层施加到沟槽的壁和底部; 种子层被磁性层覆盖。沟槽填充绝缘材料。施加图案层，去除由图案露出的部分绝缘材料，形成孔。选择性地除去暴露在孔中的磁性材料和种子层。孔中填充绝缘材料，连接引线连接到数据轨道。

20. 发明授权

US07108797B2 Method of fabricating a shiftable magnetic shift register 有权
标题翻译：制造可移动磁移位寄存器的方法
公开(公告)号：US07108797B2
公开(公告)日：2006-09-19
申请号：US10787738
申请日：2004-02-25
申请人： Tze-chiang Chen , Stuart S. P. Parkin
发明人： Tze-chiang Chen , Stuart S. P. Parkin
IPC分类号： G11B5/127 , B44C1/22 , H01L21/00
CPC分类号： G11C11/14 , G11C19/02 , G11C19/0808 , G11C19/0841 , H01F10/14 , H01F10/265 , H01F41/26 , Y10T29/49021 , Y10T29/49043 , Y10T29/49052
摘要： A magnetic data track used in a magnetic shift register memory system may be fabricated by forming a multilayered stack of alternating dielectric and/or silicon layers. Vias of approximately 10 microns tall with a cross-section on the order of 100 nm×100 nm are etched in this multilayered stack of alternating layers. Vias may be etched form smooth or notched walls. Vias are filled by electroplating layers of alternating types of ferromagnetic or ferrimagnetic metals. The alternating ferromagnetic or ferrimagnetic layers are comprised of magnetic materials with different magnetization or magnetic exchange or magnetic anisotropies. These different magnetic characteristics allow the pinning of magnetic domain walls at the boundaries between these layers. Alternatively, vias are filled with a homogeneous ferromagnetic material. Magnetic domain walls are formed by the discontinuity in the ferromagnetic or ferromagnetic material that occurs at the notches or at the protuberances along the via walls.
摘要翻译：用于磁移位寄存器存储器系统的磁数据磁道可以通过形成交替的电介质层和/或硅层的多层叠层来制造。在该多层交替层中蚀刻约10微米高的具有100nm×100nm量级的横截面的通孔。通孔可能被蚀刻形成平滑或缺口的墙壁。通孔由交替类型的铁磁或亚铁磁性金属的电镀层填充。交替的铁磁或亚铁磁层由具有不同磁化或磁交换或磁各向异性的磁性材料组成。这些不同的磁特性允许磁畴壁在这些层之间的边界处的钉扎。或者，通孔用均匀的铁磁材料填充。磁畴壁由铁氧体或铁磁材料中的不连续部分形成，这些不规则发生在沿着通孔壁的凹口或凸起处。

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