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    • 15. 发明授权
    • Charged-particle detecting apparatus
    • 带电粒子检测装置
    • US07655891B2
    • 2010-02-02
    • US11723951
    • 2007-03-22
    • Akio SuzukiMasahiro HayashiKatsutoshi NonakaYuuya Washiyama
    • Akio SuzukiMasahiro HayashiKatsutoshi NonakaYuuya Washiyama
    • H01J49/06G01T1/28G01T1/29H01J43/24
    • H01J49/025
    • The present invention relates to a charged-particle detecting apparatus having a structure which enables adjustment of a potential distribution so as to stably maintain flight loci of charged particles without depending on a change in a voltage-applied state. The charged-particle detecting apparatus comprises a first electrode, an MCP, a second electrode, a third electrode that functions as an anode, and a rear cover arranged in order along a predetermined reference axis. The third electrode is arranged on the opposite side of the MCP with respect to the second electrode, and is electrically connected to an output signal part via a capacitor. In particular, the first electrode is arranged so as to become a part of the outer surface of the charged-particle detecting apparatus, and components positioned between the first electrode and the rear cover have contours with section sizes equal to or smaller than that of the contour of the first electrode when viewed from the first electrode side toward the rear cover.
    • 本发明涉及具有能够调整电位分布的结构的带电粒子检测装置,以便不依赖于施加电压的状态的变化来稳定地保持带电粒子的飞行轨迹。 带电粒子检测装置包括第一电极,MCP,第二电极,用作阳极的第三电极和沿着预定参考轴依次排列的后盖。 第三电极相对于第二电极布置在MCP的相对侧上,并且经由电容器电连接到输出信号部分。 特别地,第一电极被布置成成为带电粒子检测装置的外表面的一部分,并且位于第一电极和后盖之间的部件具有等于或小于 当从第一电极侧朝向后盖观察时,第一电极的轮廓。
    • 16. 发明授权
    • Radioactive ray detector
    • 放射线检测器
    • US07507971B2
    • 2009-03-24
    • US10552705
    • 2004-04-09
    • Katsumi ShibayamaYutaka KusuyamaMasahiro Hayashi
    • Katsumi ShibayamaYutaka KusuyamaMasahiro Hayashi
    • G01T1/26
    • H01L27/14661G01T1/2018H01L27/14634H01L31/02322
    • A wiring substrate section 2 is provided between a radiation detecting section 1, which is formed of a scintillator 10 and a PD array 15, and signal processing elements 30 and 32 for processing a detected signal outputted from the PD array 15, and the wiring substrate section 2 has a wiring substrate 20 which is formed of a glass material having a radiation shielding function and in which a conductive member 21 serving as a conduction path for guiding the detected signal therethrough is provided in a through hole 20c. Relative to the through hole 20c of the wiring substrate 20, the signal processing elements 30 and 32 of the signal processing section 3, located downstream of the wiring substrate 20, are each disposed in an area excluding those areas on the extension of the through holes 20c, and this allows the signal processing elements 30 and 32 not to be seen through the through holes 20c. This arrangement realizes a radiation detector which suppresses radiation made incident on the signal processing means located downstream of the wiring substrate.
    • 布线基板部分2设置在由闪烁体10和PD阵列15形成的辐射检测部分1和用于处理从PD阵列15输出的检测信号的信号处理元件30和32之间,以及布线基板 部分2具有布线基板20,该布线基板20由具有辐射屏蔽功能的玻璃材料形成,并且其中用作导引检测信号的导电路径的导电部件21设置在通孔20c中。 相对于布线基板20的通孔20c,位于布线基板20下游的信号处理部3的信号处理部30,32分别配置在除了贯通孔的延伸部的那些区域以外的区域 20c,并且这允许信号处理元件30和32不通过通孔20c被看到。 这种布置实现了辐射检测器,其抑制入射到位于布线基板下游的信号处理装置的辐射。
    • 19. 发明申请
    • Method for manufacturing a semiconductor element
    • US20060286733A1
    • 2006-12-21
    • US11453638
    • 2006-06-14
    • Masahiro HayashiTakahisa AkibaAkihiro Shiraishi
    • Masahiro HayashiTakahisa AkibaAkihiro Shiraishi
    • H01L21/8234
    • H01L21/823814H01L21/823807H01L21/823857
    • A method for manufacturing a semiconductor element, comprises: (1) forming a first insulating layer for electric field relaxation that is thicker than a first gate insulating layer in a first channel region of a transistor of a first conductive type that is one of P-type and N-type polarity formed on a semiconductor silicon wafer to surround an edge of a first gate electrode in order to reduce an electric field concentrated to a region surrounding the edge of the first gate electrode because of a voltage applied to the first gate electrode and a first drain region of the transistor of the first conductive type, and forming a second insulating layer for electric field relaxation that is thicker than a second gate insulating layer in a second channel region of a transistor of a second conductive type to surround the edge of the first gate electrode in order to reduce an electric field concentrated to a region surrounding an edge of a second gate electrode because of a voltage applied to the second gate electrode and a second drain region of the transistor of the second conductive type; (2) forming a first photoresist layer in an uppermost section of the wafer; (3) forming a first resist pattern by performing first photolithography to remove the photoresist layer in a region where ion implantation of an impurity of the first conductive type is to be performed for forming a first region for electric field relaxation so as to surround the drain region of the transistor of the first conductive type and the first insulating layer for electric field relaxation; (4) removing the first resist pattern after the ion implantation of the impurity of the first conductive type by employing the first resist pattern as a mask; (5) performing first heat treatment to diffuse the impurity of the first conductive type; (6) forming a second photoresist layer in an uppermost section of the wafer; (7) forming a second resist pattern by performing second photolithography to remove the second photoresist layer in a region where ion implantation of an impurity of the second conductive type is to be performed for forming a second region for electric field relaxation so as to surround the drain region of the transistor of the second conductive type and the second insulating layer for electric field relaxation; (8) removing the second resist pattern after the ion implantation of the impurity of the second conductive type by employing the second resist pattern as a mask; and (9) performing second heat treatment to form the first region for electric field relaxation and the second region for electric field relaxation. The first region for electric field relaxation is provided by the first heat treatment to diffuse the impurity of the first conductive type in (5) and the second heat treatment in (9).