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11. 发明授权

US06744132B2 Module with adhesively attached heat sink 有权
标题翻译：模块带有粘附连接的散热器
公开(公告)号：US06744132B2
公开(公告)日：2004-06-01
申请号：US10058999
申请日：2002-01-29
申请人： David J. Alcoe , Thomas W. Dalrymple , Michael A. Gaynes , Randall J. Stutzman
发明人： David J. Alcoe , Thomas W. Dalrymple , Michael A. Gaynes , Randall J. Stutzman
IPC分类号： H01L2348
CPC分类号： H01L23/16 , H01L23/10 , H01L2224/16 , H01L2224/73253 , H01L2924/01012 , H01L2924/01019 , H01L2924/16195
摘要： A method and structure to adhesively couple a cover plate to a semiconductor device. A semiconductor device is electrically coupled to a substrate. A stiffener ring surrounding the semiconductor device is adhesively coupled to the substrate. A cover plate is adhesively coupled to both a top surface of the semiconductor device and a top surface of the stiffener ring using a first and second adhesive, respectively. The modulus of the first adhesive is less than the modulus of the second adhesive.
摘要翻译：一种用于将盖板粘合地耦合到半导体器件的方法和结构。半导体器件电耦合到衬底。围绕半导体器件的加强环粘合地耦合到衬底。分别使用第一和第二粘合剂将覆盖板粘合地耦合到半导体器件的顶表面和加强环的顶表面。第一粘合剂的模量小于第二粘合剂的模量。

12. 发明授权

US06576996B2 Method for bonding heat sinks to overmolds and device formed thereby 有权
公开(公告)号：US06576996B2
公开(公告)日：2003-06-10
申请号：US09757159
申请日：2001-01-09
申请人： Frank D. Egitto , Michael A. Gaynes , Ramesh R. Kodnani , Luis J. Matienzo , Mark V. Pierson
发明人： Frank D. Egitto , Michael A. Gaynes , Ramesh R. Kodnani , Luis J. Matienzo , Mark V. Pierson
IPC分类号： H01L2334
CPC分类号： B29C59/14 , H01L21/56 , H01L24/73 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2924/15311 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： A method for bonding heat sinks to packaged electronic components comprises the steps of: (a) exposing to a plasma a surface of a molded polymer formed on a substrate; (b) allowing the plasma to at least partially convert silicon-containing residue on the surface to silica; and (c) bonding an article to the surface by applying an adherent between the article and the surface. Often, the silicon-containing residue is silicone oil, a mold release compound, which may prevent the formation of a bond when using conventional bonding methods and materials. The silica layer formed on the surface of the molded polymer assists in formation of a proper bond. The plasma may be an oxygen plasma and the adherent may be selected from either a heat cured silicone-based paste adhesive with a metal oxide filler or a heat cured porous polymer film impregnated with adhesive. In particular, the film may be polytetrafluoroethylene, the adhesive may be polybutadine, and the film may be further impregnated with a metal oxide heat transfer medium, such as zinc oxide. An alternate method comprises applying the porous polymer film without plasma treatment and heat curing the film to form a proper bond.

13. 发明授权

US06288559B1 Semiconductor testing using electrically conductive adhesives 失效
标题翻译：使用导电胶的半导体测试
公开(公告)号：US06288559B1
公开(公告)日：2001-09-11
申请号：US09050820
申请日：1998-03-30
申请人： William E. Bernier , Michael A. Gaynes , Wayne J. Howell , Mark V. Pierson , Ajit K. Trivedi , Charles G. Woychik
发明人： William E. Bernier , Michael A. Gaynes , Wayne J. Howell , Mark V. Pierson , Ajit K. Trivedi , Charles G. Woychik
IPC分类号： G01R3102
CPC分类号： G01R31/2886 , H01L2224/45144 , H01L2224/81385 , H01L2224/83101 , H05K3/321 , H01L2924/00
摘要： A method and device for testing and burning-in semiconductor circuits. The method and device permit the entire wafer to be tested by temporarily attaching the wafer to a test substrate using electrically conductive adhesive (ECA). The ECA conforms to deviations from co-planarity of the contact points of both the wafer and test substrate while providing a quality electrical connection at each point. ECA material can be deposited on either the wafer contacts or the substrate pads. In addition, the ECA may be deposited on C4 bumps or tin-capped lead bases. Variations in the method and device include filling vias of a non-conductive interposer with ECA. The electrical connection may be enhanced by forming conductive dendrites on test pads while the ECA is deposited on the wafer contacts. To further enhance the electrical connection, the ECA material can be plasma etched to remove some of its polymer matrix and to expose the electrically conductive particles on one side and then plating with palladium. After the palladium-plated ECA is brought into contact with aluminum pads, palladium-coated aluminum pads, or even C4 solder bumps, conductive dendrites are formed on the palladium-treated ECA bumps.
摘要翻译：一种用于测试和燃烧半导体电路的方法和装置。该方法和装置允许通过使用导电粘合剂（ECA）将晶片临时附接到测试基板来测试整个晶片。 ECA符合晶片和测试基板的接触点的共平面偏差，同时在每个点提供质量电连接。 ECA材料可以沉积在晶片触点或衬底焊盘上。此外，ECA可以沉积在C4凸点或锡盖铅基上。该方法和装置的变化包括用ECA填充非导电插入件的通孔。可以通过在测试焊盘上形成导电枝晶而增加电连接，同时将ECA沉积在晶片触点上。为了进一步增强电连接，可以对ECA材料进行等离子体蚀刻以除去其一些聚合物基质并使一面上的导电颗粒暴露，然后用钯镀覆。在镀钯的ECA与铝焊盘，钯涂覆的铝焊盘或甚至C4焊料凸块接触之后，在钯处理的ECA凸块上形成导电枝晶。

14. 发明授权

US06219238B1 Structure for removably attaching a heat sink to surface mount packages 失效
标题翻译：用于将散热器可拆卸地连接到表面安装封装的结构
公开(公告)号：US06219238B1
公开(公告)日：2001-04-17
申请号：US09307890
申请日：1999-05-10
申请人： Frank E. Andros , Michael A. Gaynes , Hussain Shaukatullah , Wayne R. Storr
发明人： Frank E. Andros , Michael A. Gaynes , Hussain Shaukatullah , Wayne R. Storr
IPC分类号： H05K720
CPC分类号： H01L23/4093 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2924/15311 , Y10T24/45581 , H01L2924/00014
摘要： A structure for removably attaching a heat sink to an electronic package. At least one heat sink engaging member engages a surface of the heat sink opposite a surface of the heat sink engaging the electronic package. At least two heat sink retaining clips extend from opposite sides of the at least one heat sink engaging member. Each retaining clip includes a first arm for extending past a side of the heat sink and a portion of the electronic package and a second arm extending from the first member for engaging the electronic package.
摘要翻译：一种用于将散热器可拆卸地附接到电子封装的结构。至少一个散热器接合构件与散热器的与电子封装件接合的表面相对的表面接合。至少两个散热器保持夹从至少一个散热器接合构件的相对侧延伸。每个固定夹包括一个第一臂，用于延伸穿过散热片的一侧和电子封装的一部分;以及第二臂，从该第一构件延伸以接合该电子封装。

15. 发明授权

US6129804A TFT panel alignment and attachment method and apparatus 失效
标题翻译： TFT面板对准和附接方法和装置
公开(公告)号：US6129804A
公开(公告)日：2000-10-10
申请号：US71675
申请日：1998-05-01
申请人： Michael A. Gaynes , Allan O. Johnson , Ramesh R. Kodnani , Mark V. Pierson , Edward J. Tasillo
发明人： Michael A. Gaynes , Allan O. Johnson , Ramesh R. Kodnani , Mark V. Pierson , Edward J. Tasillo
IPC分类号： B32B37/12 , G02F1/1333 , B32B31/00
CPC分类号： B32B38/18 , G02F1/13336 , B32B37/12 , Y10S345/903 , Y10T156/1089 , Y10T156/109 , Y10T156/1092 , Y10T156/1093 , Y10T156/1754 , Y10T156/1756 , Y10T156/1759
摘要： A system for aligning and attaching together a plurality of thin film transistor tiles for constructing a flat panel display. A coverplate loading station where a coverplate that the tiles are to be attached to is arranged on a coverplate support. A coverplate bonding material dispensing station where a bonding material for bonding the tiles to the coverplate is applied to a surface of the coverplate. A tile placement station where the tiles are arranged on the coverplate. A tile aligning and securing station where the tiles are aligned relative to each other and the coverplate by the tile aligner and where the tiles are at least partially bonded to the coverplate. A tile assembly bonding material dispensing station where a bonding material is applied to a surface of the tiles opposite the side that the coverplate is bonded to. A backplate placement station where a backplate is arranged on the tiles. A backplate aligning and securing station where the backplate is aligned with the tiles and the coverplate and at least partially secured to the tiles A full bonding station where the tiles are fully bonded to the coverplate and the backplate.
摘要翻译：一种用于对准和连接在一起的多个薄膜晶体管瓦片用于构建平板显示器的系统。一个盖板加载站，其中瓦片要附着的盖板布置在盖板支架上。一种覆盖板接合材料分配站，其中用于将瓦片粘合到盖板上的粘合材料施加到盖板的表面。瓦片布置台，其中瓦片布置在盖板上。瓦片对准和固定台，其中瓦片通过瓦片对准器相对于彼此并且盖板对准，并且瓦片至少部分地结合到盖板。一种瓦片组合接合材料分配站，其中粘合材料施加到瓦片与盖板粘合的一侧相反的表面。背板放置台，其中背板设置在瓦片上。背板对准和固定台，其中背板与瓦片和盖板对准并且至少部分地固定到瓦片完全粘合台，其中瓦片完全结合到盖板和背板。

16. 发明授权

US5798050A Process for fabrication of a selectively filled flexible adhesive device for solderless connection of electronic modules to a substrate 失效
标题翻译：用于制造用于将电子模块无焊接连接到基板的选择性填充的柔性粘合装置的工艺
公开(公告)号：US5798050A
公开(公告)日：1998-08-25
申请号：US895536
申请日：1997-07-17
申请人： Michael A. Gaynes , Jaynal A. Molla
发明人： Michael A. Gaynes , Jaynal A. Molla
IPC分类号： H01L21/60 , H01L23/373 , H05K3/20 , H05K3/32 , H05K3/42 , B44C1/22
CPC分类号： H01L24/83 , H01L23/3733 , H01L24/29 , H05K3/323 , H05K3/423 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/29386 , H01L2224/29499 , H01L2224/8319 , H01L2224/838 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01046 , H01L2924/01078 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H05K2201/10378 , H05K2203/0307 , H05K2203/0726 , H05K3/205
摘要： A process for fabrication of an electrically conductive adhesive film having a pattern of microscopic elongate metal particles which extend from one surface to the other to provide an interconnection between confronting conductive metal pads abutting the surface. The particles have sharp ends to penetrate the oxide coating on the conductive metal pads of an electronic module when force is applied to press the module against the film.
摘要翻译：一种用于制造导电粘合剂膜的方法，其具有从一个表面延伸到另一个表面的微观细长金属颗粒的图案，以提供邻接表面的相对的导电金属垫之间的互连。当施加力以将模块压靠在膜上时，颗粒具有尖端以穿透电子模块的导电金属焊盘上的氧化物涂层。

17. 发明授权

US5638597A Manufacturing flexible circuit board assemblies with common heat spreaders 失效
标题翻译：制造具有普通散热器的柔性电路板组件
公开(公告)号：US5638597A
公开(公告)日：1997-06-17
申请号：US476759
申请日：1995-06-07
申请人： Lawrence R. Cutting , Michael A. Gaynes , Eric A. Johnson , Cynthia S. Milkovich , Jeffrey S. Perkins , Mark V. Pierson , Steven E. Poetzinger , Jerzy Zalesinski
发明人： Lawrence R. Cutting , Michael A. Gaynes , Eric A. Johnson , Cynthia S. Milkovich , Jeffrey S. Perkins , Mark V. Pierson , Steven E. Poetzinger , Jerzy Zalesinski
IPC分类号： H01L21/48 , H01L23/367 , H01L23/538 , H05K1/00 , H05K1/02 , H05K1/18 , H05K3/00 , H05K3/12 , H05K3/34 , H05K7/20 , H05K3/36
CPC分类号： H05K7/20454 , H01L21/4857 , H01L21/4867 , H01L23/3672 , H01L23/5387 , H05K1/021 , H05K1/189 , H05K3/0061 , H05K3/1216 , H05K3/4691 , H01L2224/16 , H01L2924/01078 , H01L2924/01322 , H05K1/0298 , H05K1/182 , H05K2201/0154 , H05K2201/09063 , H05K2201/096 , H05K2201/09745 , H05K2201/1056 , H05K2201/2009 , H05K2203/1394 , H05K3/3415 , H05K3/3452 , Y10T29/49126 , Y10T29/4913 , Y10T29/49144
摘要： A multi-layer flexible circuit board has multiple thicker regions to which components are mounted and thinner, more flexible regions with fewer wiring layers through which the board can be bent about a line without bending thicker regions. Surface mount components such as QFP's and flip-chips are mounted on the front side, and surface mount and pin-in-hole components are mounted on the back side of the circuit board at the thick regions. Heat spreaders are laminated to the back sides of thicker regions. The thicker regions have windows in which wire bond chips are mounted on the heat spreader and wire bonded to the front side of the board. A thermally conductive adhesive or grease connects between the tops of the back side components and the bottoms of the cavities. The heat sinks are bolted together and/or to an enclosure frame to improve thermal performance.
摘要翻译：多层柔性电路板具有多个较厚的区域，组件安装在该较厚的区域上，较薄的，更柔性的区域具有较少的布线层，板可围绕线弯曲，而不会弯曲较厚的区域。表面安装部件如QFP和倒装芯片安装在前侧，表面安装和销孔组件安装在电路板的背面，在较厚的区域。散热器层压到较厚区域的背面。较厚的区域具有窗口，其中引线接合芯片安装在散热器上，并且引线键合到板的前侧。导热粘合剂或油脂连接在后侧部件的顶部和空腔的底部之间。散热器螺栓连接在一起和/或连接到外壳框架以改善热性能。

18. 发明授权

US5545465A Circuit board having a defined volume of solder or conductive adhesive deposited at interconnection sites for electrical circuits 失效
标题翻译：具有限定体积的焊料或导电粘合剂的电路板沉积在用于电路的互连位置处
公开(公告)号：US5545465A
公开(公告)日：1996-08-13
申请号：US449029
申请日：1995-05-24
申请人： Michael A. Gaynes , George D. Oxx , Mark V. Pierson , Jerzy Zalesinski
发明人： Michael A. Gaynes , George D. Oxx , Mark V. Pierson , Jerzy Zalesinski
IPC分类号： B05C5/02 , B23K3/06 , H01L21/48 , H01L21/60 , H05K3/12 , H05K3/32 , H05K3/34 , B32B9/00
CPC分类号： H01L24/27 , B23K3/0692 , H01L21/4853 , H01L21/4867 , H01L24/83 , H05K3/1233 , H05K3/3484 , B23K2201/36 , H01L2224/2919 , H01L2224/8319 , H01L2224/838 , H01L2924/01029 , H01L2924/01033 , H01L2924/01077 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/14 , H01L2924/3025 , H05K2201/0989 , H05K2203/0126 , H05K2203/043 , H05K2203/0568 , H05K2203/0577 , H05K3/321 , H05K3/3452 , Y10T29/49165 , Y10T428/24917
摘要： A method of applying bonding agents, such as solder pastes and conductive adhesives, to pad sites in the manufacture of electronic circuits uses a paste injection head. A permanent mask with cavity openings is applied around conductive pads on a carrier. The conductive pads correspond to chip attachment sites. The injection head is brought into contact with a surface of the mask, and pressure is applied to a bonding agent in the injection head. The injection head is then moved over the surface of the mask, filling cavity openings with the bonding agent. The injection head is then removed from the surface of the mask. If a solder paste is used, infrared radiation is applied to filled cavity openings to evaporate a paste flux and reflow solder to form solder balls within the cavity openings projecting above the mask. If a conductive adhesive is used, a stencil is applied to the surface of the mask prior to contacting the mask with said injection head. When the cavity openings are filled, stencil is removed from the mask and the conductive adhesive filling the cavity openings is dried.
摘要翻译：在电子电路的制造中将焊接剂和导电粘合剂等粘合剂施加到焊盘部位的方法使用糊剂注入头。具有腔体开口的永久性掩模施加在载体上的导电焊盘周围。导电垫对应于芯片附接位置。使注射头与掩模的表面接触，并且将压力施加到注射头中的粘合剂。然后将注射头移动到掩模的表面上，用粘合剂填充空腔开口。然后将注射头从掩模的表面去除。如果使用焊膏，则将红外线辐射施加到填充的空腔开口，以蒸发浆料焊剂并回流焊料，以在突出在掩模上方的空腔开口内形成焊球。如果使用导电粘合剂，则在将掩模与所述注射头接触之前，将模板施加到掩模的表面。当腔开口被填充时，将模板从掩模中取出，并且填充空腔开口的导电粘合剂被干燥。

19. 发明授权

US09343423B2 No flow underfill or wafer level underfill and solder columns 有权
标题翻译：无流动底部填充或晶圆级底部填充和焊料柱
公开(公告)号：US09343423B2
公开(公告)日：2016-05-17
申请号：US14526268
申请日：2014-10-28
申请人： Claudius Ferger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
发明人： Claudius Ferger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
IPC分类号： H01L21/50 , H01L21/48 , H01L23/00 , H01L23/498 , H01L21/463 , H01L23/544
CPC分类号： H01L24/81 , H01L21/463 , H01L21/563 , H01L23/49816 , H01L23/544 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/743 , H01L24/83 , H01L24/92 , H01L2223/54426 , H01L2223/54473 , H01L2223/54486 , H01L2224/11462 , H01L2224/13082 , H01L2224/13147 , H01L2224/1605 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/2741 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/8113 , H01L2224/81132 , H01L2224/81192 , H01L2224/81193 , H01L2224/81203 , H01L2224/814 , H01L2224/81801 , H01L2224/81815 , H01L2224/83192 , H01L2224/83856 , H01L2224/9211 , H01L2224/94 , H01L2924/01029 , H01L2924/10253 , H01L2924/1461 , H01L2924/00 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2224/11 , H01L2224/27 , H01L2224/81 , H01L2224/83
摘要： A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the chip and the substrate to one another.
摘要翻译：预组装半导体器件包括半导体芯片上的芯片焊接结构和对应于芯片焊接结构的衬底上的衬底焊接结构。衬底焊接结构朝着芯片焊接结构延伸，以形成与芯片焊接结构的焊接连接。芯片和衬底相对于彼此处于预组装位置。基板焊接结构的高度大于芯片焊接结构的高度。预先施加的底部填充物与基底相邻并且足够厚以便基本上不超过基底焊接结构的全高度延伸。在另一个实施例中，芯片焊接结构的高度大于衬底焊接结构的高度，并且预先施加的底部填充物与半导体芯片邻接并且足够厚以便基本上不超过芯片焊接的全部高度结构。一种方法包括通过将芯片和衬底彼此焊接来从这些器件制造半导体组件。

20. 发明申请

US20150147851A1 NO FLOW UNDERFILL OR WAFER LEVEL UNDERFILL AND SOLDER COLUMNS 有权
公开(公告)号：US20150147851A1
公开(公告)日：2015-05-28
申请号：US14526268
申请日：2014-10-28
申请人： Claudius Feger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
发明人： Claudius Feger , Michael A. Gaynes , Jae-Woong Nah , Da-Yuan Shih
IPC分类号： H01L23/00 , H01L21/56
CPC分类号： H01L24/81 , H01L21/463 , H01L21/563 , H01L23/49816 , H01L23/544 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/743 , H01L24/83 , H01L24/92 , H01L2223/54426 , H01L2223/54473 , H01L2223/54486 , H01L2224/11462 , H01L2224/13082 , H01L2224/13147 , H01L2224/1605 , H01L2224/16225 , H01L2224/16227 , H01L2224/16238 , H01L2224/2741 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/8113 , H01L2224/81132 , H01L2224/81192 , H01L2224/81193 , H01L2224/81203 , H01L2224/814 , H01L2224/81801 , H01L2224/81815 , H01L2224/83192 , H01L2224/83856 , H01L2224/9211 , H01L2224/94 , H01L2924/01029 , H01L2924/10253 , H01L2924/1461 , H01L2924/00 , H01L2924/00014 , H01L2924/00012 , H01L2924/014 , H01L2224/11 , H01L2224/27 , H01L2224/81 , H01L2224/83
摘要： A preassembly semiconductor device comprises chip soldering structures on a semiconductor chip and substrate soldering structures on a substrate corresponding to the chip soldering structures. The substrate soldering structures extend toward the chip soldering structures for forming solder connections with the chip soldering structures. The chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the chip and the substrate to one another

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