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11. 发明授权

US08802257B2 Battery pack and driving method thereof 有权
标题翻译：电池组及其驱动方法
公开(公告)号：US08802257B2
公开(公告)日：2014-08-12
申请号：US12881131
申请日：2010-09-13
申请人： Jinwan Kim , Jongwoon Yang , Susumu Segawa , Tetsuya Okada , Euijeong Hwang , Sesub Sim , Hanseok Yun , Beomgyu Kim
发明人： Jinwan Kim , Jongwoon Yang , Susumu Segawa , Tetsuya Okada , Euijeong Hwang , Sesub Sim , Hanseok Yun , Beomgyu Kim
IPC分类号： H01M2/34 , H01M10/42 , H01M10/44 , H01M10/48
CPC分类号： H01M10/482 , H01M2/34 , H01M10/425 , H01M10/441
摘要： A battery pack and a driving method thereof. The battery pack includes a battery cell; a charge switch and a discharge switch installed in a charge/discharge line of a battery cell; and a microcontroller to sense and store voltages of the battery cell, to compare the voltages of the battery cell before and after the microcontroller is reset, and to controls the charge switch and the discharge switch based on the sensed voltages of the battery cell such that the microcontroller turns off only one of the charge switch and the discharge switch when there is a change between the voltages of the battery cell before and after the microcontroller is reset.
摘要翻译：一种电池组及其驱动方法。电池组包括电池单元; 充电开关和放电开关，其安装在电池单元的充电/放电线路中; 以及微控制器，用于感测和存储电池单元的电压，以比较微控制器复位之前和之后的电池单元的电压，并且基于感测到的电池单元的电压来控制充电开关和放电开关，使得当微控制器复位之前和之后电池单元的电压发生变化时，微控制器只关闭一个充电开关和放电开关。

12. 发明授权

US08618773B2 Battery pack and charging control method thereof 有权
标题翻译：电池组及其充电控制方法
公开(公告)号：US08618773B2
公开(公告)日：2013-12-31
申请号：US12881094
申请日：2010-09-13
申请人： Jongwoon Yang , Susumu Segawa , Tetsuya Okada , Inkyu Park
发明人： Jongwoon Yang , Susumu Segawa , Tetsuya Okada , Inkyu Park
IPC分类号： H02J7/00
CPC分类号： H01M10/441 , H01M10/0525 , H01M10/46 , H01M10/482 , H02J7/0022 , H02J7/0073
摘要： A charging control method for a battery pack including a plurality of battery cells in which a full charge voltage value is initially set as a first voltage value. The charging control method includes: charging the plurality of battery cells to the first voltage value in an initial charge mode; and resetting the full charge voltage value to a second voltage value less than the first voltage value in a subsequent charge mode.
摘要翻译：一种电池组的充电控制方法，包括其中初始设定完全充电电压值作为第一电压值的多个电池单元。充电控制方法包括：在初始充电模式下将多个电池单元充电到第一电压值; 以及在随后的充电模式中将完全充电电压值重置为小于第一电压值的第二电压值。

13. 发明申请

US20120280694A1 BATTERY SYSTEM 有权
标题翻译：电池系统
公开(公告)号：US20120280694A1
公开(公告)日：2012-11-08
申请号：US13422970
申请日：2012-03-16
申请人： Byung-Il Song , Han-Seok Yun , Tetsuya Okada , Jong-Woon Yang , Eui-Jeong Hwang
发明人： Byung-Il Song , Han-Seok Yun , Tetsuya Okada , Jong-Woon Yang , Eui-Jeong Hwang
IPC分类号： G01N27/416
CPC分类号： H04Q9/00 , H04Q2209/10 , H04Q2209/30
摘要： A battery system is disclosed. In one embodiment, the system includes i) a plurality of battery modules each of which is configured to store power, wherein each battery module is electrically connected to at least one other battery module and ii) a plurality of management units configured to monitor states of the battery modules. Each management unit is electrically connected to at least one other management unit and one or more of the battery modules. Each management unit may include: at least one measuring unit configured to perform the monitoring and a receiving unit configured to i) receive measurement data including the monitoring results from the measuring unit via a first communication protocol and ii) receive measurement data from another receiving unit included in another management unit via a second communication protocol different from the first communication protocol.
摘要翻译：公开了一种电池系统。在一个实施例中，该系统包括i）多个电池模块，每个电池模块被配置为存储电力，其中每个电池模块电连接到至少一个其他电池模块，以及ii）多个管理单元，电池模块。每个管理单元电连接至至少一个其他管理单元和一个或多个电池模块。每个管理单元可以包括：被配置为执行监视的至少一个测量单元和被配置为i）经由第一通信协议从测量单元接收包括监视结果的测量数据，以及ii）从另一接收单元接收测量数据经由与第一通信协议不同的第二通信协议包括在另一个管理单元中。

14. 发明授权

US08116894B2 Chemical mechanical polishing method and chemical mechanical polishing device 失效
标题翻译：化学机械抛光方法和化学机械抛光装置
公开(公告)号：US08116894B2
公开(公告)日：2012-02-14
申请号：US12340208
申请日：2008-12-19
申请人： Masanori Miyata , Taro Usami , Koichi Sogawa , Kenji Nishihara , Tadao Uehara , Shisyo Chin , Hiroaki Teratani , Akinori Suzuki , Yuuichi Kohno , Tetsuya Okada , Tohru Haruki
发明人： Masanori Miyata , Taro Usami , Koichi Sogawa , Kenji Nishihara , Tadao Uehara , Shisyo Chin , Hiroaki Teratani , Akinori Suzuki , Yuuichi Kohno , Tetsuya Okada , Tohru Haruki
IPC分类号： G06F19/00
CPC分类号： H01L22/20 , B24B37/042 , H01L21/31053
摘要： A chemical mechanical polishing method including a step of forming a plurality of interlayer insulating films so as to coat a plurality of projecting patterns, at least one of the plurality of projecting patterns being formed on each of a plurality of substrates, whereby the plurality of projection patterns have different area ratios R with respect to the corresponding substrates, and performing a flattening process on the interlayer insulating films before linear approximation; a step of obtaining a linear approximation formula R=aT+b expressing a relationship between the area ratio R and a polishing time T, where R1, R2, R3, . . . , Rx represent the area ratio R of each of the projecting patterns with respect to the corresponding substrates, and T1, T2, T3, . . . , Tx represent the polishing time T required for achieving a target film thickness when performing the flattening process by polishing each of the interlayer insulating films coating the projecting patterns; and a step of calculating, with the use of a formula T=(R−b)/a, the polishing time T for the interlayer insulating films coating the projecting patterns having the area ratio R.
摘要翻译：一种化学机械抛光方法，包括形成多个层间绝缘膜以涂覆多个突起图案的步骤，所述多个突起图案中的至少一个形成在多个基板中的每一个上，由此所述多个突起图案相对于相应的基板具有不同的面积比R，并且在线性近似之前对层间绝缘膜进行平坦化处理; 获得表示面积比R和研磨时间T之间的关系的线性近似公式R = aT + b的步骤，其中R1，R2，R3，...。。。，Rx表示每个投影图案相对于相应基板的面积比R，以及T1，T2，T3。。。 Tx表示通过抛光涂覆突出图案的每个层间绝缘膜进行平坦化处理时达到目标膜厚所需的抛光时间T; 以及使用公式T =（R-b）/ a计算涂覆具有面积比R的投影图案的层间绝缘膜的研磨时间T的步骤。

15. 发明申请

US20100015772A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20100015772A1
公开(公告)日：2010-01-21
申请号：US12567050
申请日：2009-09-25
申请人： Yasuyuki SAYAMA , Tetsuya Okada , Makoto Oikawa , Hiroyasu Ishida , Kazunari Kushiyama
发明人： Yasuyuki SAYAMA , Tetsuya Okada , Makoto Oikawa , Hiroyasu Ishida , Kazunari Kushiyama
IPC分类号： H01L21/336 , H01L21/28
CPC分类号： H01L29/7802 , H01L29/0878 , H01L29/42372 , H01L29/4238 , H01L29/66712
摘要： An n type impurity region is provided below a gate electrode. By setting a gate length to be less than a depth of a channel region, a side surface of the channel region and a side surface of the n type impurity region adjacent to the channel region form a substantially perpendicular junction surface. Thus, since a depletion layer widens uniformly in a depth direction of a substrate, it is possible to secure a predetermined breakdown voltage. Furthermore, since an interval between the channel regions, above which the gate electrode is disposed, is uniform from its surface to its bottom, it is possible to increase an impurity concentration of the n type impurity region, resulting in an achievement of a low on-resistance.
摘要翻译：在栅电极的下方设置有n型杂质区。通过将栅极长度设置为小于沟道区的深度，沟道区的侧表面和与沟道区相邻的n型杂质区的侧表面形成基本上垂直的接合表面。因此，由于耗尽层在衬底的深度方向上均匀地变宽，因此可以确保预定的击穿电压。此外，由于栅极电极上方的沟道区域之间的间隔从表面到底部均匀，所以可以增加n型杂质区域的杂质浓度，导致实现低的导通 -抵抗性。

16. 发明申请

US20070072352A1 Insulated gate field effect transistor and manufacturing method thereof 审中-公开
标题翻译：绝缘栅场效应晶体管及其制造方法
公开(公告)号：US20070072352A1
公开(公告)日：2007-03-29
申请号：US11519208
申请日：2006-09-12
申请人： Kazunari Kushiyama , Tetsuya Okada , Makoto Oikawa , Hiroyasu Ishida , Yasuyuki Sayama
发明人： Kazunari Kushiyama , Tetsuya Okada , Makoto Oikawa , Hiroyasu Ishida , Yasuyuki Sayama
IPC分类号： H01L21/337 , H01L21/8242 , H01L21/336
CPC分类号： H01L29/7802 , H01L29/0878 , H01L29/41766 , H01L29/42372 , H01L29/4238 , H01L29/66712 , H01L29/66727
摘要： A separation hole is provided in the center of the gate electrode. Accordingly, it is possible to suppress a drastic increase in feedback capacitance Crss in the case where drain-source voltage VDS is decreased and the width of the depletion layer is narrowed. Thus, high-frequency switching characteristics are improved. Moreover, n type impurities are implanted from the separation hole to form an n type impurity region between channel regions. Since a resistance in a portion below the gate electrode can be reduced, an on-resistance can be reduced. The n type impurity region can be formed in a self-aligning manner.
摘要翻译：在栅电极的中心设置有分离孔。因此，在漏极 - 源极电压VDS降低并且耗尽层的宽度变窄的情况下，可以抑制反馈电容Crss急剧增加。因此，提高了高频开关特性。此外，从分离孔注入n型杂质，在沟道区域之间形成n型杂质区。由于可以减小栅电极下方的电阻，所以可以降低导通电阻。可以以自对准的方式形成n型杂质区域。

17. 发明申请

US20050184355A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20050184355A1
公开(公告)日：2005-08-25
申请号：US11063739
申请日：2005-02-24
申请人： Tetsuya Okada
发明人： Tetsuya Okada
IPC分类号： H01L29/00 , H01L29/06 , H01L29/47 , H01L29/872
CPC分类号： H01L29/0692 , H01L29/0619 , H01L29/872
摘要： Conventionally, a guard ring for securing a breakdown voltage is provided around a Schottky barrier diode. Since the guard ring is a p+ type region, a depletion layer expands around the guard ring when a reverse voltage is applied to prevent a reduction in capacitance. In addition, there is a problem in that, when a forward voltage is applied, holes are injected from the guard ring if the applied voltage exceeds a predetermined voltage and high-speed operation cannot be realized. To solve the problems, a trench is provided in a guard ring region of the conventional technique and an insulating film is provided inside the trench. The trench is provided to reach an n+ type semiconductor substrate. Consequently, since the depletion layer expands only in a depth direction until the depletion layer reaches the n+ type semiconductor substrate, it is possible to realize a reduction in capacitance. In addition, since the p+ type region is made unnecessary, a reverse recovery time (Trr) does not occur. Therefore, it is possible to improve switching operation speed.
摘要翻译：通常，在肖特基势垒二极管周围设置用于确保击穿电压的保护环。由于保护环是p +型区域，所以当施加反向电压时，耗尽层围绕保护环扩展以防止电容降低。此外，存在如下问题：当施加正向电压时，如果施加的电压超过预定电压并且不能实现高速操作，则从保护环注入空穴。为了解决这些问题，在传统技术的保护环区域中设置沟槽，并且在沟槽内部设置绝缘膜。提供沟槽以到达n +型半导体衬底。因此，由于耗尽层仅在深度方向上扩展直到耗尽层到达n +型半导体衬底，所以可以实现电容的减小。此外，由于不需要p +型区域，所以不会发生反向恢复时间（Trr）。因此，能够提高开关动作速度。

18. 发明申请

US20050133814A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050133814A1
公开(公告)日：2005-06-23
申请号：US10958640
申请日：2004-10-06
申请人： Tetsuya Yoshida , Tetsuya Okada , Hiroaki Saito , Shigeyuki Murai , Kikuo Okada
发明人： Tetsuya Yoshida , Tetsuya Okada , Hiroaki Saito , Shigeyuki Murai , Kikuo Okada
IPC分类号： H01L29/70 , H01L29/06 , H01L29/73 , H01L29/739 , H01L29/78 , H01L29/80 , H01L29/423
CPC分类号： H01L29/7397 , H01L29/0619
摘要： In a conventional semiconductor device, there was a problem that, in a guard ring region, a shape of a depletion layer is distorted and stable withstand voltage characteristics cannot be obtained. In a semiconductor device of the present invention, a thermal oxide film in an actual operation region and a thermal oxide film in a guard ring region are formed in the same process. Thereafter, the thermal oxide film is once removed and is formed again. Thus, a film thickness of the thermal oxide film on the upper surface of the guard ring region is set to, for example, about 8000 to 10000 Å. Accordingly, a CVD oxide film including moving ions is formed in a position distant from a surface of an epitaxial layer. Consequently, distortion of a depletion layer, which is influenced by the moving ions, is suppressed and desired withstand voltage characteristics can be maintained.
摘要翻译：在传统的半导体器件中，存在在保护环区域中耗尽层的形状变形而不能得到稳定的耐电压特性的问题。在本发明的半导体装置中，以相同的工序形成实际工作区域中的热氧化膜和防护环区域的热氧化膜。此后，热氧化膜被一次除去并再次形成。因此，保护环区域的上表面上的热氧化膜的膜厚设定为例如约8000〜10000。因此，包含移动离子的CVD氧化膜形成在远离外延层的表面的位置。因此，受到移动离子影响的耗尽层的失真被抑制，并且可以保持期望的耐受电压特性。

19. 发明授权

US5789924A Method of calculating rechargeable battery charge capacity 失效
标题翻译：计算可充电电池充电容量的方法
公开(公告)号：US5789924A
公开(公告)日：1998-08-04
申请号：US822235
申请日：1997-03-20
申请人： Tetsuya Okada
发明人： Tetsuya Okada
IPC分类号： G01R31/36 , G01N27/416
CPC分类号： G01R31/361 , G01R31/3648 , G01R31/3662
摘要： The method of calculating rechargeable battery charge capacity of this invention has steps to temporarily interrupt charging and calculate battery internal impedance, to calculate a no-load battery voltage by subtracting the product of internal impedance and charging current from the battery voltage when charging current is supplied, to calculate charging power by multiplying no-load voltage and charging current, and to repeatedly perform the charging power calculation integrating that charging power result to compute battery charge capacity.
摘要翻译：计算本发明的可再充电电池充电容量的方法具有暂时中断充电并计算电池内部阻抗的步骤，通过从充电电流供给时从电池电压减去内部阻抗和充电电流的乘积来计算空载电池电压通过乘以空载电压和充电电流来计算充电功率，并且重复执行将该充电电力结果积分的充电功率计算来计算电池充电容量。

20. 发明授权

US5684386A Charging method of a secondary battery 失效
标题翻译：蓄电池充电方法
公开(公告)号：US5684386A
公开(公告)日：1997-11-04
申请号：US544795
申请日：1995-10-18
申请人： Tetsuya Okada
发明人： Tetsuya Okada
IPC分类号： H02J7/10 , H01M10/44 , H02J7/00
CPC分类号： H01M10/44 , H02J7/0093
摘要： A secondary battery is charged in alternating charging and pulse-charging periods in which the secondary battery is continuously charged during the charging periods and the secondary battery is charged in a series of charging pulses during the pulse-charging periods. The terminal voltage or the temperature of the secondary battery may be sampled during at least one interval between the pulses in a pulse-charging period to detect a full charge level or an excessive temperature, respectively. Such an arrangement can reduce charging time and facilitate accurate monitoring of the terminal voltage or the temperature.
摘要翻译：二次电池在充电期间二次电池连续充电的交替充电和脉冲充电期间被充电，并且在脉冲充电期间二次电池以一系列充电脉冲充电。可以在脉冲充电期间的脉冲之间的至少一个间隔期间对二次电池的端子电压或温度进行采样，以分别检测完全充电电平或过高温度。这样的布置可以减少充电时间并且有助于精确地监测端子电压或温度。

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