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11. 发明申请

US20090152597A1 BIOSENSOR AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：生物传感器及其制造方法
公开(公告)号：US20090152597A1
公开(公告)日：2009-06-18
申请号：US12195305
申请日：2008-08-20
申请人： Tae Youb KIM , Nae Man Park , Han Young Yu , Moon Gyu Jang , Jong Heon Yang
发明人： Tae Youb KIM , Nae Man Park , Han Young Yu , Moon Gyu Jang , Jong Heon Yang
IPC分类号： H01L29/12 , H01L21/00
CPC分类号： G01N27/4146 , G01N27/4145 , Y10S977/71 , Y10S977/742 , Y10S977/963
摘要： Provided are a biosensor with a silicon nanowire and a method of manufacturing the same, and more particularly, a biosensor with a silicon nanowire including a defect region formed by irradiation of an electron beam, and a method of manufacturing the same. The biosensor includes: a silicon substrate; a source region disposed on the silicon substrate; a drain region disposed on the silicon substrate; and a silicon nanowire disposed on the source region and the drain region, and having a defect region formed by irradiation of an electron beam. Therefore, by irradiating a certain region of a high-concentration doped silicon nanowire with an electron beam to lower electron mobility in the certain region, it is possible to maintain a low contact resistance between the silicon nanowire and a metal electrode and to lower operation current of a biomaterial detection part, thereby improving sensitivity of the biosensor.
摘要翻译：本发明提供一种具有硅纳米线的生物传感器及其制造方法，更具体地，涉及具有通过电子束照射形成的缺陷区域的硅纳米线的生物传感器及其制造方法。生物传感器包括：硅衬底; 设置在所述硅基板上的源极区域; 设置在所述硅基板上的漏极区域; 以及设置在源极区域和漏极区域上的硅纳米线，并且具有通过电子束的照射而形成的缺陷区域。因此，通过用特定的区域照射具有电子束的高浓度掺杂的硅纳米线的特定区域来降低电子迁移率，可以保持硅纳米线与金属电极之间的低接触电阻并降低工作电流的生物材料检测部件，从而提高生物传感器的灵敏度。

12. 发明授权

US08022444B2 Biosensor and method of manufacturing the same 有权
标题翻译：生物传感器及其制造方法
公开(公告)号：US08022444B2
公开(公告)日：2011-09-20
申请号：US12195305
申请日：2008-08-20
申请人： Tae Youb Kim , Nae Man Park , Han Young Yu , Moon Gyu Jang , Jong Heon Yang
发明人： Tae Youb Kim , Nae Man Park , Han Young Yu , Moon Gyu Jang , Jong Heon Yang
IPC分类号： H01L27/085 , H01L27/14 , H01L21/00
CPC分类号： G01N27/4146 , G01N27/4145 , Y10S977/71 , Y10S977/742 , Y10S977/963
摘要： Provided are a biosensor with a silicon nanowire and a method of manufacturing the same, and more particularly, a biosensor with a silicon nanowire including a defect region formed by irradiation of an electron beam, and a method of manufacturing the same. The biosensor includes: a silicon substrate; a source region disposed on the silicon substrate; a drain region disposed on the silicon substrate; and a silicon nanowire disposed on the source region and the drain region, and having a defect region formed by irradiation of an electron beam. Therefore, by irradiating a certain region of a high-concentration doped silicon nanowire with an electron beam to lower electron mobility in the certain region, it is possible to maintain a low contact resistance between the silicon nanowire and a metal electrode and to lower operation current of a biomaterial detection part, thereby improving sensitivity of the biosensor.
摘要翻译：本发明提供一种具有硅纳米线的生物传感器及其制造方法，更具体地，涉及具有通过电子束照射形成的缺陷区域的硅纳米线的生物传感器及其制造方法。生物传感器包括：硅衬底; 设置在所述硅基板上的源极区域; 设置在所述硅基板上的漏极区域; 以及设置在源极区域和漏极区域上的硅纳米线，并且具有通过电子束的照射而形成的缺陷区域。因此，通过用特定的区域照射具有电子束的高浓度掺杂的硅纳米线的特定区域来降低电子迁移率，可以保持硅纳米线与金属电极之间的低接触电阻并降低工作电流的生物材料检测部件，从而提高生物传感器的灵敏度。

13. 发明授权

US07713826B2 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07713826B2
公开(公告)日：2010-05-11
申请号：US12045797
申请日：2008-03-11
申请人： Chel Jong Choi , Moon Gyu Jang , Yark Yeon Kim , Myung Sim Jun , Tae Youb Kim
发明人： Chel Jong Choi , Moon Gyu Jang , Yark Yeon Kim , Myung Sim Jun , Tae Youb Kim
IPC分类号： H01L21/336
CPC分类号： H01L21/28229 , H01L21/28079 , H01L29/495 , H01L29/513 , H01L29/517 , H01L29/6659 , H01L29/7833
摘要： Provided is a method of manufacturing a semiconductor device including a high-k dielectric thin layer formed using an interfacial reaction. The method includes the steps of: forming an oxide layer on a silicon substrate; depositing a metal layer on the oxide layer to form a metal silicate layer using an interfacial reaction between the oxide layer and the metal layer; forming a metal gate by etching the metal silicate layer and the metal layer; and forming a lightly doped drain (LDD) region and source and drain regions in the silicon substrate after forming the metal gate. In this method, a semiconductor device having high quality and performance can be manufactured by a simpler process at lower cost.
摘要翻译：提供一种制造包括使用界面反应形成的高k电介质薄层的半导体器件的方法。该方法包括以下步骤：在硅衬底上形成氧化物层; 使用氧化物层和金属层之间的界面反应，在氧化物层上沉积金属层以形成金属硅酸盐层; 通过蚀刻金属硅酸盐层和金属层形成金属栅极; 以及在形成金属栅极之后在硅衬底中形成轻掺杂漏极（LDD）区域和源极和漏极区域。在该方法中，可以通过更简单的工艺以较低的成本制造具有高品质和高性能的半导体器件。

14. 发明申请

US20080299736A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20080299736A1
公开(公告)日：2008-12-04
申请号：US12045797
申请日：2008-03-11
申请人： Chel Jong Choi , Moon Gyu Jang , Yark Yeon Kim , Myung Sim Jun , Tae Youb Kim
发明人： Chel Jong Choi , Moon Gyu Jang , Yark Yeon Kim , Myung Sim Jun , Tae Youb Kim
IPC分类号： H01L21/336
CPC分类号： H01L21/28229 , H01L21/28079 , H01L29/495 , H01L29/513 , H01L29/517 , H01L29/6659 , H01L29/7833
摘要： Provided is a method of manufacturing a semiconductor device including a high-k dielectric thin layer formed using an interfacial reaction. The method includes the steps of: forming an oxide layer on a silicon substrate; depositing a metal layer on the oxide layer to form a metal silicate layer using an interfacial reaction between the oxide layer and the metal layer; forming a metal gate by etching the metal silicate layer and the metal layer; and forming a lightly doped drain (LDD) region and source and drain regions in the silicon substrate after forming the metal gate. In this method, a semiconductor device having high quality and performance can be manufactured by a simpler process at lower cost.
摘要翻译：提供一种制造包括使用界面反应形成的高k电介质薄层的半导体器件的方法。该方法包括以下步骤：在硅衬底上形成氧化物层; 使用氧化物层和金属层之间的界面反应，在氧化物层上沉积金属层以形成金属硅酸盐层; 通过蚀刻金属硅酸盐层和金属层形成金属栅极; 以及在形成金属栅极之后在硅衬底中形成轻掺杂漏极（LDD）区域和源极和漏极区域。在该方法中，可以通过更简单的工艺以较低的成本制造具有高品质和高性能的半导体器件。

15. 发明申请

US20110192439A1 THERMOELECTRIC ARRAY 审中-公开
标题翻译：热电阵列
公开(公告)号：US20110192439A1
公开(公告)日：2011-08-11
申请号：US13022251
申请日：2011-02-07
申请人： Young Sam PARK , Moon Gyu Jang , Myung Sim Jun , Young Hoon Hyun
发明人： Young Sam PARK , Moon Gyu Jang , Myung Sim Jun , Young Hoon Hyun
IPC分类号： H01L35/30
CPC分类号： H01L35/30
摘要： Provided is a thermoelectric array including a plurality of thermoelectric elements arranged in m rows and n columns (each of m and n is an integer equal to or more than 1), each thermoelectric element including a heat absorption layer, a first heat sink layer, a second heat sink layer, a first-conductivity-type leg, and a second-conductivity-type leg formed on the same plane. The heat absorption layers of the thermoelectric elements adjacently disposed in a row or column direction are disposed adjacent to each other, and the first and second heat sink layers of the adjacent thermoelectric elements are disposed adjacent to each other. In this case, thermal interference between adjacent thermoelectric elements may be minimized, thereby obtaining a thermoelectric array having a high figure of merit.
摘要翻译：本发明提供一种热电阵列，其包括以m行n列（m和n为1以上的整数）排列的多个热电元件，热电元件包括吸热层，第1散热层，第二散热层，第一导电型脚和形成在同一平面上的第二导电型脚。相邻地配置在行或列方向上的热电元件的吸热层相邻配置，相邻的热电元件的第一和第二散热层相邻配置。在这种情况下，相邻热电元件之间的热干扰可以最小化，从而获得具有高品质因数的热电阵列。

16. 发明授权

US07981735B2 Method of manufacturing a Schottky barrier tunnel transistor 失效
标题翻译：制造肖特基势垒隧道晶体管的方法
公开(公告)号：US07981735B2
公开(公告)日：2011-07-19
申请号：US12434779
申请日：2009-05-04
申请人： Yark Yeon Kim , Seong Jae Lee , Moon Gyu Jang , Chel Jong Choi , Myung Sim Jun , Byoung Chul Park
发明人： Yark Yeon Kim , Seong Jae Lee , Moon Gyu Jang , Chel Jong Choi , Myung Sim Jun , Byoung Chul Park
IPC分类号： H01L21/336
CPC分类号： H01L29/47 , H01L29/458 , H01L29/4908 , H01L29/66545 , H01L29/66772 , H01L29/7839
摘要： Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.
摘要翻译：提供了一种肖特基势垒隧道晶体管及其制造方法，该晶体管能够使用在半导体 - 金属结上自然形成的肖特基隧道势垒作为隧道来最小化对肖特基势垒隧道晶体管的栅极侧壁的损坏所造成的漏电流屏障。该方法包括以下步骤：在绝缘基板上形成半导体沟道层; 在半导体沟道层上形成虚拟栅极; 在绝缘基板上的虚拟栅极的两侧形成源极和漏极; 去除虚拟门; 在去除所述伪栅极的侧壁上形成绝缘层; 并且在从其中去除虚拟栅极的空间中形成实际栅极。在使用伪栅极制造肖特基势垒隧道晶体管时，可以形成高k电介质栅极绝缘层和金属栅极，并且可以获得具有非常强反应性的金属层的硅化物的稳定特性。

17. 发明授权

US07545000B2 Schottky barrier tunnel transistor and method of manufacturing the same 有权
标题翻译：肖特基势垒隧道晶体管及其制造方法
公开(公告)号：US07545000B2
公开(公告)日：2009-06-09
申请号：US11485837
申请日：2006-07-13
申请人： Yark Yeon Kim , Seong Jae Lee , Moon Gyu Jang , Chel Jong Choi , Myung Sim Jun , Byoung Chul Park
发明人： Yark Yeon Kim , Seong Jae Lee , Moon Gyu Jang , Chel Jong Choi , Myung Sim Jun , Byoung Chul Park
IPC分类号： H01L27/01
CPC分类号： H01L29/47 , H01L29/458 , H01L29/4908 , H01L29/66545 , H01L29/66772 , H01L29/7839
摘要： Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.
摘要翻译：提供了一种肖特基势垒隧道晶体管及其制造方法，该晶体管能够使用在半导体 - 金属结上自然形成的肖特基隧道势垒作为隧道，将肖特基势垒隧道晶体管的栅极侧壁损坏所造成的漏电流减到最小屏障。该方法包括以下步骤：在绝缘基板上形成半导体沟道层; 在半导体沟道层上形成虚拟栅极; 在绝缘基板上的虚拟栅极的两侧形成源极和漏极; 去除虚拟门; 在去除所述伪栅极的侧壁上形成绝缘层; 并且在从其中去除虚拟栅极的空间中形成实际栅极。在使用伪栅极制造肖特基势垒隧道晶体管时，可以形成高k电介质栅极绝缘层和金属栅极，并且可以获得具有非常强反应性的金属层的硅化物的稳定特性。

18. 发明授权

US09093606B2 Thermoelectric devices 有权
标题翻译：热电装置
公开(公告)号：US09093606B2
公开(公告)日：2015-07-28
申请号：US13611189
申请日：2012-09-12
申请人： Younghoon Hyun , Moon Gyu Jang , Young Sam Park , Taehyoung Zyung , Yil Suk Yang , Jong-Kee Kwon
发明人： Younghoon Hyun , Moon Gyu Jang , Young Sam Park , Taehyoung Zyung , Yil Suk Yang , Jong-Kee Kwon
IPC分类号： H01L35/30 , H01L35/32 , B82Y30/00
CPC分类号： H01L35/32 , B82Y30/00
摘要： Provided is a thermoelectric device including two legs having a rough side surface and a smooth side surface facing each other. Phonons may be scattered by the rough side surface, thereby decreasing thermal conductivity of the device. Flowing paths for electrons and phonons may become different form each other, because of a magnetic field induced by an electric current passing through the legs. The smooth side surface may be used for the flowing path of electrons. As a result, in the thermoelectric device, thermal conductivity can be reduced and electric conductivity can be maintained.
摘要翻译：提供一种热电装置，其包括具有粗糙侧表面和彼此面对的平滑侧表面的两个腿。声子可能被粗糙的侧面散射，从而降低了装置的热导率。电子和声子的流动路径可能由于由通过腿部的电流引起的磁场而彼此不同。光滑的侧面可以用于电子的流动路径。结果，在热电装置中，可以降低导热性并且可以保持导电性。

19. 发明申请

US20110150036A1 FLEXIBLE THERMOELECTRIC GENERATOR, WIRELESS SENSOR NODE INCLUDING THE SAME AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：柔性热电发生器，包括其的无线传感器节点及其制造方法
公开(公告)号：US20110150036A1
公开(公告)日：2011-06-23
申请号：US12949479
申请日：2010-11-18
申请人： Jae Woo Lee , Yil Suk Yang , Se Wan Heo , Moon Gyu Jang , Jong Dae Kim
发明人： Jae Woo Lee , Yil Suk Yang , Se Wan Heo , Moon Gyu Jang , Jong Dae Kim
IPC分类号： G01K7/02 , H01L35/32 , H01L21/30
CPC分类号： G01K7/02 , G01K2215/00 , H01L35/32 , H01L35/34
摘要： Provided are a flexible thermoelectric generator, a wireless sensor node including the same and a method of manufacturing the same. The flexible thermoelectric generator includes a plurality of P-type semiconductors and a plurality of N-type semiconductors, which are alternately arranged, an upper metal for connecting upper surfaces of the adjacent P-type semiconductor and N-type semiconductor, a lower metal for connecting lower surfaces of the adjacent P-type semiconductor and N-type semiconductor, and alternately disposed with respect to the upper metal, a P-type metal connected to at least one P-type semiconductor among the plurality of P-type semiconductors, and an N-type metal connected to at least one N-type semiconductor among the plurality of N-type semiconductors.
摘要翻译：提供了一种柔性热电发电机，包括该热电发电机的无线传感器节点及其制造方法。柔性热电发电机包括交替布置的多个P型半导体和多个N型半导体，用于连接相邻P型半导体和N型半导体的上表面的上金属，用于连接相邻的P型半导体和N型半导体的下表面，并且相对于上部金属交替布置，连接到多个P型半导体中的至少一个P型半导体的P型金属，以及与多个N型半导体中的至少一个N型半导体连接的N型金属。

20. 发明申请

US20120167936A1 THERMOELECTRIC DEVICE BASED ON SILICON NANOWIRES AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：基于硅纳米管的热电装置及其制造方法
公开(公告)号：US20120167936A1
公开(公告)日：2012-07-05
申请号：US13325082
申请日：2011-12-14
申请人： Young Sam PARK , Moon Gyu Jang , Younghoon Hyun , Myungsim Jun , Taehyoung Zyung
发明人： Young Sam PARK , Moon Gyu Jang , Younghoon Hyun , Myungsim Jun , Taehyoung Zyung
IPC分类号： H01L35/32 , H01L21/02 , B82Y40/00 , B82Y99/00 , H01L35/34
CPC分类号： H01L29/0673 , B82Y40/00 , H01L35/22 , H01L35/32
摘要： Disclosed are a thermoelectric device based on silicon nanowires including: a substrate; a silicon heat absorbing part absorbing heat, a silicon nanowire leg transferring heat, and a silicon heat releasing part releasing heat, which are formed on the substrate; and an insulating film with at least one or more holes, which is formed on the substrate including the silicon heat absorbing part, the silicon nanowire leg, and the silicon heat releasing part, and a method for manufacturing the same.
摘要翻译：公开了一种基于硅纳米线的热电装置，包括：基板; 吸收热的硅吸热部，传递热的硅纳米线支脚和释放热的硅散热部，形成在基板上; 以及具有至少一个以上的孔的绝缘膜及其制造方法，该绝缘膜形成在包括硅吸热部，硅纳米线支腿和硅散热部的基板上。

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